v3d: Put default vertex attribute values into the state uploader as well.

[mesa.git] / src / gallium / drivers / freedreno / freedreno_program.c

diff --git a/src/gallium/drivers/freedreno/freedreno_program.c b/src/gallium/drivers/freedreno/freedreno_program.c
index 5e344e691467fe3e6b504b7919621f8d24d4454d..989ccd1838f22c74008f059f383e39f5a9b324d2 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_program.c
+++ b/src/gallium/drivers/freedreno/freedreno_program.c
@@ -1,5 +1,3 @@
-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
 /*
  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
  *
@@ -37,7 +35,7 @@ fd_fp_state_bind(struct pipe_context *pctx, void *hwcso)
 {
        struct fd_context *ctx = fd_context(pctx);
        ctx->prog.fp = hwcso;
-       ctx->prog.dirty |= FD_SHADER_DIRTY_FP;
+       ctx->dirty_shader[PIPE_SHADER_FRAGMENT] |= FD_DIRTY_SHADER_PROG;
        ctx->dirty |= FD_DIRTY_PROG;
 }
 
@@ -46,7 +44,7 @@ fd_vp_state_bind(struct pipe_context *pctx, void *hwcso)
 {
        struct fd_context *ctx = fd_context(pctx);
        ctx->prog.vp = hwcso;
-       ctx->prog.dirty |= FD_SHADER_DIRTY_VP;
+       ctx->dirty_shader[PIPE_SHADER_VERTEX] |= FD_DIRTY_SHADER_PROG;
        ctx->dirty |= FD_DIRTY_PROG;
 }
 
@@ -69,7 +67,7 @@ static const char *blit_vp =
        "VERT                                        \n"
        "DCL IN[0]                                   \n"
        "DCL IN[1]                                   \n"
-       "DCL OUT[0], TEXCOORD[0]                     \n"
+       "DCL OUT[0], GENERIC[0]                      \n"
        "DCL OUT[1], POSITION                        \n"
        "  0: MOV OUT[0], IN[0]                      \n"
        "  0: MOV OUT[1], IN[1]                      \n"
@@ -83,7 +81,8 @@ static void * assemble_tgsi(struct pipe_context *pctx,
                        .tokens = toks,
        };
 
-       tgsi_text_translate(src, toks, ARRAY_SIZE(toks));
+       bool ret = tgsi_text_translate(src, toks, ARRAY_SIZE(toks));
+       assume(ret);
 
        if (frag)
                return pctx->create_fs_state(pctx, &cso);
@@ -96,7 +95,11 @@ fd_prog_blit(struct pipe_context *pctx, int rts, bool depth)
 {
        int i;
        struct ureg_src tc;
-       struct ureg_program *ureg = ureg_create(TGSI_PROCESSOR_FRAGMENT);
+       struct ureg_program *ureg;
+
+       debug_assert(rts <= MAX_RENDER_TARGETS);
+
+       ureg = ureg_create(PIPE_SHADER_FRAGMENT);
        if (!ureg)
                return NULL;