uint32_t size0; /* size of first layer in slice */
};
-struct set;
-
struct fd_resource {
struct pipe_resource base;
struct fd_bo *bo;
/* TODO rename to secondary or auxiliary? */
struct fd_resource *stencil;
+ uint32_t offset;
+ uint32_t ubwc_offset;
+ uint32_t ubwc_pitch;
+ uint32_t ubwc_size;
+
/* bitmask of in-flight batches which reference this resource. Note
* that the batch doesn't hold reference to resources (but instead
* the fd_ringbuffer holds refs to the underlying fd_bo), but in case
uint16_t seqno;
unsigned tile_mode : 2;
- unsigned preferred_tile_mode : 2;
/*
* LRZ
offset = slice->offset + (slice->size0 * layer);
}
debug_assert(offset < fd_bo_size(rsc->bo));
- return offset;
+ return offset + rsc->offset;
+}
+
+static inline uint32_t
+fd_resource_ubwc_offset(struct fd_resource *rsc, unsigned level, unsigned layer)
+{
+ /* for now this doesn't do anything clever, but when UBWC is enabled
+ * for multi layer/level images, it will.
+ */
+ if (rsc->ubwc_size) {
+ debug_assert(level == 0);
+ debug_assert(layer == 0);
+ }
+ return rsc->ubwc_offset;
}
/* This might be a5xx specific, but higher mipmap levels are always linear: */
return false;
}
+static inline bool
+fd_resource_ubwc_enabled(struct fd_resource *rsc, int level)
+{
+ return rsc->ubwc_size && rsc->tile_mode &&
+ !fd_resource_level_linear(&rsc->base, level);
+}
+
/* access # of samples, with 0 normalized to 1 (which is what we care about
* most of the time)
*/
return MAX2(1, prsc->nr_samples);
}
-void fd_blitter_pipe_begin(struct fd_context *ctx, bool render_cond, bool discard,
- enum fd_render_stage stage);
-void fd_blitter_pipe_end(struct fd_context *ctx);
-
void fd_resource_screen_init(struct pipe_screen *pscreen);
void fd_resource_context_init(struct pipe_context *pctx);
uint32_t fd_setup_slices(struct fd_resource *rsc);
void fd_resource_resize(struct pipe_resource *prsc, uint32_t sz);
+void fd_resource_uncompress(struct fd_context *ctx, struct fd_resource *rsc);
bool fd_render_condition_check(struct pipe_context *pctx);