freedreno: rebind resource in all contexts

[mesa.git] / src / gallium / drivers / freedreno / freedreno_screen.c

diff --git a/src/gallium/drivers/freedreno/freedreno_screen.c b/src/gallium/drivers/freedreno/freedreno_screen.c
index 9113b4ef6b30c14c681d93b720c3abc4ba1800bb..143b601f3b7fe85e13db392bbac776e0dc82a7b6 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_screen.c
+++ b/src/gallium/drivers/freedreno/freedreno_screen.c
@@ -61,9 +61,6 @@
 #include "ir3/ir3_nir.h"
 #include "a2xx/ir2.h"
 
-/* XXX this should go away */
-#include "state_tracker/drm_driver.h"
-
 static const struct debug_named_value debug_options[] = {
                {"msgs",      FD_DBG_MSGS,   "Print debug messages"},
                {"disasm",    FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly (a2xx only, see IR3_SHADER_DEBUG)"},
@@ -72,10 +69,10 @@ static const struct debug_named_value debug_options[] = {
                {"noscis",    FD_DBG_NOSCIS, "Disable scissor optimization"},
                {"direct",    FD_DBG_DIRECT, "Force inline (SS_DIRECT) state loads"},
                {"nobypass",  FD_DBG_NOBYPASS, "Disable GMEM bypass"},
-               {"fraghalf",  FD_DBG_FRAGHALF, "Use half-precision in fragment shader"},
+               {"log",       FD_DBG_LOG,    "Enable GPU timestamp based logging (a6xx+)"},
                {"nobin",     FD_DBG_NOBIN,  "Disable hw binning"},
                {"nogmem",    FD_DBG_NOGMEM,  "Disable GMEM rendering (bypass only)"},
-               {"glsl120",   FD_DBG_GLSL120,"Temporary flag to force GLSL 1.20 (rather than 1.30) on a3xx+"},
+               /* BIT(10) */
                {"shaderdb",  FD_DBG_SHADERDB, "Enable shaderdb output"},
                {"flush",     FD_DBG_FLUSH,  "Force flush after every draw"},
                {"deqp",      FD_DBG_DEQP,   "Enable dEQP hacks"},
@@ -90,6 +87,9 @@ static const struct debug_named_value debug_options[] = {
                {"perfcntrs", FD_DBG_PERFC,  "Expose performance counters"},
                {"noubwc",    FD_DBG_NOUBWC, "Disable UBWC for all internal buffers"},
                {"nolrz",     FD_DBG_NOLRZ,  "Disable LRZ (a6xx)"},
+               {"notile",    FD_DBG_NOTILE, "Disable tiling for all internal buffers"},
+               {"layout",    FD_DBG_LAYOUT, "Dump resource layouts"},
+               {"nofp16",    FD_DBG_NOFP16, "Disable mediump precision lowering"},
                DEBUG_NAMED_VALUE_END
 };
 
@@ -97,7 +97,6 @@ DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
 
 int fd_mesa_debug = 0;
 bool fd_binning_enabled = true;
-static bool glsl120 = false;
 
 static const char *
 fd_screen_get_name(struct pipe_screen *pscreen)
@@ -153,6 +152,7 @@ fd_screen_destroy(struct pipe_screen *pscreen)
                FREE(screen->ro);
 
        fd_bc_fini(&screen->batch_cache);
+       fd_gmem_screen_fini(pscreen);
 
        slab_destroy_parent(&screen->transfer_pool);
 
@@ -184,7 +184,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_TEXTURE_SWIZZLE:
        case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
-       case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
        case PIPE_CAP_SEAMLESS_CUBE_MAP:
        case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
        case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
@@ -196,8 +195,14 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
        case PIPE_CAP_TEXTURE_BARRIER:
        case PIPE_CAP_INVALIDATE_BUFFER:
+       case PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND:
                return 1;
 
+       case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
+               return is_a2xx(screen);
+       case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
+               return !is_a2xx(screen);
+
        case PIPE_CAP_PACKED_UNIFORMS:
                return !is_a2xx(screen);
 
@@ -285,8 +290,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 
        case PIPE_CAP_GLSL_FEATURE_LEVEL:
        case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
-               if (glsl120)
-                       return 120;
                return is_ir3(screen) ? 140 : 120;
 
        case PIPE_CAP_ESSL_FEATURE_LEVEL:
@@ -338,6 +341,9 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                        return 1;
                return 0;
 
+       case PIPE_CAP_NIR_IMAGES_AS_DEREF:
+               return 0;
+
        case PIPE_CAP_MAX_VIEWPORTS:
                return 1;
 
@@ -547,13 +553,14 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
        case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
                return 1;
        case PIPE_SHADER_CAP_INTEGERS:
-               if (glsl120)
-                       return 0;
                return is_ir3(screen) ? 1 : 0;
        case PIPE_SHADER_CAP_INT64_ATOMICS:
                return 0;
        case PIPE_SHADER_CAP_FP16:
-               return 0;
+               return ((is_a5xx(screen) || is_a6xx(screen)) &&
+                               (shader == PIPE_SHADER_COMPUTE ||
+                                       shader == PIPE_SHADER_FRAGMENT) &&
+                               !(fd_mesa_debug & FD_DBG_NOFP16));
        case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
        case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
                return 16;
@@ -792,8 +799,6 @@ fd_screen_create(struct fd_device *dev, struct renderonly *ro)
        if (fd_mesa_debug & FD_DBG_NOBIN)
                fd_binning_enabled = false;
 
-       glsl120 = !!(fd_mesa_debug & FD_DBG_GLSL120);
-
        if (!screen)
                return NULL;
 
@@ -956,6 +961,8 @@ fd_screen_create(struct fd_device *dev, struct renderonly *ro)
 
        fd_bc_init(&screen->batch_cache);
 
+       list_inithead(&screen->context_list);
+
        (void) mtx_init(&screen->lock, mtx_plain);
 
        pscreen->destroy = fd_screen_destroy;
@@ -967,6 +974,7 @@ fd_screen_create(struct fd_device *dev, struct renderonly *ro)
 
        fd_resource_screen_init(pscreen);
        fd_query_screen_init(pscreen);
+       fd_gmem_screen_init(pscreen);
 
        pscreen->get_name = fd_screen_get_name;
        pscreen->get_vendor = fd_screen_get_vendor;
@@ -980,15 +988,6 @@ fd_screen_create(struct fd_device *dev, struct renderonly *ro)
 
        pscreen->query_dmabuf_modifiers = fd_screen_query_dmabuf_modifiers;
 
-       if (!screen->supported_modifiers) {
-               static const uint64_t supported_modifiers[] = {
-                       DRM_FORMAT_MOD_LINEAR,
-               };
-
-               screen->supported_modifiers = supported_modifiers;
-               screen->num_supported_modifiers = ARRAY_SIZE(supported_modifiers);
-       }
-
        slab_create_parent(&screen->transfer_pool, sizeof(struct fd_transfer), 16);
 
        return pscreen;