#include "util/u_memory.h"
#include "util/u_inlines.h"
-#include "util/u_format.h"
-#include "util/u_format_s3tc.h"
+#include "util/format/u_format.h"
+#include "util/format/u_format_s3tc.h"
#include "util/u_screen.h"
#include "util/u_string.h"
#include "util/u_debug.h"
{"nobypass", FD_DBG_NOBYPASS, "Disable GMEM bypass"},
{"fraghalf", FD_DBG_FRAGHALF, "Use half-precision in fragment shader"},
{"nobin", FD_DBG_NOBIN, "Disable hw binning"},
+ {"nogmem", FD_DBG_NOGMEM, "Disable GMEM rendering (bypass only)"},
{"glsl120", FD_DBG_GLSL120,"Temporary flag to force GLSL 1.20 (rather than 1.30) on a3xx+"},
{"shaderdb", FD_DBG_SHADERDB, "Enable shaderdb output"},
{"flush", FD_DBG_FLUSH, "Force flush after every draw"},
{"inorder", FD_DBG_INORDER,"Disable reordering for draws/blits"},
{"bstat", FD_DBG_BSTAT, "Print batch stats at context destroy"},
{"nogrow", FD_DBG_NOGROW, "Disable \"growable\" cmdstream buffers, even if kernel supports it"},
- {"lrz", FD_DBG_LRZ, "Enable experimental LRZ support (a5xx+)"},
+ {"lrz", FD_DBG_LRZ, "Enable experimental LRZ support (a5xx)"},
{"noindirect",FD_DBG_NOINDR, "Disable hw indirect draws (emulate on CPU)"},
{"noblit", FD_DBG_NOBLIT, "Disable blitter (fallback to generic blit path)"},
{"hiprio", FD_DBG_HIPRIO, "Force high-priority context"},
- {"ttile", FD_DBG_TTILE, "Enable texture tiling (a5xx)"},
+ {"ttile", FD_DBG_TTILE, "Enable texture tiling (a2xx/a3xx/a5xx)"},
{"perfcntrs", FD_DBG_PERFC, "Expose performance counters"},
- {"softpin", FD_DBG_SOFTPIN,"Enable softpin command submission (experimental)"},
- {"ubwc", FD_DBG_UBWC, "Enable UBWC for all internal buffers (experimental)"},
+ {"noubwc", FD_DBG_NOUBWC, "Disable UBWC for all internal buffers"},
+ {"nolrz", FD_DBG_NOLRZ, "Disable LRZ (a6xx)"},
+ {"notile", FD_DBG_NOTILE, "Disable tiling for all internal buffers"},
+ {"layout", FD_DBG_LAYOUT, "Dump resource layouts"},
+ {"nofp16", FD_DBG_NOFP16, "Disable mediump precision lowering"},
DEBUG_NAMED_VALUE_END
};
fd_screen_get_name(struct pipe_screen *pscreen)
{
static char buffer[128];
- util_snprintf(buffer, sizeof(buffer), "FD%03d",
+ snprintf(buffer, sizeof(buffer), "FD%03d",
fd_screen(pscreen)->device_id);
return buffer;
}
FREE(screen->ro);
fd_bc_fini(&screen->batch_cache);
+ fd_gmem_screen_fini(pscreen);
slab_destroy_parent(&screen->transfer_pool);
case PIPE_CAP_TEXTURE_SWIZZLE:
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
- case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
case PIPE_CAP_SEAMLESS_CUBE_MAP:
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_INVALIDATE_BUFFER:
+ case PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND:
return 1;
+ case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
+ return is_a2xx(screen);
+ case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
+ return !is_a2xx(screen);
+
case PIPE_CAP_PACKED_UNIFORMS:
return !is_a2xx(screen);
case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
return 0;
- case PIPE_CAP_SM3:
+ case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
+ case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
+ case PIPE_CAP_VERTEX_SHADER_SATURATE:
case PIPE_CAP_PRIMITIVE_RESTART:
case PIPE_CAP_TGSI_INSTANCEID:
case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
return 0;
- case PIPE_CAP_TGSI_FS_FBFETCH:
+ case PIPE_CAP_FBFETCH:
if (fd_device_version(screen->dev) >= FD_VERSION_GMEM_BASE &&
is_a6xx(screen))
return 1;
if (is_a6xx(screen)) return 1;
return 0;
- case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
- return 0;
-
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
return screen->priority_mask;
return 1;
return 0;
+ case PIPE_CAP_NIR_IMAGES_AS_DEREF:
+ return 0;
+
case PIPE_CAP_MAX_VIEWPORTS:
return 1;
case PIPE_CAP_MAX_VARYINGS:
return 16;
+ case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
+ /* We don't really have a limit on this, it all goes into the main
+ * memory buffer. Needs to be at least 120 / 4 (minimum requirement
+ * for GL_MAX_TESS_PATCH_COMPONENTS).
+ */
+ return 128;
+
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
+ return 64 * 1024 * 1024;
+
case PIPE_CAP_SHAREABLE_SHADERS:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
/* manage the variants for these ourself, to avoid breaking precompile: */
return 1;
return 0;
+ /* Geometry shaders.. */
+ case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
+ return 512;
+ case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
+ return 2048;
+ case PIPE_CAP_MAX_GS_INVOCATIONS:
+ return 32;
+
/* Stream output. */
case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
if (is_ir3(screen))
if (is_ir3(screen))
return 1;
return 0;
+ case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
+ return 1;
+ case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
+ return is_a2xx(screen);
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
if (is_ir3(screen))
case PIPE_SHADER_FRAGMENT:
case PIPE_SHADER_VERTEX:
break;
+ case PIPE_SHADER_TESS_CTRL:
+ case PIPE_SHADER_TESS_EVAL:
+ case PIPE_SHADER_GEOMETRY:
+ if (is_a6xx(screen))
+ break;
+ return 0;
case PIPE_SHADER_COMPUTE:
if (has_compute(screen))
break;
return 0;
- case PIPE_SHADER_GEOMETRY:
- /* maye we could emulate.. */
- return 0;
default:
DBG("unknown shader type %d", shader);
return 0;
* everything is just normal registers. This is just temporary
* hack until load_input/store_output handle arrays in a similar
* way as load_var/store_var..
+ *
+ * For tessellation stages, inputs are loaded using ldlw or ldg, both
+ * of which support indirection.
*/
- return 0;
+ return shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL;
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
/* a2xx compiler doesn't handle indirect: */
case PIPE_SHADER_CAP_INT64_ATOMICS:
return 0;
case PIPE_SHADER_CAP_FP16:
- return 0;
+ return ((is_a5xx(screen) || is_a6xx(screen)) &&
+ !(fd_mesa_debug & FD_DBG_NOFP16));
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 16;
return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
- case PIPE_SHADER_CAP_SCALAR_ISA:
- return is_ir3(screen) ? 1 : 0;
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
if (is_a5xx(screen) || is_a6xx(screen)) {
case PIPE_COMPUTE_CAP_IR_TARGET:
if (ret)
- sprintf(ret, ir);
+ sprintf(ret, "%s", ir);
return strlen(ir) * sizeof(char);
case PIPE_COMPUTE_CAP_GRID_DIMENSION:
return ir2_get_compiler_options();
}
-boolean
+bool
fd_screen_bo_get_handle(struct pipe_screen *pscreen,
struct fd_bo *bo,
struct renderonly_scanout *scanout,
return fd_bo_get_name(bo, &whandle->handle) == 0;
} else if (whandle->type == WINSYS_HANDLE_TYPE_KMS) {
if (renderonly_get_handle(scanout, whandle))
- return TRUE;
+ return true;
whandle->handle = fd_bo_handle(bo);
- return TRUE;
+ return true;
} else if (whandle->type == WINSYS_HANDLE_TYPE_FD) {
whandle->handle = fd_bo_dmabuf(bo);
- return TRUE;
+ return true;
} else {
- return FALSE;
+ return false;
}
}
return bo;
}
+static void _fd_fence_ref(struct pipe_screen *pscreen,
+ struct pipe_fence_handle **ptr,
+ struct pipe_fence_handle *pfence)
+{
+ fd_fence_ref(ptr, pfence);
+}
+
struct pipe_screen *
fd_screen_create(struct fd_device *dev, struct renderonly *ro)
{
case 430:
fd4_screen_init(pscreen);
break;
+ case 510:
case 530:
+ case 540:
fd5_screen_init(pscreen);
break;
+ case 618:
case 630:
+ case 640:
fd6_screen_init(pscreen);
break;
default:
screen->num_vsc_pipes = 8;
}
+ if (fd_mesa_debug & FD_DBG_PERFC) {
+ screen->perfcntr_groups = fd_perfcntrs(screen->gpu_id,
+ &screen->num_perfcntr_groups);
+ }
+
/* NOTE: don't enable if we have too old of a kernel to support
* growable cmdstream buffers, since memory requirement for cmdstream
* buffers would be too much otherwise.
fd_resource_screen_init(pscreen);
fd_query_screen_init(pscreen);
+ fd_gmem_screen_init(pscreen);
pscreen->get_name = fd_screen_get_name;
pscreen->get_vendor = fd_screen_get_vendor;
pscreen->get_timestamp = fd_screen_get_timestamp;
- pscreen->fence_reference = fd_fence_ref;
+ pscreen->fence_reference = _fd_fence_ref;
pscreen->fence_finish = fd_fence_finish;
pscreen->fence_get_fd = fd_fence_get_fd;
pscreen->query_dmabuf_modifiers = fd_screen_query_dmabuf_modifiers;
- if (!screen->supported_modifiers) {
- static const uint64_t supported_modifiers[] = {
- DRM_FORMAT_MOD_LINEAR,
- };
-
- screen->supported_modifiers = supported_modifiers;
- screen->num_supported_modifiers = ARRAY_SIZE(supported_modifiers);
- }
-
slab_create_parent(&screen->transfer_pool, sizeof(struct fd_transfer), 16);
return pscreen;
projects / mesa.git / blobdiff