freedreno/a3xx/compiler: refactor trans_samp()
[mesa.git] / src / gallium / drivers / freedreno / freedreno_screen.c
index eada1af9892483037f6ff66f33670ca633732f1b..98509a08f5f5131f2a96907b26227b52e682ae54 100644 (file)
@@ -47,6 +47,7 @@
 #include "freedreno_screen.h"
 #include "freedreno_resource.h"
 #include "freedreno_fence.h"
+#include "freedreno_query.h"
 #include "freedreno_util.h"
 
 #include "fd2_screen.h"
@@ -62,12 +63,21 @@ static const struct debug_named_value debug_options[] = {
                {"dgmem",     FD_DBG_DGMEM,  "Mark all state dirty after GMEM tile pass"},
                {"dscis",     FD_DBG_DSCIS,  "Disable scissor optimization"},
                {"direct",    FD_DBG_DIRECT, "Force inline (SS_DIRECT) state loads"},
+               {"dbypass",   FD_DBG_DBYPASS,"Disable GMEM bypass"},
+               {"fraghalf",  FD_DBG_FRAGHALF, "Use half-precision in fragment shader"},
+               {"nobin",     FD_DBG_NOBIN,  "Disable hw binning"},
+               {"noopt",     FD_DBG_NOOPT , "Disable optimization passes in compiler"},
+               {"optmsgs",   FD_DBG_OPTMSGS,"Enable optimizater debug messages"},
+               {"optdump",   FD_DBG_OPTDUMP,"Dump shader DAG to .dot files"},
+               {"glsl130",   FD_DBG_GLSL130,"Temporary flag to enable GLSL 130 on a3xx+"},
                DEBUG_NAMED_VALUE_END
 };
 
 DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
 
 int fd_mesa_debug = 0;
+bool fd_binning_enabled = true;
+static bool glsl130 = false;
 
 static const char *
 fd_screen_get_name(struct pipe_screen *pscreen)
@@ -135,10 +145,13 @@ tables for things that differ if the delta is not too much..
 static int
 fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
 {
+       struct fd_screen *screen = fd_screen(pscreen);
+
        /* this is probably not totally correct.. but it's a start: */
        switch (param) {
        /* Supported features (boolean caps). */
        case PIPE_CAP_NPOT_TEXTURES:
+       case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
        case PIPE_CAP_TWO_SIDED_STENCIL:
        case PIPE_CAP_ANISOTROPIC_FILTER:
        case PIPE_CAP_POINT_SPRITE:
@@ -146,15 +159,12 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
        case PIPE_CAP_BLEND_EQUATION_SEPARATE:
        case PIPE_CAP_TEXTURE_SWIZZLE:
-       case PIPE_CAP_SHADER_STENCIL_EXPORT:
        case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
        case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
        case PIPE_CAP_SM3:
        case PIPE_CAP_SEAMLESS_CUBE_MAP:
-       case PIPE_CAP_PRIMITIVE_RESTART:
-       case PIPE_CAP_CONDITIONAL_RENDER:
        case PIPE_CAP_TEXTURE_BARRIER:
        case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
        case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
@@ -169,15 +179,18 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_USER_CONSTANT_BUFFERS:
                return 1;
 
+       case PIPE_CAP_SHADER_STENCIL_EXPORT:
        case PIPE_CAP_TGSI_TEXCOORD:
        case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
+       case PIPE_CAP_CONDITIONAL_RENDER:
+       case PIPE_CAP_PRIMITIVE_RESTART:
                return 0;
 
        case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
                return 256;
 
        case PIPE_CAP_GLSL_FEATURE_LEVEL:
-               return 120;
+               return ((screen->gpu_id >= 300) && glsl130) ? 130 : 120;
 
        /* Unsupported features. */
        case PIPE_CAP_INDEP_BLEND_ENABLE:
@@ -186,7 +199,6 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
        case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
        case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
-       case PIPE_CAP_SCALED_RESOLVE:
        case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
        case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
        case PIPE_CAP_VERTEX_COLOR_CLAMPED:
@@ -194,6 +206,14 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_USER_INDEX_BUFFERS:
        case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
        case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
+       case PIPE_CAP_TGSI_VS_LAYER:
+       case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
+       case PIPE_CAP_TEXTURE_GATHER_SM5:
+       case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
+       case PIPE_CAP_FAKE_SW_MSAA:
+       case PIPE_CAP_TEXTURE_QUERY_LOD:
+       case PIPE_CAP_SAMPLE_SHADING:
+       case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
                return 0;
 
        /* Stream output. */
@@ -203,6 +223,11 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
        case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
                return 0;
 
+       /* Geometry shader output, unsupported. */
+       case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
+       case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
+               return 0;
+
        /* Texturing. */
        case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
        case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
@@ -210,28 +235,32 @@ fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
                return MAX_MIP_LEVELS;
        case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
                return 9192;
-       case PIPE_CAP_MAX_COMBINED_SAMPLERS:
-               return 20;
 
        /* Render targets. */
        case PIPE_CAP_MAX_RENDER_TARGETS:
                return 1;
 
-       /* Timer queries. */
+       /* Queries. */
        case PIPE_CAP_QUERY_TIME_ELAPSED:
-       case PIPE_CAP_OCCLUSION_QUERY:
        case PIPE_CAP_QUERY_TIMESTAMP:
                return 0;
+       case PIPE_CAP_OCCLUSION_QUERY:
+               return (screen->gpu_id >= 300) ? 1 : 0;
 
+       case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
        case PIPE_CAP_MIN_TEXEL_OFFSET:
                return -8;
 
+       case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
        case PIPE_CAP_MAX_TEXEL_OFFSET:
                return 7;
 
        case PIPE_CAP_ENDIANNESS:
                return PIPE_ENDIAN_LITTLE;
 
+       case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
+               return 64;
+
        default:
                DBG("unknown param %d", param);
                return 0;
@@ -266,6 +295,8 @@ static int
 fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
                enum pipe_shader_cap param)
 {
+       struct fd_screen *screen = fd_screen(pscreen);
+
        switch(shader)
        {
        case PIPE_SHADER_FRAGMENT:
@@ -290,15 +321,15 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
        case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
                return 8; /* XXX */
        case PIPE_SHADER_CAP_MAX_INPUTS:
-               return 32;
+               return 16;
        case PIPE_SHADER_CAP_MAX_TEMPS:
-               return 256; /* Max native temporaries. */
+               return 64; /* Max native temporaries. */
        case PIPE_SHADER_CAP_MAX_ADDRS:
-               /* XXX Isn't this equal to TEMPS? */
                return 1; /* Max native address registers */
        case PIPE_SHADER_CAP_MAX_CONSTS:
+               return (screen->gpu_id >= 300) ? 1024 : 64;
        case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
-               return 64;
+               return 1;
        case PIPE_SHADER_CAP_MAX_PREDS:
                return 0; /* nothing uses this */
        case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
@@ -311,9 +342,14 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
        case PIPE_SHADER_CAP_SUBROUTINES:
                return 0;
        case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
+               return 1;
        case PIPE_SHADER_CAP_INTEGERS:
-               return 0;
+               /* we should be able to support this on a3xx, but not
+                * implemented yet:
+                */
+               return ((screen->gpu_id >= 300) && glsl130) ? 1 : 0;
        case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
+       case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
                return 16;
        case PIPE_SHADER_CAP_PREFERRED_IR:
                return PIPE_SHADER_IR_TGSI;
@@ -350,6 +386,11 @@ fd_screen_bo_from_handle(struct pipe_screen *pscreen,
        struct fd_screen *screen = fd_screen(pscreen);
        struct fd_bo *bo;
 
+       if (whandle->type != DRM_API_HANDLE_TYPE_SHARED) {
+               DBG("Attempt to import unsupported handle type %d", whandle->type);
+               return NULL;
+       }
+
        bo = fd_bo_from_name(screen->dev, whandle->handle);
        if (!bo) {
                DBG("ref name 0x%08x failed", whandle->handle);
@@ -370,6 +411,11 @@ fd_screen_create(struct fd_device *dev)
 
        fd_mesa_debug = debug_get_option_fd_mesa_debug();
 
+       if (fd_mesa_debug & FD_DBG_NOBIN)
+               fd_binning_enabled = false;
+
+       glsl130 = !!(fd_mesa_debug & FD_DBG_GLSL130);
+
        if (!screen)
                return NULL;
 
@@ -418,6 +464,7 @@ fd_screen_create(struct fd_device *dev)
                fd2_screen_init(pscreen);
                break;
        case 320:
+       case 330:
                fd3_screen_init(pscreen);
                break;
        default:
@@ -431,6 +478,7 @@ fd_screen_create(struct fd_device *dev)
        pscreen->get_shader_param = fd_screen_get_shader_param;
 
        fd_resource_screen_init(pscreen);
+       fd_query_screen_init(pscreen);
 
        pscreen->get_name = fd_screen_get_name;
        pscreen->get_vendor = fd_screen_get_vendor;