#include "util/u_memory.h"
#include "util/u_inlines.h"
-#include "util/u_format.h"
-#include "util/u_format_s3tc.h"
+#include "util/format/u_format.h"
+#include "util/format/u_format_s3tc.h"
#include "util/u_screen.h"
#include "util/u_string.h"
#include "util/u_debug.h"
#include "util/os_time.h"
+#include "drm-uapi/drm_fourcc.h"
#include <errno.h>
#include <stdio.h>
#include <stdlib.h>
#include "ir3/ir3_nir.h"
+#include "a2xx/ir2.h"
/* XXX this should go away */
#include "state_tracker/drm_driver.h"
{"nobypass", FD_DBG_NOBYPASS, "Disable GMEM bypass"},
{"fraghalf", FD_DBG_FRAGHALF, "Use half-precision in fragment shader"},
{"nobin", FD_DBG_NOBIN, "Disable hw binning"},
+ {"nogmem", FD_DBG_NOGMEM, "Disable GMEM rendering (bypass only)"},
{"glsl120", FD_DBG_GLSL120,"Temporary flag to force GLSL 1.20 (rather than 1.30) on a3xx+"},
{"shaderdb", FD_DBG_SHADERDB, "Enable shaderdb output"},
{"flush", FD_DBG_FLUSH, "Force flush after every draw"},
{"noindirect",FD_DBG_NOINDR, "Disable hw indirect draws (emulate on CPU)"},
{"noblit", FD_DBG_NOBLIT, "Disable blitter (fallback to generic blit path)"},
{"hiprio", FD_DBG_HIPRIO, "Force high-priority context"},
- {"ttile", FD_DBG_TTILE, "Enable texture tiling (a5xx)"},
+ {"ttile", FD_DBG_TTILE, "Enable texture tiling (a2xx/a3xx/a5xx)"},
{"perfcntrs", FD_DBG_PERFC, "Expose performance counters"},
- {"softpin", FD_DBG_SOFTPIN,"Enable softpin command submission (experimental)"},
+ {"noubwc", FD_DBG_NOUBWC, "Disable UBWC for all internal buffers"},
DEBUG_NAMED_VALUE_END
};
fd_screen_get_name(struct pipe_screen *pscreen)
{
static char buffer[128];
- util_snprintf(buffer, sizeof(buffer), "FD%03d",
+ snprintf(buffer, sizeof(buffer), "FD%03d",
fd_screen(pscreen)->device_id);
return buffer;
}
if (screen->dev)
fd_device_del(screen->dev);
+ if (screen->ro)
+ FREE(screen->ro);
+
fd_bc_fini(&screen->batch_cache);
slab_destroy_parent(&screen->transfer_pool);
case PIPE_CAP_INVALIDATE_BUFFER:
return 1;
+ case PIPE_CAP_PACKED_UNIFORMS:
+ return !is_a2xx(screen);
+
+ case PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR:
+ case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
+ return screen->has_robustness;
+
case PIPE_CAP_VERTEXID_NOBASE:
return is_a3xx(screen) || is_a4xx(screen);
case PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE:
return 0;
- case PIPE_CAP_SM3:
+ case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
+ case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
+ case PIPE_CAP_VERTEX_SHADER_SATURATE:
case PIPE_CAP_PRIMITIVE_RESTART:
case PIPE_CAP_TGSI_INSTANCEID:
case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
if (is_a3xx(screen)) return 16;
if (is_a4xx(screen)) return 32;
if (is_a5xx(screen)) return 32;
- if (is_a6xx(screen)) return 32;
+ if (is_a6xx(screen)) return 64;
return 0;
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
/* We could possibly emulate more by pretending 2d/rect textures and
if (is_a3xx(screen)) return 8192;
if (is_a4xx(screen)) return 16384;
if (is_a5xx(screen)) return 16384;
- if (is_a6xx(screen)) return 16384;
+ if (is_a6xx(screen)) return 1 << 27;
return 0;
case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
return 120;
return is_ir3(screen) ? 140 : 120;
+ case PIPE_CAP_ESSL_FEATURE_LEVEL:
+ /* we can probably enable 320 for a5xx too, but need to test: */
+ if (is_a6xx(screen)) return 320;
+ if (is_a5xx(screen)) return 310;
+ if (is_ir3(screen)) return 300;
+ return 120;
+
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
- if (is_a5xx(screen) || is_a6xx(screen))
- return 4;
+ if (is_a6xx(screen)) return 64;
+ if (is_a5xx(screen)) return 4;
return 0;
case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
case PIPE_CAP_FORCE_PERSAMPLE_INTERP:
return 0;
- case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION:
+ case PIPE_CAP_FBFETCH:
+ if (fd_device_version(screen->dev) >= FD_VERSION_GMEM_BASE &&
+ is_a6xx(screen))
+ return 1;
+ return 0;
+ case PIPE_CAP_SAMPLE_SHADING:
+ if (is_a6xx(screen)) return 1;
return 0;
case PIPE_CAP_CONTEXT_PRIORITY_MASK:
case PIPE_CAP_MAX_VIEWPORTS:
return 1;
+ case PIPE_CAP_MAX_VARYINGS:
+ return 16;
+
+ case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
+ /* We don't really have a limit on this, it all goes into the main
+ * memory buffer. Needs to be at least 120 / 4 (minimum requirement
+ * for GL_MAX_TESS_PATCH_COMPONENTS).
+ */
+ return 128;
+
+ case PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET:
+ return 64 * 1024 * 1024;
+
case PIPE_CAP_SHAREABLE_SHADERS:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
/* manage the variants for these ourself, to avoid breaking precompile: */
return 1;
return 0;
+ /* Geometry shaders.. */
+ case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
+ return 512;
+ case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
+ return 2048;
+ case PIPE_CAP_MAX_GS_INVOCATIONS:
+ return 32;
+
/* Stream output. */
case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
if (is_ir3(screen))
return 0;
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
+ case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
if (is_ir3(screen))
return 1;
return 0;
+ case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
+ return 1;
+ case PIPE_CAP_TGSI_FS_POINT_IS_SYSVAL:
+ return is_a2xx(screen);
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
if (is_ir3(screen))
return 0;
/* Texturing. */
- case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
+ case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
+ return 1 << (MAX_MIP_LEVELS - 1);
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return MAX_MIP_LEVELS;
case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
case PIPE_SHADER_FRAGMENT:
case PIPE_SHADER_VERTEX:
break;
+ case PIPE_SHADER_TESS_CTRL:
+ case PIPE_SHADER_TESS_EVAL:
+ case PIPE_SHADER_GEOMETRY:
+ if (is_a6xx(screen))
+ break;
+ return 0;
case PIPE_SHADER_COMPUTE:
if (has_compute(screen))
break;
return 0;
- case PIPE_SHADER_GEOMETRY:
- /* maye we could emulate.. */
- return 0;
default:
DBG("unknown shader type %d", shader);
return 0;
* everything is just normal registers. This is just temporary
* hack until load_input/store_output handle arrays in a similar
* way as load_var/store_var..
+ *
+ * For tessellation stages, inputs are loaded using ldlw or ldg, both
+ * of which support indirection.
*/
- return 0;
+ return shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL;
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
/* a2xx compiler doesn't handle indirect: */
case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 16;
case PIPE_SHADER_CAP_PREFERRED_IR:
- if (is_ir3(screen))
- return PIPE_SHADER_IR_NIR;
- return PIPE_SHADER_IR_TGSI;
+ return PIPE_SHADER_IR_NIR;
case PIPE_SHADER_CAP_SUPPORTED_IRS:
- if (is_ir3(screen)) {
- return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
- } else {
- return (1 << PIPE_SHADER_IR_TGSI);
- }
- return 0;
+ return (1 << PIPE_SHADER_IR_NIR) | (1 << PIPE_SHADER_IR_TGSI);
case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
return 32;
- case PIPE_SHADER_CAP_SCALAR_ISA:
- return is_ir3(screen) ? 1 : 0;
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
if (is_a5xx(screen) || is_a6xx(screen)) {
case PIPE_COMPUTE_CAP_IR_TARGET:
if (ret)
- sprintf(ret, ir);
+ sprintf(ret, "%s", ir);
return strlen(ir) * sizeof(char);
case PIPE_COMPUTE_CAP_GRID_DIMENSION:
if (is_ir3(screen))
return ir3_get_compiler_options(screen->compiler);
- return NULL;
+ return ir2_get_compiler_options();
}
-boolean
+bool
fd_screen_bo_get_handle(struct pipe_screen *pscreen,
struct fd_bo *bo,
+ struct renderonly_scanout *scanout,
unsigned stride,
struct winsys_handle *whandle)
{
if (whandle->type == WINSYS_HANDLE_TYPE_SHARED) {
return fd_bo_get_name(bo, &whandle->handle) == 0;
} else if (whandle->type == WINSYS_HANDLE_TYPE_KMS) {
+ if (renderonly_get_handle(scanout, whandle))
+ return true;
whandle->handle = fd_bo_handle(bo);
- return TRUE;
+ return true;
} else if (whandle->type == WINSYS_HANDLE_TYPE_FD) {
whandle->handle = fd_bo_dmabuf(bo);
- return TRUE;
+ return true;
} else {
- return FALSE;
+ return false;
+ }
+}
+
+static void
+fd_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
+ enum pipe_format format,
+ int max, uint64_t *modifiers,
+ unsigned int *external_only,
+ int *count)
+{
+ struct fd_screen *screen = fd_screen(pscreen);
+ int i, num = 0;
+
+ max = MIN2(max, screen->num_supported_modifiers);
+
+ if (!max) {
+ max = screen->num_supported_modifiers;
+ external_only = NULL;
+ modifiers = NULL;
}
+
+ for (i = 0; i < max; i++) {
+ if (modifiers)
+ modifiers[num] = screen->supported_modifiers[i];
+
+ if (external_only)
+ external_only[num] = 0;
+
+ num++;
+ }
+
+ *count = num;
}
struct fd_bo *
return bo;
}
+static void _fd_fence_ref(struct pipe_screen *pscreen,
+ struct pipe_fence_handle **ptr,
+ struct pipe_fence_handle *pfence)
+{
+ fd_fence_ref(ptr, pfence);
+}
+
struct pipe_screen *
-fd_screen_create(struct fd_device *dev)
+fd_screen_create(struct fd_device *dev, struct renderonly *ro)
{
struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
struct pipe_screen *pscreen;
screen->dev = dev;
screen->refcnt = 1;
+ if (ro) {
+ screen->ro = renderonly_dup(ro);
+ if (!screen->ro) {
+ DBG("could not create renderonly object");
+ goto fail;
+ }
+ }
+
// maybe this should be in context?
screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
if (!screen->pipe) {
}
screen->gmemsize_bytes = val;
+ if (fd_device_version(dev) >= FD_VERSION_GMEM_BASE) {
+ fd_pipe_get_param(screen->pipe, FD_GMEM_BASE, &screen->gmem_base);
+ }
+
if (fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val)) {
DBG("could not get device-id");
goto fail;
screen->priority_mask = (1 << val) - 1;
}
+ if ((fd_device_version(dev) >= FD_VERSION_ROBUSTNESS) &&
+ (fd_pipe_get_param(screen->pipe, FD_PP_PGTABLE, &val) == 0)) {
+ screen->has_robustness = val;
+ }
+
struct sysinfo si;
sysinfo(&si);
screen->ram_size = si.totalram;
case 430:
fd4_screen_init(pscreen);
break;
+ case 510:
case 530:
+ case 540:
fd5_screen_init(pscreen);
break;
+ case 618:
case 630:
+ case 640:
fd6_screen_init(pscreen);
break;
default:
screen->num_vsc_pipes = 8;
}
- /* NOTE: don't enable reordering on a2xx, since completely untested.
- * Also, don't enable if we have too old of a kernel to support
+ if (fd_mesa_debug & FD_DBG_PERFC) {
+ screen->perfcntr_groups = fd_perfcntrs(screen->gpu_id,
+ &screen->num_perfcntr_groups);
+ }
+
+ /* NOTE: don't enable if we have too old of a kernel to support
* growable cmdstream buffers, since memory requirement for cmdstream
* buffers would be too much otherwise.
*/
- if ((screen->gpu_id >= 300) && (fd_device_version(dev) >= FD_VERSION_UNLIMITED_CMDS))
+ if (fd_device_version(dev) >= FD_VERSION_UNLIMITED_CMDS)
screen->reorder = !(fd_mesa_debug & FD_DBG_INORDER);
fd_bc_init(&screen->batch_cache);
pscreen->get_timestamp = fd_screen_get_timestamp;
- pscreen->fence_reference = fd_fence_ref;
+ pscreen->fence_reference = _fd_fence_ref;
pscreen->fence_finish = fd_fence_finish;
pscreen->fence_get_fd = fd_fence_get_fd;
+ pscreen->query_dmabuf_modifiers = fd_screen_query_dmabuf_modifiers;
+
+ if (!screen->supported_modifiers) {
+ static const uint64_t supported_modifiers[] = {
+ DRM_FORMAT_MOD_LINEAR,
+ };
+
+ screen->supported_modifiers = supported_modifiers;
+ screen->num_supported_modifiers = ARRAY_SIZE(supported_modifiers);
+ }
+
slab_create_parent(&screen->transfer_pool, sizeof(struct fd_transfer), 16);
return pscreen;
projects / mesa.git / blobdiff