#include "drm/freedreno_drmif.h"
#include "drm/freedreno_ringbuffer.h"
+#include "perfcntrs/freedreno_perfcntr.h"
#include "pipe/p_screen.h"
+#include "util/debug.h"
#include "util/u_memory.h"
#include "util/slab.h"
-#include "os/os_thread.h"
+#include "util/simple_mtx.h"
#include "renderonly/renderonly.h"
#include "freedreno_batch_cache.h"
-#include "freedreno_perfcntr.h"
+#include "freedreno_gmem.h"
#include "freedreno_util.h"
struct fd_bo;
struct fd_screen {
struct pipe_screen base;
- mtx_t lock;
+ struct list_head context_list;
+
+ simple_mtx_t lock;
/* it would be tempting to use pipe_reference here, but that
* really doesn't work well if it isn't the first member of
struct slab_parent_pool transfer_pool;
+ uint64_t gmem_base;
uint32_t gmemsize_bytes;
uint32_t device_id;
uint32_t gpu_id; /* 220, 305, etc */
uint32_t max_freq;
uint32_t ram_size;
uint32_t max_rts; /* max # of render targets */
- uint32_t gmem_alignw, gmem_alignh;
+ uint32_t gmem_alignw, gmem_alignh; /* gmem load/store granularity */
+ uint32_t tile_alignw, tile_alignh; /* alignment for tile sizes */
uint32_t num_vsc_pipes;
uint32_t priority_mask;
bool has_timestamp;
+ bool has_robustness;
+ bool has_syncobj;
unsigned num_perfcntr_groups;
const struct fd_perfcntr_group *perfcntr_groups;
*/
struct fd_pipe *pipe;
- uint32_t (*fill_ubwc_buffer_sizes)(struct fd_resource *rsc);
uint32_t (*setup_slices)(struct fd_resource *rsc);
unsigned (*tile_mode)(const struct pipe_resource *prsc);
+ int (*layout_resource_for_modifier)(struct fd_resource *rsc, uint64_t modifier);
+
+ /* indirect-branch emit: */
+ void (*emit_ib)(struct fd_ringbuffer *ring, struct fd_ringbuffer *target);
+
+ /* simple gpu "memcpy": */
+ void (*mem_to_mem)(struct fd_ringbuffer *ring, struct pipe_resource *dst,
+ unsigned dst_off, struct pipe_resource *src, unsigned src_off,
+ unsigned sizedwords);
int64_t cpu_gpu_time_delta;
struct fd_batch_cache batch_cache;
+ struct fd_gmem_cache gmem_cache;
bool reorder;
const uint64_t *supported_modifiers;
struct renderonly *ro;
+
+ /* when BATCH_DEBUG is enabled, tracking for fd_batch's which are not yet
+ * freed:
+ */
+ struct set *live_batches;
};
static inline struct fd_screen *
return (struct fd_screen *)pscreen;
}
-boolean fd_screen_bo_get_handle(struct pipe_screen *pscreen,
+static inline void
+fd_screen_lock(struct fd_screen *screen)
+{
+ simple_mtx_lock(&screen->lock);
+}
+
+static inline void
+fd_screen_unlock(struct fd_screen *screen)
+{
+ simple_mtx_unlock(&screen->lock);
+}
+
+static inline void
+fd_screen_assert_locked(struct fd_screen *screen)
+{
+ simple_mtx_assert_locked(&screen->lock);
+}
+
+bool fd_screen_bo_get_handle(struct pipe_screen *pscreen,
struct fd_bo *bo,
struct renderonly_scanout *scanout,
unsigned stride,
return (screen->gpu_id >= 200) && (screen->gpu_id < 210);
}
+static inline boolean
+is_a2xx(struct fd_screen *screen)
+{
+ return (screen->gpu_id >= 200) && (screen->gpu_id < 300);
+}
+
/* is a3xx patch revision 0? */
/* TODO a306.0 probably doesn't need this.. be more clever?? */
static inline boolean
return (screen->gpu_id >= 600) && (screen->gpu_id < 700);
}
+static inline boolean
+is_a650(struct fd_screen *screen)
+{
+ return screen->gpu_id == 650;
+}
+
/* is it using the ir3 compiler (shader isa introduced with a3xx)? */
static inline boolean
is_ir3(struct fd_screen *screen)
static inline bool
has_compute(struct fd_screen *screen)
{
- return is_a5xx(screen);
+ return is_a5xx(screen) || is_a6xx(screen);
}
#endif /* FREEDRENO_SCREEN_H_ */