#include "freedreno_state.h"
#include "freedreno_context.h"
-#include "freedreno_zsa.h"
-#include "freedreno_rasterizer.h"
-#include "freedreno_blend.h"
-#include "freedreno_program.h"
#include "freedreno_resource.h"
#include "freedreno_texture.h"
#include "freedreno_gmem.h"
#include "freedreno_util.h"
+/* All the generic state handling.. In case of CSO's that are specific
+ * to the GPU version, when the bind and the delete are common they can
+ * go in here.
+ */
+
static void
fd_set_blend_color(struct pipe_context *pctx,
const struct pipe_blend_color *blend_color)
static void
fd_set_scissor_states(struct pipe_context *pctx,
- unsigned start_slot,
- unsigned num_scissors,
+ unsigned start_slot,
+ unsigned num_scissors,
const struct pipe_scissor_state *scissor)
{
struct fd_context *ctx = fd_context(pctx);
static void
fd_set_viewport_states(struct pipe_context *pctx,
- unsigned start_slot,
- unsigned num_viewports,
+ unsigned start_slot,
+ unsigned num_viewports,
const struct pipe_viewport_state *viewport)
{
struct fd_context *ctx = fd_context(pctx);
ctx->dirty |= FD_DIRTY_INDEXBUF;
}
-void
-fd_state_init(struct pipe_context *pctx)
+static void
+fd_blend_state_bind(struct pipe_context *pctx, void *hwcso)
{
- pctx->set_blend_color = fd_set_blend_color;
- pctx->set_stencil_ref = fd_set_stencil_ref;
- pctx->set_clip_state = fd_set_clip_state;
- pctx->set_sample_mask = fd_set_sample_mask;
- pctx->set_constant_buffer = fd_set_constant_buffer;
- pctx->set_framebuffer_state = fd_set_framebuffer_state;
- pctx->set_polygon_stipple = fd_set_polygon_stipple;
- pctx->set_scissor_states = fd_set_scissor_states;
- pctx->set_viewport_states = fd_set_viewport_states;
-
- pctx->set_vertex_buffers = fd_set_vertex_buffers;
- pctx->set_index_buffer = fd_set_index_buffer;
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->blend = hwcso;
+ ctx->dirty |= FD_DIRTY_BLEND;
}
-/* NOTE: just define the position for const regs statically.. the blob
- * driver doesn't seem to change these dynamically, and I can't really
- * think of a good reason to so..
- */
-#define VS_CONST_BASE 0x20
-#define PS_CONST_BASE 0x120
-
static void
-emit_constants(struct fd_ringbuffer *ring, uint32_t base,
- struct fd_constbuf_stateobj *constbuf,
- struct fd_shader_stateobj *shader)
+fd_blend_state_delete(struct pipe_context *pctx, void *hwcso)
{
- uint32_t enabled_mask = constbuf->enabled_mask;
- uint32_t start_base = base;
- unsigned i;
-
- // XXX TODO only emit dirty consts.. but we need to keep track if
- // they are clobbered by a clear, gmem2mem, or mem2gmem..
- constbuf->dirty_mask = enabled_mask;
-
- /* emit user constants: */
- while (enabled_mask) {
- unsigned index = ffs(enabled_mask) - 1;
- struct pipe_constant_buffer *cb = &constbuf->cb[index];
- unsigned size = align(cb->buffer_size, 4) / 4; /* size in dwords */
-
- // I expect that size should be a multiple of vec4's:
- assert(size == align(size, 4));
-
- /* hmm, sometimes we still seem to end up with consts bound,
- * even if shader isn't using them, which ends up overwriting
- * const reg's used for immediates.. this is a hack to work
- * around that:
- */
- if (shader && ((base - start_base) >= (shader->first_immediate * 4)))
- break;
-
- if (constbuf->dirty_mask & (1 << index)) {
- const uint32_t *dwords;
-
- if (cb->user_buffer) {
- dwords = cb->user_buffer;
- } else {
- struct fd_resource *rsc = fd_resource(cb->buffer);
- dwords = fd_bo_map(rsc->bo);
- }
-
- dwords = (uint32_t *)(((uint8_t *)dwords) + cb->buffer_offset);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, size + 1);
- OUT_RING(ring, base);
- for (i = 0; i < size; i++)
- OUT_RING(ring, *(dwords++));
-
- constbuf->dirty_mask &= ~(1 << index);
- }
-
- base += size;
- enabled_mask &= ~(1 << index);
- }
+ FREE(hwcso);
+}
- /* emit shader immediates: */
- if (shader) {
- for (i = 0; i < shader->num_immediates; i++) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 5);
- OUT_RING(ring, start_base + (4 * (shader->first_immediate + i)));
- OUT_RING(ring, shader->immediates[i].val[0]);
- OUT_RING(ring, shader->immediates[i].val[1]);
- OUT_RING(ring, shader->immediates[i].val[2]);
- OUT_RING(ring, shader->immediates[i].val[3]);
- base += 4;
- }
- }
+static void
+fd_rasterizer_state_bind(struct pipe_context *pctx, void *hwcso)
+{
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->rasterizer = hwcso;
+ ctx->dirty |= FD_DIRTY_RASTERIZER;
}
-/* this works at least for a220 and earlier.. if later gpu's gain more than
- * 32 texture units, might need to bump this up to uint64_t
- */
-typedef uint32_t texmask;
+static void
+fd_rasterizer_state_delete(struct pipe_context *pctx, void *hwcso)
+{
+ FREE(hwcso);
+}
-static texmask
-emit_texture(struct fd_ringbuffer *ring, struct fd_context *ctx,
- struct fd_texture_stateobj *tex, unsigned samp_id, texmask emitted)
+static void
+fd_zsa_state_bind(struct pipe_context *pctx, void *hwcso)
{
- unsigned const_idx = fd_get_const_idx(ctx, tex, samp_id);
- struct fd_sampler_stateobj *sampler;
- struct fd_pipe_sampler_view *view;
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->zsa = hwcso;
+ ctx->dirty |= FD_DIRTY_ZSA;
+}
- if (emitted & (1 << const_idx))
- return 0;
+static void
+fd_zsa_state_delete(struct pipe_context *pctx, void *hwcso)
+{
+ FREE(hwcso);
+}
- sampler = tex->samplers[samp_id];
- view = fd_pipe_sampler_view(tex->textures[samp_id]);
+static void *
+fd_vertex_state_create(struct pipe_context *pctx, unsigned num_elements,
+ const struct pipe_vertex_element *elements)
+{
+ struct fd_vertex_stateobj *so = CALLOC_STRUCT(fd_vertex_stateobj);
- OUT_PKT3(ring, CP_SET_CONSTANT, 7);
- OUT_RING(ring, 0x00010000 + (0x6 * const_idx));
+ if (!so)
+ return NULL;
- OUT_RING(ring, sampler->tex0 | view->tex0);
- OUT_RELOC(ring, view->tex_resource->bo, 0, view->fmt);
- OUT_RING(ring, view->tex2);
- OUT_RING(ring, sampler->tex3 | view->tex3);
- OUT_RING(ring, sampler->tex4);
- OUT_RING(ring, sampler->tex5);
+ memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
+ so->num_elements = num_elements;
- return (1 << const_idx);
+ return so;
}
static void
-emit_textures(struct fd_ringbuffer *ring, struct fd_context *ctx)
+fd_vertex_state_delete(struct pipe_context *pctx, void *hwcso)
{
- texmask emitted = 0;
- unsigned i;
-
- for (i = 0; i < ctx->verttex.num_samplers; i++)
- if (ctx->verttex.samplers[i])
- emitted |= emit_texture(ring, ctx, &ctx->verttex, i, emitted);
-
- for (i = 0; i < ctx->fragtex.num_samplers; i++)
- if (ctx->fragtex.samplers[i])
- emitted |= emit_texture(ring, ctx, &ctx->fragtex, i, emitted);
+ FREE(hwcso);
}
-void
-fd_emit_vertex_bufs(struct fd_ringbuffer *ring, uint32_t val,
- struct fd_vertex_buf *vbufs, uint32_t n)
+static void
+fd_vertex_state_bind(struct pipe_context *pctx, void *hwcso)
{
- unsigned i;
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 1 + (2 * n));
- OUT_RING(ring, (0x1 << 16) | (val & 0xffff));
- for (i = 0; i < n; i++) {
- struct fd_resource *rsc = fd_resource(vbufs[i].prsc);
- OUT_RELOC(ring, rsc->bo, vbufs[i].offset, 3);
- OUT_RING (ring, vbufs[i].size);
- }
+ struct fd_context *ctx = fd_context(pctx);
+ ctx->vtx = hwcso;
+ ctx->dirty |= FD_DIRTY_VTXSTATE;
}
void
-fd_state_emit(struct pipe_context *pctx, uint32_t dirty)
+fd_state_init(struct pipe_context *pctx)
{
- struct fd_context *ctx = fd_context(pctx);
- struct fd_ringbuffer *ring = ctx->ring;
-
- /* NOTE: we probably want to eventually refactor this so each state
- * object handles emitting it's own state.. although the mapping of
- * state to registers is not always orthogonal, sometimes a single
- * register contains bitfields coming from multiple state objects,
- * so not sure the best way to deal with that yet.
- */
-
- if (dirty & FD_DIRTY_SAMPLE_MASK) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_AA_MASK));
- OUT_RING(ring, ctx->sample_mask);
- }
-
- if (dirty & FD_DIRTY_ZSA) {
- struct pipe_stencil_ref *sr = &ctx->stencil_ref;
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_DEPTHCONTROL));
- OUT_RING(ring, ctx->zsa->rb_depthcontrol);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 4);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_STENCILREFMASK_BF));
- OUT_RING(ring, ctx->zsa->rb_stencilrefmask_bf |
- A2XX_RB_STENCILREFMASK_STENCILREF(sr->ref_value[1]));
- OUT_RING(ring, ctx->zsa->rb_stencilrefmask |
- A2XX_RB_STENCILREFMASK_STENCILREF(sr->ref_value[0]));
- OUT_RING(ring, ctx->zsa->rb_alpha_ref);
- }
-
- if (dirty & (FD_DIRTY_RASTERIZER | FD_DIRTY_FRAMEBUFFER)) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 3);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_CLIP_CNTL));
- OUT_RING(ring, ctx->rasterizer->pa_cl_clip_cntl);
- OUT_RING(ring, ctx->rasterizer->pa_su_sc_mode_cntl |
- A2XX_PA_SU_SC_MODE_CNTL_VTX_WINDOW_OFFSET_ENABLE);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 5);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SU_POINT_SIZE));
- OUT_RING(ring, ctx->rasterizer->pa_su_point_size);
- OUT_RING(ring, ctx->rasterizer->pa_su_point_minmax);
- OUT_RING(ring, ctx->rasterizer->pa_su_line_cntl);
- OUT_RING(ring, ctx->rasterizer->pa_sc_line_stipple);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 6);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SU_VTX_CNTL));
- OUT_RING(ring, ctx->rasterizer->pa_su_vtx_cntl);
- OUT_RING(ring, fui(1.0)); /* PA_CL_GB_VERT_CLIP_ADJ */
- OUT_RING(ring, fui(1.0)); /* PA_CL_GB_VERT_DISC_ADJ */
- OUT_RING(ring, fui(1.0)); /* PA_CL_GB_HORZ_CLIP_ADJ */
- OUT_RING(ring, fui(1.0)); /* PA_CL_GB_HORZ_DISC_ADJ */
- }
-
- if (dirty & FD_DIRTY_SCISSOR) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 3);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_SCISSOR_TL));
- OUT_RING(ring, xy2d(ctx->scissor.minx, /* PA_SC_WINDOW_SCISSOR_TL */
- ctx->scissor.miny));
- OUT_RING(ring, xy2d(ctx->scissor.maxx, /* PA_SC_WINDOW_SCISSOR_BR */
- ctx->scissor.maxy));
-
- ctx->max_scissor.minx = MIN2(ctx->max_scissor.minx, ctx->scissor.minx);
- ctx->max_scissor.miny = MIN2(ctx->max_scissor.miny, ctx->scissor.miny);
- ctx->max_scissor.maxx = MAX2(ctx->max_scissor.maxx, ctx->scissor.maxx);
- ctx->max_scissor.maxy = MAX2(ctx->max_scissor.maxy, ctx->scissor.maxy);
- }
-
- if (dirty & FD_DIRTY_VIEWPORT) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 7);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VPORT_XSCALE));
- OUT_RING(ring, fui(ctx->viewport.scale[0])); /* PA_CL_VPORT_XSCALE */
- OUT_RING(ring, fui(ctx->viewport.translate[0])); /* PA_CL_VPORT_XOFFSET */
- OUT_RING(ring, fui(ctx->viewport.scale[1])); /* PA_CL_VPORT_YSCALE */
- OUT_RING(ring, fui(ctx->viewport.translate[1])); /* PA_CL_VPORT_YOFFSET */
- OUT_RING(ring, fui(ctx->viewport.scale[2])); /* PA_CL_VPORT_ZSCALE */
- OUT_RING(ring, fui(ctx->viewport.translate[2])); /* PA_CL_VPORT_ZOFFSET */
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_CL_VTE_CNTL));
- OUT_RING(ring, A2XX_PA_CL_VTE_CNTL_VTX_W0_FMT |
- A2XX_PA_CL_VTE_CNTL_VPORT_X_SCALE_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_X_OFFSET_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_Y_SCALE_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_Y_OFFSET_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_Z_SCALE_ENA |
- A2XX_PA_CL_VTE_CNTL_VPORT_Z_OFFSET_ENA);
- }
-
- if (dirty & (FD_DIRTY_PROG | FD_DIRTY_VTXSTATE | FD_DIRTY_TEXSTATE)) {
- fd_program_validate(ctx);
- fd_program_emit(ring, &ctx->prog);
- }
-
- if (dirty & (FD_DIRTY_PROG | FD_DIRTY_CONSTBUF)) {
- emit_constants(ring, VS_CONST_BASE * 4,
- &ctx->constbuf[PIPE_SHADER_VERTEX],
- (dirty & FD_DIRTY_PROG) ? ctx->prog.vp : NULL);
- emit_constants(ring, PS_CONST_BASE * 4,
- &ctx->constbuf[PIPE_SHADER_FRAGMENT],
- (dirty & FD_DIRTY_PROG) ? ctx->prog.fp : NULL);
- }
-
- if (dirty & (FD_DIRTY_BLEND | FD_DIRTY_ZSA)) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COLORCONTROL));
- OUT_RING(ring, ctx->zsa->rb_colorcontrol | ctx->blend->rb_colorcontrol);
- }
+ pctx->set_blend_color = fd_set_blend_color;
+ pctx->set_stencil_ref = fd_set_stencil_ref;
+ pctx->set_clip_state = fd_set_clip_state;
+ pctx->set_sample_mask = fd_set_sample_mask;
+ pctx->set_constant_buffer = fd_set_constant_buffer;
+ pctx->set_framebuffer_state = fd_set_framebuffer_state;
+ pctx->set_polygon_stipple = fd_set_polygon_stipple;
+ pctx->set_scissor_states = fd_set_scissor_states;
+ pctx->set_viewport_states = fd_set_viewport_states;
- if (dirty & FD_DIRTY_BLEND) {
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_CONTROL));
- OUT_RING(ring, ctx->blend->rb_blendcontrol);
+ pctx->set_vertex_buffers = fd_set_vertex_buffers;
+ pctx->set_index_buffer = fd_set_index_buffer;
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_MASK));
- OUT_RING(ring, ctx->blend->rb_colormask);
- }
+ pctx->bind_blend_state = fd_blend_state_bind;
+ pctx->delete_blend_state = fd_blend_state_delete;
- if (dirty & (FD_DIRTY_VERTTEX | FD_DIRTY_FRAGTEX | FD_DIRTY_PROG))
- emit_textures(ring, ctx);
+ pctx->bind_rasterizer_state = fd_rasterizer_state_bind;
+ pctx->delete_rasterizer_state = fd_rasterizer_state_delete;
- ctx->dirty &= ~dirty;
-}
+ pctx->bind_depth_stencil_alpha_state = fd_zsa_state_bind;
+ pctx->delete_depth_stencil_alpha_state = fd_zsa_state_delete;
-/* emit per-context initialization:
- */
-void
-fd_state_emit_setup(struct pipe_context *pctx)
-{
- struct fd_context *ctx = fd_context(pctx);
- struct fd_ringbuffer *ring = ctx->ring;
-
- OUT_PKT0(ring, REG_A2XX_TP0_CHICKEN, 1);
- OUT_RING(ring, 0x00000002);
-
- OUT_PKT3(ring, CP_INVALIDATE_STATE, 1);
- OUT_RING(ring, 0x00007fff);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_VS_CONST));
- OUT_RING(ring, A2XX_SQ_VS_CONST_BASE(VS_CONST_BASE) |
- A2XX_SQ_VS_CONST_SIZE(0x100));
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_PS_CONST));
- OUT_RING(ring, A2XX_SQ_PS_CONST_BASE(PS_CONST_BASE) |
- A2XX_SQ_PS_CONST_SIZE(0xe0));
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 3);
- OUT_RING(ring, CP_REG(REG_A2XX_VGT_MAX_VTX_INDX));
- OUT_RING(ring, 0xffffffff); /* VGT_MAX_VTX_INDX */
- OUT_RING(ring, 0x00000000); /* VGT_MIN_VTX_INDX */
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET));
- OUT_RING(ring, 0x00000000);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL));
- OUT_RING(ring, 0x0000003b);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_CONTEXT_MISC));
- OUT_RING(ring, A2XX_SQ_CONTEXT_MISC_SC_SAMPLE_CNTL(CENTERS_ONLY));
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_INTERPOLATOR_CNTL));
- OUT_RING(ring, 0xffffffff);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_AA_CONFIG));
- OUT_RING(ring, 0x00000000);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_LINE_CNTL));
- OUT_RING(ring, 0x00000000);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_PA_SC_WINDOW_OFFSET));
- OUT_RING(ring, 0x00000000);
-
- // XXX we change this dynamically for draw/clear.. vs gmem<->mem..
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_MODECONTROL));
- OUT_RING(ring, A2XX_RB_MODECONTROL_EDRAM_MODE(COLOR_DEPTH));
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_SAMPLE_POS));
- OUT_RING(ring, 0x88888888);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_DEST_MASK));
- OUT_RING(ring, 0xffffffff);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COPY_DEST_INFO));
- OUT_RING(ring, A2XX_RB_COPY_DEST_INFO_FORMAT(COLORX_4_4_4_4) |
- A2XX_RB_COPY_DEST_INFO_WRITE_RED |
- A2XX_RB_COPY_DEST_INFO_WRITE_GREEN |
- A2XX_RB_COPY_DEST_INFO_WRITE_BLUE |
- A2XX_RB_COPY_DEST_INFO_WRITE_ALPHA);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 3);
- OUT_RING(ring, CP_REG(REG_A2XX_SQ_WRAPPING_0));
- OUT_RING(ring, 0x00000000); /* SQ_WRAPPING_0 */
- OUT_RING(ring, 0x00000000); /* SQ_WRAPPING_1 */
-
- OUT_PKT3(ring, CP_SET_DRAW_INIT_FLAGS, 1);
- OUT_RING(ring, 0x00000000);
-
- OUT_PKT3(ring, CP_WAIT_REG_EQ, 4);
- OUT_RING(ring, 0x000005d0);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x5f601000);
- OUT_RING(ring, 0x00000001);
-
- OUT_PKT0(ring, REG_A2XX_SQ_INST_STORE_MANAGMENT, 1);
- OUT_RING(ring, 0x00000180);
-
- OUT_PKT3(ring, CP_INVALIDATE_STATE, 1);
- OUT_RING(ring, 0x00000300);
-
- OUT_PKT3(ring, CP_SET_SHADER_BASES, 1);
- OUT_RING(ring, 0x80000180);
-
- /* not sure what this form of CP_SET_CONSTANT is.. */
- OUT_PKT3(ring, CP_SET_CONSTANT, 13);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x469c4000);
- OUT_RING(ring, 0x3f800000);
- OUT_RING(ring, 0x3f000000);
- OUT_RING(ring, 0x00000000);
- OUT_RING(ring, 0x40000000);
- OUT_RING(ring, 0x3f400000);
- OUT_RING(ring, 0x3ec00000);
- OUT_RING(ring, 0x3e800000);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 2);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_COLOR_MASK));
- OUT_RING(ring, A2XX_RB_COLOR_MASK_WRITE_RED |
- A2XX_RB_COLOR_MASK_WRITE_GREEN |
- A2XX_RB_COLOR_MASK_WRITE_BLUE |
- A2XX_RB_COLOR_MASK_WRITE_ALPHA);
-
- OUT_PKT3(ring, CP_SET_CONSTANT, 5);
- OUT_RING(ring, CP_REG(REG_A2XX_RB_BLEND_RED));
- OUT_RING(ring, 0x00000000); /* RB_BLEND_RED */
- OUT_RING(ring, 0x00000000); /* RB_BLEND_GREEN */
- OUT_RING(ring, 0x00000000); /* RB_BLEND_BLUE */
- OUT_RING(ring, 0x000000ff); /* RB_BLEND_ALPHA */
-
- fd_ringbuffer_flush(ring);
- fd_ringmarker_mark(ctx->draw_start);
+ pctx->create_vertex_elements_state = fd_vertex_state_create;
+ pctx->delete_vertex_elements_state = fd_vertex_state_delete;
+ pctx->bind_vertex_elements_state = fd_vertex_state_bind;
}
projects / mesa.git / blobdiff