-/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
-
/*
* Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
*
#ifndef FREEDRENO_UTIL_H_
#define FREEDRENO_UTIL_H_
-#include <freedreno_drmif.h>
-#include <freedreno_ringbuffer.h>
+#include "drm/freedreno_drmif.h"
+#include "drm/freedreno_ringbuffer.h"
#include "pipe/p_format.h"
#include "pipe/p_state.h"
#define A3XX_MAX_RENDER_TARGETS 4
#define A4XX_MAX_RENDER_TARGETS 8
#define A5XX_MAX_RENDER_TARGETS 8
+#define A6XX_MAX_RENDER_TARGETS 8
-#define MAX_RENDER_TARGETS A5XX_MAX_RENDER_TARGETS
+#define MAX_RENDER_TARGETS A6XX_MAX_RENDER_TARGETS
#define FD_DBG_MSGS 0x0001
#define FD_DBG_DISASM 0x0002
#define FD_DBG_NOBYPASS 0x0040
#define FD_DBG_FRAGHALF 0x0080
#define FD_DBG_NOBIN 0x0100
-#define FD_DBG_OPTMSGS 0x0200
+/* unused 0x0200 */
#define FD_DBG_GLSL120 0x0400
#define FD_DBG_SHADERDB 0x0800
#define FD_DBG_FLUSH 0x1000
#define FD_DBG_DEQP 0x2000
-#define FD_DBG_NIR 0x4000
-#define FD_DBG_INORDER 0x8000
-#define FD_DBG_BSTAT 0x10000
-#define FD_DBG_NOGROW 0x20000
-
+#define FD_DBG_INORDER 0x4000
+#define FD_DBG_BSTAT 0x8000
+#define FD_DBG_NOGROW 0x10000
+#define FD_DBG_LRZ 0x20000
+#define FD_DBG_NOINDR 0x40000
+#define FD_DBG_NOBLIT 0x80000
+#define FD_DBG_HIPRIO 0x100000
+#define FD_DBG_TTILE 0x200000
+#define FD_DBG_PERFC 0x400000
+#define FD_DBG_NOUBWC 0x800000
extern int fd_mesa_debug;
extern bool fd_binning_enabled;
(instances << 24);
}
+static inline uint32_t DRAW_A20X(enum pc_di_primtype prim_type,
+ enum pc_di_face_cull_sel faceness_cull_select,
+ enum pc_di_src_sel source_select, enum pc_di_index_size index_size,
+ bool pre_fetch_cull_enable,
+ bool grp_cull_enable,
+ uint16_t count)
+{
+ return (prim_type << 0) |
+ (source_select << 6) |
+ (faceness_cull_select << 8) |
+ ((index_size & 1) << 11) |
+ ((index_size >> 1) << 13) |
+ (pre_fetch_cull_enable << 14) |
+ (grp_cull_enable << 15) |
+ (count << 16);
+}
+
/* for tracking cmdstream positions that need to be patched: */
struct fd_cs_patch {
uint32_t *cs;
return true;
}
+/* Note sure if this is same on all gens, but seems to be same on the later
+ * gen's
+ */
+static inline unsigned
+fd_calc_guardband(unsigned x)
+{
+ float l = log2(x);
+ if (l <= 8)
+ return 511;
+ return 511 - ((l - 8) * 65);
+}
+
#define LOG_DWORDS 0
static inline void emit_marker(struct fd_ringbuffer *ring, int scratch_idx);
-static inline void emit_marker5(struct fd_ringbuffer *ring, int scratch_idx);
static inline void
OUT_RING(struct fd_ringbuffer *ring, uint32_t data)
{
if (LOG_DWORDS) {
DBG("ring[%p]: OUT_RING %04x: %08x", ring,
- (uint32_t)(ring->cur - ring->last_start), data);
+ (uint32_t)(ring->cur - ring->start), data);
}
fd_ringbuffer_emit(ring, data);
}
{
if (LOG_DWORDS) {
DBG("ring[%p]: OUT_RINGP %04x: %08x", ring,
- (uint32_t)(ring->cur - ring->last_start), data);
+ (uint32_t)(ring->cur - ring->start), data);
}
util_dynarray_append(buf, struct fd_cs_patch, ((struct fd_cs_patch){
.cs = ring->cur++,
*/
static inline void
-OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo,
- uint32_t offset, uint64_t or, int32_t shift)
+__out_reloc(struct fd_ringbuffer *ring, struct fd_bo *bo,
+ uint32_t offset, uint64_t or, int32_t shift, uint32_t flags)
{
if (LOG_DWORDS) {
DBG("ring[%p]: OUT_RELOC %04x: %p+%u << %d", ring,
- (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
+ (uint32_t)(ring->cur - ring->start), bo, offset, shift);
}
debug_assert(offset < fd_bo_size(bo));
- fd_ringbuffer_reloc2(ring, &(struct fd_reloc){
+ fd_ringbuffer_reloc(ring, &(struct fd_reloc){
.bo = bo,
- .flags = FD_RELOC_READ,
+ .flags = flags,
.offset = offset,
.or = or,
.shift = shift,
});
}
+static inline void
+OUT_RELOC(struct fd_ringbuffer *ring, struct fd_bo *bo,
+ uint32_t offset, uint64_t or, int32_t shift)
+{
+ __out_reloc(ring, bo, offset, or, shift, FD_RELOC_READ);
+}
+
static inline void
OUT_RELOCW(struct fd_ringbuffer *ring, struct fd_bo *bo,
uint32_t offset, uint64_t or, int32_t shift)
{
- if (LOG_DWORDS) {
- DBG("ring[%p]: OUT_RELOCW %04x: %p+%u << %d", ring,
- (uint32_t)(ring->cur - ring->last_start), bo, offset, shift);
- }
- debug_assert(offset < fd_bo_size(bo));
- fd_ringbuffer_reloc2(ring, &(struct fd_reloc){
- .bo = bo,
- .flags = FD_RELOC_READ | FD_RELOC_WRITE,
- .offset = offset,
- .or = or,
- .shift = shift,
- .orhi = or >> 32,
- });
+ __out_reloc(ring, bo, offset, or, shift, FD_RELOC_READ | FD_RELOC_WRITE);
}
-static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords)
+static inline void
+OUT_RELOCD(struct fd_ringbuffer *ring, struct fd_bo *bo,
+ uint32_t offset, uint64_t or, int32_t shift)
{
- if (ring->cur + ndwords >= ring->end)
- fd_ringbuffer_grow(ring, ndwords);
+ __out_reloc(ring, bo, offset, or, shift, FD_RELOC_READ | FD_RELOC_DUMP);
}
-static inline uint32_t
-__gpu_id(struct fd_ringbuffer *ring)
+static inline void
+OUT_RB(struct fd_ringbuffer *ring, struct fd_ringbuffer *target)
{
- uint64_t val;
- fd_pipe_get_param(ring->pipe, FD_GPU_ID, &val);
- return val;
+ fd_ringbuffer_emit_reloc_ring_full(ring, target, 0);
+}
+
+static inline void BEGIN_RING(struct fd_ringbuffer *ring, uint32_t ndwords)
+{
+ if (ring->cur + ndwords > ring->end)
+ fd_ringbuffer_grow(ring, ndwords);
}
static inline void
OUT_PKT0(struct fd_ringbuffer *ring, uint16_t regindx, uint16_t cnt)
{
- debug_assert(__gpu_id(ring) < 500);
BEGIN_RING(ring, cnt+1);
OUT_RING(ring, CP_TYPE0_PKT | ((cnt-1) << 16) | (regindx & 0x7FFF));
}
static inline void
OUT_PKT2(struct fd_ringbuffer *ring)
{
- debug_assert(__gpu_id(ring) < 500);
BEGIN_RING(ring, 1);
OUT_RING(ring, CP_TYPE2_PKT);
}
static inline void
OUT_PKT3(struct fd_ringbuffer *ring, uint8_t opcode, uint16_t cnt)
{
- debug_assert(__gpu_id(ring) < 500);
BEGIN_RING(ring, cnt+1);
OUT_RING(ring, CP_TYPE3_PKT | ((cnt-1) << 16) | ((opcode & 0xFF) << 8));
}
static inline void
__OUT_IB(struct fd_ringbuffer *ring, bool prefetch, struct fd_ringbuffer *target)
{
- unsigned count = fd_ringbuffer_cmd_count(target);
+ if (target->cur == target->start)
+ return;
- debug_assert(__gpu_id(ring) < 500);
+ unsigned count = fd_ringbuffer_cmd_count(target);
/* for debug after a lock up, write a unique counter value
* to scratch6 for each IB, to make it easier to match up
static inline void
__OUT_IB5(struct fd_ringbuffer *ring, struct fd_ringbuffer *target)
{
- unsigned count = fd_ringbuffer_cmd_count(target);
+ if (target->cur == target->start)
+ return;
- /* for debug after a lock up, write a unique counter value
- * to scratch6 for each IB, to make it easier to match up
- * register dumps to cmdstream. The combination of IB and
- * DRAW (scratch7) is enough to "triangulate" the particular
- * draw that caused lockup.
- */
- emit_marker5(ring, 6);
+ unsigned count = fd_ringbuffer_cmd_count(target);
for (unsigned i = 0; i < count; i++) {
uint32_t dwords;
assert(dwords > 0);
OUT_RING(ring, dwords);
}
-
- emit_marker5(ring, 6);
}
/* CP_SCRATCH_REG4 is used to hold base address for query results: */
OUT_RING(ring, ++marker_cnt);
}
-static inline void
-emit_marker5(struct fd_ringbuffer *ring, int scratch_idx)
-{
- extern unsigned marker_cnt;
-//XXX unsigned reg = REG_A5XX_CP_SCRATCH_REG(scratch_idx);
- unsigned reg = 0x00000b78 + scratch_idx;
- assert(reg != HW_QUERY_BASE_REG);
- if (reg == HW_QUERY_BASE_REG)
- return;
- OUT_WFI5(ring);
- OUT_PKT4(ring, reg, 1);
- OUT_RING(ring, ++marker_cnt);
- OUT_WFI5(ring);
-}
-
-/* helper to get numeric value from environment variable.. mostly
- * just leaving this here because it is helpful to brute-force figure
- * out unknown formats, etc, which blob driver does not support:
- */
-static inline uint32_t env2u(const char *envvar)
-{
- char *str = getenv(envvar);
- if (str)
- return strtoul(str, NULL, 0);
- return 0;
-}
-
static inline uint32_t
pack_rgba(enum pipe_format format, const float *rgba)
{
#define foreach_bit(b, mask) \
for (uint32_t _m = (mask); _m && ({(b) = u_bit_scan(&_m); 1;});)
+
+#define BIT(bit) (1u << bit)
+
+/*
+ * a3xx+ helpers:
+ */
+
+static inline enum a3xx_msaa_samples
+fd_msaa_samples(unsigned samples)
+{
+ switch (samples) {
+ default:
+ debug_assert(0);
+ case 0:
+ case 1: return MSAA_ONE;
+ case 2: return MSAA_TWO;
+ case 4: return MSAA_FOUR;
+ case 8: return MSAA_EIGHT;
+ }
+}
+
+/*
+ * a4xx+ helpers:
+ */
+
+static inline enum a4xx_state_block
+fd4_stage2shadersb(gl_shader_stage type)
+{
+ switch (type) {
+ case MESA_SHADER_VERTEX:
+ return SB4_VS_SHADER;
+ case MESA_SHADER_FRAGMENT:
+ return SB4_FS_SHADER;
+ case MESA_SHADER_COMPUTE:
+ case MESA_SHADER_KERNEL:
+ return SB4_CS_SHADER;
+ default:
+ unreachable("bad shader type");
+ return ~0;
+ }
+}
+
+static inline enum a4xx_index_size
+fd4_size2indextype(unsigned index_size)
+{
+ switch (index_size) {
+ case 1: return INDEX4_SIZE_8_BIT;
+ case 2: return INDEX4_SIZE_16_BIT;
+ case 4: return INDEX4_SIZE_32_BIT;
+ }
+ DBG("unsupported index size: %d", index_size);
+ assert(0);
+ return INDEX4_SIZE_32_BIT;
+}
+
#endif /* FREEDRENO_UTIL_H_ */
projects / mesa.git / blobdiff