gallivm: work around slow code generated for interleaving 128bit vectors

[mesa.git] / src / gallium / drivers / freedreno / freedreno_vbo.c

diff --git a/src/gallium/drivers/freedreno/freedreno_vbo.c b/src/gallium/drivers/freedreno/freedreno_vbo.c
index fc33539e213459494d4c1aece55f9c26b646f708..fe32d56f2226364f5e356079ea70b85341f4c498 100644 (file)
--- a/src/gallium/drivers/freedreno/freedreno_vbo.c
+++ b/src/gallium/drivers/freedreno/freedreno_vbo.c
@@ -65,7 +65,7 @@ fd_vertex_state_bind(struct pipe_context *pctx, void *hwcso)
 {
        struct fd_context *ctx = fd_context(pctx);
        ctx->vtx = hwcso;
-       ctx->dirty |= FD_DIRTY_VTX;
+       ctx->dirty |= FD_DIRTY_VTXSTATE;
 }
 
 static void
@@ -141,7 +141,7 @@ static void
 fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
 {
        struct fd_context *ctx = fd_context(pctx);
-       struct pipe_framebuffer_state *fb = &ctx->framebuffer.base;
+       struct pipe_framebuffer_state *fb = &ctx->framebuffer;
        struct fd_ringbuffer *ring = ctx->ring;
        struct fd_bo *idx_bo = NULL;
        enum pc_di_index_size idx_type = INDEX_SIZE_IGN;
@@ -149,6 +149,12 @@ fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
        uint32_t idx_size, idx_offset;
        unsigned buffers;
 
+       /* if we supported transform feedback, we'd have to disable this: */
+       if (((ctx->scissor.maxx - ctx->scissor.minx) *
+                       (ctx->scissor.maxy - ctx->scissor.miny)) == 0) {
+               return;
+       }
+
        ctx->needs_flush = true;
 
        if (info->indexed) {
@@ -187,20 +193,21 @@ fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
        /* and any buffers used, need to be resolved: */
        ctx->resolve |= buffers;
 
-       fd_state_emit(pctx, ctx->dirty);
+       if (ctx->dirty & FD_DIRTY_VTXBUF)
+               emit_vertexbufs(ctx, info->count);
 
-       emit_vertexbufs(ctx, info->count);
+       fd_state_emit(pctx, ctx->dirty);
 
        OUT_PKT3(ring, CP_SET_CONSTANT, 2);
-       OUT_RING(ring, CP_REG(REG_VGT_INDX_OFFSET));
+       OUT_RING(ring, CP_REG(REG_A2XX_VGT_INDX_OFFSET));
        OUT_RING(ring, info->start);
 
        OUT_PKT3(ring, CP_SET_CONSTANT, 2);
-       OUT_RING(ring, CP_REG(REG_VGT_VERTEX_REUSE_BLOCK_CNTL));
+       OUT_RING(ring, CP_REG(REG_A2XX_VGT_VERTEX_REUSE_BLOCK_CNTL));
        OUT_RING(ring, 0x0000003b);
 
-       OUT_PKT0(ring, REG_TC_CNTL_STATUS, 1);
-       OUT_RING(ring, TC_CNTL_STATUS_L2_INVALIDATE);
+       OUT_PKT0(ring, REG_A2XX_TC_CNTL_STATUS, 1);
+       OUT_RING(ring, A2XX_TC_CNTL_STATUS_L2_INVALIDATE);
 
        OUT_PKT3(ring, CP_WAIT_FOR_IDLE, 1);
        OUT_RING(ring, 0x0000000);
@@ -216,7 +223,7 @@ fd_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
        }
 
        OUT_PKT3(ring, CP_SET_CONSTANT, 2);
-       OUT_RING(ring, CP_REG(REG_2010));
+       OUT_RING(ring, CP_REG(REG_A2XX_UNKNOWN_2010));
        OUT_RING(ring, 0x00000000);
 
        emit_cacheflush(ring);