nir: Use a single list for all shader variables
[mesa.git] / src / gallium / drivers / freedreno / ir3 / ir3_cmdline.c
index 481859efb174b939c0fc2bcaabb694a42e784c13..15451af4c480a1a01529322701767ccf0b60efe1 100644 (file)
 #include <stdio.h>
 #include <err.h>
 
+#include "nir/tgsi_to_nir.h"
 #include "tgsi/tgsi_parse.h"
 #include "tgsi/tgsi_text.h"
 #include "tgsi/tgsi_dump.h"
 
-#include "freedreno_util.h"
+#include "ir3/ir3_compiler.h"
+#include "ir3/ir3_gallium.h"
+#include "ir3/ir3_nir.h"
+#include "ir3/instr-a3xx.h"
+#include "ir3/ir3.h"
 
-#include "ir3_compiler.h"
-#include "ir3_nir.h"
-#include "instr-a3xx.h"
-#include "ir3.h"
+#include "main/mtypes.h"
+
+#include "compiler/glsl/standalone.h"
+#include "compiler/glsl/glsl_to_nir.h"
+#include "compiler/glsl/gl_nir.h"
+#include "compiler/nir_types.h"
+#include "compiler/spirv/nir_spirv.h"
+
+#include "pipe/p_context.h"
 
 static void dump_info(struct ir3_shader_variant *so, const char *str)
 {
        uint32_t *bin;
-       const char *type = ir3_shader_stage(so->shader);
-       // TODO make gpu_id configurable on cmdline
-       bin = ir3_shader_assemble(so, 320);
+       const char *type = ir3_shader_stage(so);
+       bin = ir3_shader_assemble(so);
        debug_printf("; %s: %s\n", type, str);
-       ir3_shader_disasm(so, bin);
+       ir3_shader_disasm(so, bin, stdout);
        free(bin);
 }
 
+static void
+insert_sorted(struct exec_list *var_list, nir_variable *new_var)
+{
+       nir_foreach_variable_in_list(var, var_list) {
+               if (var->data.location > new_var->data.location) {
+                       exec_node_insert_node_before(&var->node, &new_var->node);
+                       return;
+               }
+       }
+       exec_list_push_tail(var_list, &new_var->node);
+}
+
+static void
+sort_varyings(nir_shader *nir, nir_variable_mode mode)
+{
+       struct exec_list new_list;
+       exec_list_make_empty(&new_list);
+       nir_foreach_variable_with_modes_safe(var, nir, mode) {
+               exec_node_remove(&var->node);
+               insert_sorted(&new_list, var);
+       }
+       exec_list_append(&nir->variables, &new_list);
+}
+
+static void
+fixup_varying_slots(nir_shader *nir, nir_variable_mode mode)
+{
+       nir_foreach_variable_with_modes(var, nir, mode) {
+               if (var->data.location >= VARYING_SLOT_VAR0) {
+                       var->data.location += 9;
+               } else if ((var->data.location >= VARYING_SLOT_TEX0) &&
+                               (var->data.location <= VARYING_SLOT_TEX7)) {
+                       var->data.location += VARYING_SLOT_VAR0 - VARYING_SLOT_TEX0;
+               }
+       }
+}
+
+static struct ir3_compiler *compiler;
+
+static nir_shader *
+load_glsl(unsigned num_files, char* const* files, gl_shader_stage stage)
+{
+       static const struct standalone_options options = {
+                       .glsl_version = 460,
+                       .do_link = true,
+       };
+       struct gl_shader_program *prog;
+       const nir_shader_compiler_options *nir_options =
+                       ir3_get_compiler_options(compiler);
+       static struct gl_context local_ctx;
+
+       prog = standalone_compile_shader(&options, num_files, files, &local_ctx);
+       if (!prog)
+               errx(1, "couldn't parse `%s'", files[0]);
+
+       nir_shader *nir = glsl_to_nir(&local_ctx, prog, stage, nir_options);
+
+       /* required NIR passes: */
+       if (nir_options->lower_all_io_to_temps ||
+                       nir->info.stage == MESA_SHADER_VERTEX ||
+                       nir->info.stage == MESA_SHADER_GEOMETRY) {
+               NIR_PASS_V(nir, nir_lower_io_to_temporaries,
+                               nir_shader_get_entrypoint(nir),
+                               true, true);
+       } else if (nir->info.stage == MESA_SHADER_FRAGMENT) {
+               NIR_PASS_V(nir, nir_lower_io_to_temporaries,
+                               nir_shader_get_entrypoint(nir),
+                               true, false);
+       }
+
+       NIR_PASS_V(nir, nir_lower_global_vars_to_local);
+       NIR_PASS_V(nir, nir_split_var_copies);
+       NIR_PASS_V(nir, nir_lower_var_copies);
+
+       NIR_PASS_V(nir, nir_split_var_copies);
+       NIR_PASS_V(nir, nir_lower_var_copies);
+       nir_print_shader(nir, stdout);
+       NIR_PASS_V(nir, gl_nir_lower_atomics, prog, true);
+       NIR_PASS_V(nir, nir_lower_atomics_to_ssbo);
+       nir_print_shader(nir, stdout);
+
+       switch (stage) {
+       case MESA_SHADER_VERTEX:
+               nir_assign_var_locations(nir, nir_var_shader_in,
+                               &nir->num_inputs,
+                               ir3_glsl_type_size);
+
+               /* Re-lower global vars, to deal with any dead VS inputs. */
+               NIR_PASS_V(nir, nir_lower_global_vars_to_local);
+
+               sort_varyings(nir, nir_var_shader_out);
+               nir_assign_var_locations(nir, nir_var_shader_out,
+                               &nir->num_outputs,
+                               ir3_glsl_type_size);
+               fixup_varying_slots(nir, nir_var_shader_out);
+               break;
+       case MESA_SHADER_FRAGMENT:
+               sort_varyings(nir, nir_var_shader_in);
+               nir_assign_var_locations(nir, nir_var_shader_in,
+                               &nir->num_inputs,
+                               ir3_glsl_type_size);
+               fixup_varying_slots(nir, nir_var_shader_in);
+               nir_assign_var_locations(nir, nir_var_shader_out,
+                               &nir->num_outputs,
+                               ir3_glsl_type_size);
+               break;
+       case MESA_SHADER_COMPUTE:
+       case MESA_SHADER_KERNEL:
+               break;
+       default:
+               errx(1, "unhandled shader stage: %d", stage);
+       }
+
+       nir_assign_var_locations(nir, nir_var_uniform,
+                       &nir->num_uniforms,
+                       ir3_glsl_type_size);
+
+       NIR_PASS_V(nir, nir_lower_system_values);
+       NIR_PASS_V(nir, nir_lower_frexp);
+       NIR_PASS_V(nir, nir_lower_io,
+                  nir_var_shader_in | nir_var_shader_out,
+                  ir3_glsl_type_size, (nir_lower_io_options)0);
+       NIR_PASS_V(nir, gl_nir_lower_samplers, prog);
+
+       return nir;
+}
 
 static int
 read_file(const char *filename, void **ptr, size_t *size)
@@ -84,9 +219,50 @@ read_file(const char *filename, void **ptr, size_t *size)
        return 0;
 }
 
+static void debug_func(void *priv, enum nir_spirv_debug_level level,
+               size_t spirv_offset, const char *message)
+{
+//     printf("%s\n", message);
+}
+
+static nir_shader *
+load_spirv(const char *filename, const char *entry, gl_shader_stage stage)
+{
+       const struct spirv_to_nir_options spirv_options = {
+               /* these caps are just make-believe */
+               .caps = {
+                       .draw_parameters = true,
+                       .float64 = true,
+                       .image_read_without_format = true,
+                       .image_write_without_format = true,
+                       .int64 = true,
+                       .variable_pointers = true,
+               },
+               .lower_ubo_ssbo_access_to_offsets = true,
+               .debug = {
+                       .func = debug_func,
+               }
+       };
+       nir_shader *nir;
+       void *buf;
+       size_t size;
+
+       read_file(filename, &buf, &size);
+
+       nir = spirv_to_nir(buf, size / 4,
+                       NULL, 0, /* spec_entries */
+                       stage, entry,
+                       &spirv_options,
+                       ir3_get_compiler_options(compiler));
+
+       nir_print_shader(nir, stdout);
+
+       return nir;
+}
+
 static void print_usage(void)
 {
-       printf("Usage: ir3_compiler [OPTIONS]... FILE\n");
+       printf("Usage: ir3_compiler [OPTIONS]... <file.tgsi | file.spv entry_point | (file.vert | file.frag)*>\n");
        printf("    --verbose         - verbose compiler/debug messages\n");
        printf("    --binning-pass    - generate binning pass shader (VERT)\n");
        printf("    --color-two-side  - emulate two-sided color (FRAG)\n");
@@ -94,6 +270,7 @@ static void print_usage(void)
        printf("    --saturate-s MASK - bitmask of samplers to saturate S coord\n");
        printf("    --saturate-t MASK - bitmask of samplers to saturate T coord\n");
        printf("    --saturate-r MASK - bitmask of samplers to saturate R coord\n");
+       printf("    --astc-srgb MASK  - bitmask of samplers to enable astc-srgb workaround\n");
        printf("    --stream-out      - enable stream-out (aka transform feedback)\n");
        printf("    --ucp MASK        - bitmask of enabled user-clip-planes\n");
        printf("    --gpu GPU_ID      - specify gpu-id (default 320)\n");
@@ -103,16 +280,18 @@ static void print_usage(void)
 int main(int argc, char **argv)
 {
        int ret = 0, n = 1;
-       const char *filename;
-       struct tgsi_token toks[65536];
-       struct tgsi_parse_context parse;
+       char *filenames[2];
+       int num_files = 0;
+       unsigned stage = 0;
        struct ir3_shader_variant v;
        struct ir3_shader s;
        struct ir3_shader_key key = {};
        /* TODO cmdline option to target different gpus: */
        unsigned gpu_id = 320;
        const char *info;
+       const char *spirv_entry = NULL;
        void *ptr;
+       bool from_tgsi = false;
        size_t size;
 
        memset(&s, 0, sizeof(s));
@@ -127,14 +306,14 @@ int main(int argc, char **argv)
 
        while (n < argc) {
                if (!strcmp(argv[n], "--verbose")) {
-                       fd_mesa_debug |= FD_DBG_MSGS | FD_DBG_OPTMSGS | FD_DBG_DISASM;
+                       ir3_shader_debug |= IR3_DBG_OPTMSGS | IR3_DBG_DISASM;
                        n++;
                        continue;
                }
 
                if (!strcmp(argv[n], "--binning-pass")) {
                        debug_printf(" %s", argv[n]);
-                       key.binning_pass = true;
+                       v.binning_pass = true;
                        n++;
                        continue;
                }
@@ -148,7 +327,6 @@ int main(int argc, char **argv)
 
                if (!strcmp(argv[n], "--half-precision")) {
                        debug_printf(" %s", argv[n]);
-                       key.half_precision = true;
                        n++;
                        continue;
                }
@@ -174,8 +352,15 @@ int main(int argc, char **argv)
                        continue;
                }
 
+               if (!strcmp(argv[n], "--astc-srgb")) {
+                       debug_printf(" %s %s", argv[n], argv[n+1]);
+                       key.vastc_srgb = key.fastc_srgb = strtol(argv[n+1], NULL, 0);
+                       n += 2;
+                       continue;
+               }
+
                if (!strcmp(argv[n], "--stream-out")) {
-                       struct pipe_stream_output_info *so = &s.stream_output;
+                       struct ir3_stream_output_info *so = &s.stream_output;
                        debug_printf(" %s", argv[n]);
                        /* TODO more dynamic config based on number of outputs, etc
                         * rather than just hard-code for first output:
@@ -215,42 +400,105 @@ int main(int argc, char **argv)
        }
        debug_printf("\n");
 
-       filename = argv[n];
+       while (n < argc) {
+               char *filename = argv[n];
+               char *ext = strrchr(filename, '.');
+
+               if (strcmp(ext, ".tgsi") == 0) {
+                       if (num_files != 0)
+                               errx(1, "in TGSI mode, only a single file may be specified");
+                       from_tgsi = true;
+               } else if (strcmp(ext, ".spv") == 0) {
+                       if (num_files != 0)
+                               errx(1, "in SPIR-V mode, only a single file may be specified");
+                       stage = MESA_SHADER_COMPUTE;
+                       filenames[num_files++] = filename;
+                       n++;
+                       if (n == argc)
+                               errx(1, "in SPIR-V mode, an entry point must be specified");
+                       spirv_entry = argv[n];
+                       n++;
+               } else if (strcmp(ext, ".comp") == 0) {
+                       if (from_tgsi || spirv_entry)
+                               errx(1, "cannot mix GLSL/TGSI/SPIRV");
+                       if (num_files >= ARRAY_SIZE(filenames))
+                               errx(1, "too many GLSL files");
+                       stage = MESA_SHADER_COMPUTE;
+               } else if (strcmp(ext, ".frag") == 0) {
+                       if (from_tgsi || spirv_entry)
+                               errx(1, "cannot mix GLSL/TGSI/SPIRV");
+                       if (num_files >= ARRAY_SIZE(filenames))
+                               errx(1, "too many GLSL files");
+                       stage = MESA_SHADER_FRAGMENT;
+               } else if (strcmp(ext, ".vert") == 0) {
+                       if (from_tgsi)
+                               errx(1, "cannot mix GLSL and TGSI");
+                       if (num_files >= ARRAY_SIZE(filenames))
+                               errx(1, "too many GLSL files");
+                       stage = MESA_SHADER_VERTEX;
+               } else {
+                       print_usage();
+                       return -1;
+               }
 
-       ret = read_file(filename, &ptr, &size);
-       if (ret) {
-               print_usage();
-               return ret;
+               filenames[num_files++] = filename;
+
+               n++;
        }
 
-       if (fd_mesa_debug & FD_DBG_OPTMSGS)
-               debug_printf("%s\n", (char *)ptr);
+       nir_shader *nir;
+
+       compiler = ir3_compiler_create(NULL, gpu_id);
+
+       if (from_tgsi) {
+               struct tgsi_token toks[65536];
+               const nir_shader_compiler_options *nir_options =
+                       ir3_get_compiler_options(compiler);
 
-       if (!tgsi_text_translate(ptr, toks, Elements(toks)))
-               errx(1, "could not parse `%s'", filename);
+               ret = read_file(filenames[0], &ptr, &size);
+               if (ret) {
+                       print_usage();
+                       return ret;
+               }
 
-       if (fd_mesa_debug & FD_DBG_OPTMSGS)
-               tgsi_dump(toks, 0);
+               if (ir3_shader_debug & IR3_DBG_OPTMSGS)
+                       debug_printf("%s\n", (char *)ptr);
 
-       nir_shader *nir = ir3_tgsi_to_nir(toks);
-       s.compiler = ir3_compiler_create(gpu_id);
-       s.nir = ir3_optimize_nir(&s, nir, NULL);
+               if (!tgsi_text_translate(ptr, toks, ARRAY_SIZE(toks)))
+                       errx(1, "could not parse `%s'", filenames[0]);
+
+               if (ir3_shader_debug & IR3_DBG_OPTMSGS)
+                       tgsi_dump(toks, 0);
+
+               nir = tgsi_to_nir_noscreen(toks, nir_options);
+               NIR_PASS_V(nir, nir_lower_global_vars_to_local);
+       } else if (spirv_entry) {
+               nir = load_spirv(filenames[0], spirv_entry, stage);
+
+               NIR_PASS_V(nir, nir_lower_io,
+                          nir_var_shader_in | nir_var_shader_out,
+                          ir3_glsl_type_size, (nir_lower_io_options)0);
+
+               /* TODO do this somewhere else */
+               nir_lower_int64(nir, ~0);
+               nir_lower_system_values(nir);
+       } else if (num_files > 0) {
+               nir = load_glsl(num_files, filenames, stage);
+       } else {
+               print_usage();
+               return -1;
+       }
+
+       s.compiler = compiler;
+       s.nir = nir;
+
+       ir3_finalize_nir(compiler, nir);
 
        v.key = key;
        v.shader = &s;
+       s.type = v.type = nir->info.stage;
 
-       tgsi_parse_init(&parse, toks);
-       switch (parse.FullHeader.Processor.Processor) {
-       case TGSI_PROCESSOR_FRAGMENT:
-               s.type = v.type = SHADER_FRAGMENT;
-               break;
-       case TGSI_PROCESSOR_VERTEX:
-               s.type = v.type = SHADER_VERTEX;
-               break;
-       case TGSI_PROCESSOR_COMPUTE:
-               s.type = v.type = SHADER_COMPUTE;
-               break;
-       }
+       ir3_nir_lower_variant(&v, nir);
 
        info = "NIR compiler";
        ret = ir3_compile_shader_nir(s.compiler, &v);