Random list of problems with i915g:
-- Check if PIPE_CAP_BLEND_EQUATION_SEPARATE work, the code is there.
- If not fix it! A simple task, good for beginners.
-
-- Add support for PIPE_CAP_POINT_SPRITE either via the draw module or directly
- via the hardware, look at the classic driver, more advanced.
-
- What does this button do? Figure out LIS7 with regards to depth offset.
- Dies with BadDrawable on GLXFBconfig changes/destruction. Makes piglit totally
unusable :( Upgrading xserver helped here, it doesn't crash anymore. Still
broken, it doesn't update the viewport/get new buffers.
-- Tends to hang the chip after a few minutes of openarena. Looks tiling related,
- at the last frame rendered has tiling corruption over the complete frame.
-
-- Kills the chip in 3D_PRIMITIVE LINELIST with mesa-demos/fbotexture in
- wireframe mode.
-
-- Tiling is funny: If unlucky, it renders/samples all black. No clue yet what's
- going on. Seems to depend on tiny details like whethever the sampler
- relocation is fenced/unfenced (broken _with_ fenced reloc using tiling bits!).
-
- Y-tiling is even more fun. i915c doesn't use it, maybe there's a reason?
Texture sampling from Y-tiled buffers seems to work, though (save above
problems).
+ RESOLVED: Y-tiling works with the render engine, but not with the blitter.
+ Use u_blitter and hw clears (PRIM3D_CLEAR_RECT).
+
+- src/xvmc/i915_structs.h in xf86-video-intel has a few more bits of various
+ commands defined. Scavenge them and see what's useful.
+
+- Do smarter remapping. Right now we send everything onto tex coords 0-7.
+ We could also use diffuse/specular and pack two sets of 2D coords in a single
+ 4D. Is it a big problem though? We're more limited by the # of texture
+ indirections and the # of instructions.
+
+- Finish front/back face. We need to add face support to lp_build_system_values_array and use it in draw_llvm.c.
+
+- More optimizations, like replacing ADD + MUL with MAD or use DP2ADD.
+
+- Replace constants and immediates which are 0,1,-1 or a combination of those with a swizzle.
+
+- Schedule instructions to minimize the number of phases. One way is to replace
+ R registers responsible for a boundary with U registers to avoid phase
+ boundaries.
+
+- Continue a previous primitive when there are no state changes
-- Need to validate buffers before usage. Currently do_exec on the batchbuffer
- can fail with -ENOSPC.
+- Fix fragment discard
Other bugs can be found here:
-https://bugs.freedesktop.org/buglist.cgi?bug_status=NEW&bug_status=ASSIGNED&bug_status=REOPENED&component=Drivers/Gallium/i915g
+https://gitlab.freedesktop.org/mesa/mesa/-/issues?scope=all&utf8=%E2%9C%93&state=opened&label_name[]=i915g
projects / mesa.git / blobdiff