static void i915_flush_pipe( struct pipe_context *pipe,
- unsigned flags,
- struct pipe_fence_handle **fence )
+ struct pipe_fence_handle **fence,
+ enum pipe_flush_flags flags )
{
struct i915_context *i915 = i915_context(pipe);
- draw_flush(i915->draw);
-
-#if 0
- /* Do we need to emit an MI_FLUSH command to flush the hardware
- * caches?
+ /* Only shortcut this if we have no fence, otherwise we must flush the
+ * empty batchbuffer to get our fence back.
*/
- if (flags & (PIPE_FLUSH_RENDER_CACHE | PIPE_FLUSH_TEXTURE_CACHE)) {
- unsigned flush = MI_FLUSH;
-
- if (!(flags & PIPE_FLUSH_RENDER_CACHE))
- flush |= INHIBIT_FLUSH_RENDER_CACHE;
-
- if (flags & PIPE_FLUSH_TEXTURE_CACHE)
- flush |= FLUSH_MAP_CACHE;
-
- if (!BEGIN_BATCH(1, 0)) {
- FLUSH_BATCH(NULL);
- assert(BEGIN_BATCH(1, 0));
- }
- OUT_BATCH( flush );
- }
-#endif
-
- if (i915->batch->map == i915->batch->ptr) {
+ if (!fence && i915->batch && (i915->batch->map == i915->batch->ptr)) {
return;
}
i915->hardware_dirty = ~0;
i915->immediate_dirty = ~0;
i915->dynamic_dirty = ~0;
+ i915->static_dirty = ~0;
/* kernel emits flushes in between batchbuffers */
i915->flush_dirty = 0;
+ i915->fired_vertices += i915->queued_vertices;
+ i915->queued_vertices = 0;
}