src_vector(struct i915_fp_compile *p,
const struct tgsi_full_src_register *source)
{
- uint index = source->SrcRegister.Index;
+ uint index = source->Register.Index;
uint src = 0, sem_name, sem_ind;
- switch (source->SrcRegister.File) {
+ switch (source->Register.File) {
case TGSI_FILE_TEMPORARY:
- if (source->SrcRegister.Index >= I915_MAX_TEMPORARY) {
+ if (source->Register.Index >= I915_MAX_TEMPORARY) {
i915_program_error(p, "Exceeded max temporary reg");
return 0;
}
}
src = swizzle(src,
- source->SrcRegister.SwizzleX,
- source->SrcRegister.SwizzleY,
- source->SrcRegister.SwizzleZ,
- source->SrcRegister.SwizzleW);
+ source->Register.SwizzleX,
+ source->Register.SwizzleY,
+ source->Register.SwizzleZ,
+ source->Register.SwizzleW);
/* There's both negate-all-components and per-component negation.
* Try to handle both here.
*/
{
- int n = source->SrcRegister.Negate;
+ int n = source->Register.Negate;
src = negate(src, n, n, n, n);
}
- /* no abs() or post-abs negation */
+ /* no abs() */
#if 0
/* XXX assertions disabled to allow arbfplight.c to run */
/* XXX enable these assertions, or fix things */
- assert(!source->SrcRegisterExtMod.Absolute);
- assert(!source->SrcRegisterExtMod.Negate);
+ assert(!source->Register.Absolute);
#endif
return src;
}
get_result_vector(struct i915_fp_compile *p,
const struct tgsi_full_dst_register *dest)
{
- switch (dest->DstRegister.File) {
+ switch (dest->Register.File) {
case TGSI_FILE_OUTPUT:
{
- uint sem_name = p->shader->info.output_semantic_name[dest->DstRegister.Index];
+ uint sem_name = p->shader->info.output_semantic_name[dest->Register.Index];
switch (sem_name) {
case TGSI_SEMANTIC_POSITION:
return UREG(REG_TYPE_OD, 0);
}
}
case TGSI_FILE_TEMPORARY:
- return UREG(REG_TYPE_R, dest->DstRegister.Index);
+ return UREG(REG_TYPE_R, dest->Register.Index);
default:
i915_program_error(p, "Bad inst->DstReg.File");
return 0;
get_result_flags(const struct tgsi_full_instruction *inst)
{
const uint writeMask
- = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ = inst->Dst[0].Register.WriteMask;
uint flags = 0x0;
if (inst->Instruction.Saturate == TGSI_SAT_ZERO_ONE)
const struct tgsi_full_instruction *inst,
uint opcode)
{
- uint texture = inst->InstructionExtTexture.Texture;
- uint unit = inst->FullSrcRegisters[1].SrcRegister.Index;
+ uint texture = inst->Texture.Texture;
+ uint unit = inst->Src[1].Register.Index;
uint tex = translate_tex_src_target( p, texture );
uint sampler = i915_emit_decl(p, REG_TYPE_S, unit, tex);
- uint coord = src_vector( p, &inst->FullSrcRegisters[0]);
+ uint coord = src_vector( p, &inst->Src[0]);
i915_emit_texld( p,
- get_result_vector( p, &inst->FullDstRegisters[0] ),
+ get_result_vector( p, &inst->Dst[0] ),
get_result_flags( inst ),
sampler,
coord,
assert(numArgs <= 3);
- arg1 = (numArgs < 1) ? 0 : src_vector( p, &inst->FullSrcRegisters[0] );
- arg2 = (numArgs < 2) ? 0 : src_vector( p, &inst->FullSrcRegisters[1] );
- arg3 = (numArgs < 3) ? 0 : src_vector( p, &inst->FullSrcRegisters[2] );
+ arg1 = (numArgs < 1) ? 0 : src_vector( p, &inst->Src[0] );
+ arg2 = (numArgs < 2) ? 0 : src_vector( p, &inst->Src[1] );
+ arg3 = (numArgs < 3) ? 0 : src_vector( p, &inst->Src[2] );
i915_emit_arith( p,
opcode,
- get_result_vector( p, &inst->FullDstRegisters[0]),
+ get_result_vector( p, &inst->Dst[0]),
get_result_flags( inst ), 0,
arg1,
arg2,
/* transpose first two registers */
inst2 = *inst;
- inst2.FullSrcRegisters[0] = inst->FullSrcRegisters[1];
- inst2.FullSrcRegisters[1] = inst->FullSrcRegisters[0];
+ inst2.Src[0] = inst->Src[1];
+ inst2.Src[1] = inst->Src[0];
emit_simple_arith(p, &inst2, opcode, numArgs);
}
switch (inst->Instruction.Opcode) {
case TGSI_OPCODE_ABS:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_MAX,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
src0, negate(src0, 1, 1, 1, 1), 0);
break;
break;
case TGSI_OPCODE_CMP:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
- src2 = src_vector(p, &inst->FullSrcRegisters[2]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
+ src2 = src_vector(p, &inst->Src[2]);
i915_emit_arith(p, A0_CMP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst),
0, src0, src2, src1); /* NOTE: order of src2, src1 */
break;
case TGSI_OPCODE_COS:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
i915_emit_arith(p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(tmp, ONE, Z, Y, X),
i915_emit_const4fv(p, cos_constants), 0);
break;
case TGSI_OPCODE_DPH:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, Y, Z, ONE), src1, 0);
break;
case TGSI_OPCODE_DST:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
/* result[0] = 1 * 1;
* result[1] = a[1] * b[1];
*/
i915_emit_arith(p,
A0_MUL,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, ONE, Y, Z, ONE),
swizzle(src1, ONE, Y, ONE, W), 0);
break;
case TGSI_OPCODE_EX2:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_EXP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_KIL:
/* kill if src[0].x < 0 || src[0].y < 0 ... */
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
i915_emit_texld(p,
break;
case TGSI_OPCODE_LG2:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_LOG,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_LIT:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
/* tmp = max( a.xyzw, a.00zw )
swizzle(tmp, Y, Y, Y, Y), 0, 0);
i915_emit_arith(p, A0_CMP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
negate(swizzle(tmp, ONE, ONE, X, ONE), 0, 0, 1, 0),
swizzle(tmp, ONE, X, ZERO, ONE),
break;
case TGSI_OPCODE_LRP:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
- src2 = src_vector(p, &inst->FullSrcRegisters[2]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
+ src2 = src_vector(p, &inst->Src[2]);
flags = get_result_flags(inst);
tmp = i915_get_utemp(p);
flags & A0_DEST_CHANNEL_ALL, 0, src1, src0, src2);
i915_emit_arith(p, A0_MAD,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
flags, 0, negate(src2, 1, 1, 1, 1), src0, tmp);
break;
break;
case TGSI_OPCODE_MIN:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
tmp = i915_get_utemp(p);
flags = get_result_flags(inst);
i915_emit_arith(p,
A0_MOV,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
flags, 0, negate(tmp, 1, 1, 1, 1), 0, 0);
break;
break;
case TGSI_OPCODE_POW:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
tmp = i915_get_utemp(p);
flags = get_result_flags(inst);
i915_emit_arith(p,
A0_EXP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
flags, 0, swizzle(tmp, X, X, X, X), 0, 0);
break;
break;
case TGSI_OPCODE_RCP:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_RCP,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_RSQ:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
i915_emit_arith(p,
A0_RSQ,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, X, X, X, X), 0, 0);
break;
case TGSI_OPCODE_SCS:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
/*
swizzle(tmp, X, Y, X, Y),
swizzle(tmp, X, X, ONE, ONE), 0);
- writemask = inst->FullDstRegisters[0].DstRegister.WriteMask;
+ writemask = inst->Dst[0].Register.WriteMask;
if (writemask & TGSI_WRITEMASK_Y) {
uint tmp1;
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
A0_DEST_CHANNEL_Y, 0,
swizzle(tmp1, W, Z, Y, X),
i915_emit_const4fv(p, sin_constants), 0);
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
A0_DEST_CHANNEL_X, 0,
swizzle(tmp, ONE, Z, Y, X),
i915_emit_const4fv(p, cos_constants), 0);
break;
case TGSI_OPCODE_SIN:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
+ src0 = src_vector(p, &inst->Src[0]);
tmp = i915_get_utemp(p);
i915_emit_arith(p,
i915_emit_arith(p,
A0_DP4,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(tmp, W, Z, Y, X),
i915_emit_const4fv(p, sin_constants), 0);
break;
case TGSI_OPCODE_SUB:
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
i915_emit_arith(p,
A0_ADD,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
src0, negate(src1, 1, 1, 1, 1), 0);
break;
* result.z = src0.x * src1.y - src0.y * src1.x;
* result.w = undef;
*/
- src0 = src_vector(p, &inst->FullSrcRegisters[0]);
- src1 = src_vector(p, &inst->FullSrcRegisters[1]);
+ src0 = src_vector(p, &inst->Src[0]);
+ src1 = src_vector(p, &inst->Src[1]);
tmp = i915_get_utemp(p);
i915_emit_arith(p,
i915_emit_arith(p,
A0_MAD,
- get_result_vector(p, &inst->FullDstRegisters[0]),
+ get_result_vector(p, &inst->Dst[0]),
get_result_flags(inst), 0,
swizzle(src0, Y, Z, X, ONE),
swizzle(src1, Z, X, Y, ONE),
tgsi_parse_token( &parse );
switch( parse.FullToken.Token.Type ) {
+ case TGSI_TOKEN_TYPE_PROPERTY:
+ /*
+ * We only support one cbuf, but we still need to ignore the property
+ * correctly so we don't hit the assert at the end of the switch case.
+ */
+ assert(parse.FullToken.FullProperty.Property.PropertyName ==
+ TGSI_PROPERTY_FS_COLOR0_WRITES_ALL_CBUFS);
+ break;
case TGSI_TOKEN_TYPE_DECLARATION:
if (parse.FullToken.FullDeclaration.Declaration.File
== TGSI_FILE_CONSTANT) {
uint i;
- for (i = parse.FullToken.FullDeclaration.DeclarationRange.First;
- i <= parse.FullToken.FullDeclaration.DeclarationRange.Last;
+ for (i = parse.FullToken.FullDeclaration.Range.First;
+ i <= parse.FullToken.FullDeclaration.Range.Last;
i++) {
assert(ifs->constant_flags[i] == 0x0);
ifs->constant_flags[i] = I915_CONSTFLAG_USER;
else if (parse.FullToken.FullDeclaration.Declaration.File
== TGSI_FILE_TEMPORARY) {
uint i;
- for (i = parse.FullToken.FullDeclaration.DeclarationRange.First;
- i <= parse.FullToken.FullDeclaration.DeclarationRange.Last;
+ for (i = parse.FullToken.FullDeclaration.Range.First;
+ i <= parse.FullToken.FullDeclaration.Range.Last;
i++) {
assert(i < I915_MAX_TEMPORARY);
/* XXX just use shader->info->file_mask[TGSI_FILE_TEMPORARY] */
i915_translate_fragment_program( struct i915_context *i915,
struct i915_fragment_shader *fs)
{
- struct i915_fp_compile *p = i915_init_compile(i915, fs);
+ struct i915_fp_compile *p;
const struct tgsi_token *tokens = fs->state.tokens;
- i915_find_wpos_space(p);
-
#if 0
tgsi_dump(tokens, 0);
#endif
+ /* hw doesn't seem to like empty frag programs, even when the depth write
+ * fixup gets emitted below - may that one is fishy, too? */
+ if (fs->info.num_instructions == 1) {
+ i915_use_passthrough_shader(fs);
+
+ return;
+ }
+
+ p = i915_init_compile(i915, fs);
+ i915_find_wpos_space(p);
+
i915_translate_instructions(p, tokens);
i915_fixup_depth_write(p);
projects / mesa.git / blobdiff