radeonsi: remove flushes at the beginning and end of IBs done by the kernel
[mesa.git] / src / gallium / drivers / i915 / i915_state_sampler.c
index eb62479b975ef70500c35befba4fb6096e71833d..84ed1514630dcb3e3b0087931c4a36142e99ccc1 100644 (file)
@@ -193,10 +193,10 @@ struct i915_tracked_state i915_hw_samplers = {
 static uint translate_texture_format(enum pipe_format pipeFormat,
                                      const struct pipe_sampler_view* view)
 {
-   if ( (view->swizzle_r != PIPE_SWIZZLE_RED ||
-         view->swizzle_g != PIPE_SWIZZLE_GREEN ||
-         view->swizzle_b != PIPE_SWIZZLE_BLUE ||
-         view->swizzle_a != PIPE_SWIZZLE_ALPHA ) &&
+   if ( (view->swizzle_r != PIPE_SWIZZLE_X ||
+         view->swizzle_g != PIPE_SWIZZLE_Y ||
+         view->swizzle_b != PIPE_SWIZZLE_Z ||
+         view->swizzle_a != PIPE_SWIZZLE_W ) &&
          pipeFormat != PIPE_FORMAT_Z24_UNORM_S8_UINT &&
          pipeFormat != PIPE_FORMAT_Z24X8_UNORM )
       debug_printf("i915: unsupported texture swizzle for format %d\n", pipeFormat);
@@ -248,20 +248,20 @@ static uint translate_texture_format(enum pipe_format pipeFormat,
    case PIPE_FORMAT_Z24_UNORM_S8_UINT:
    case PIPE_FORMAT_Z24X8_UNORM:
       {
-         if ( view->swizzle_r == PIPE_SWIZZLE_RED &&
-              view->swizzle_g == PIPE_SWIZZLE_RED &&
-              view->swizzle_b == PIPE_SWIZZLE_RED &&
-              view->swizzle_a == PIPE_SWIZZLE_ONE)
+         if ( view->swizzle_r == PIPE_SWIZZLE_X &&
+              view->swizzle_g == PIPE_SWIZZLE_X &&
+              view->swizzle_b == PIPE_SWIZZLE_X &&
+              view->swizzle_a == PIPE_SWIZZLE_1)
             return (MAPSURF_32BIT | MT_32BIT_xA824);
-         if ( view->swizzle_r == PIPE_SWIZZLE_RED &&
-              view->swizzle_g == PIPE_SWIZZLE_RED &&
-              view->swizzle_b == PIPE_SWIZZLE_RED &&
-              view->swizzle_a == PIPE_SWIZZLE_RED)
+         if ( view->swizzle_r == PIPE_SWIZZLE_X &&
+              view->swizzle_g == PIPE_SWIZZLE_X &&
+              view->swizzle_b == PIPE_SWIZZLE_X &&
+              view->swizzle_a == PIPE_SWIZZLE_X)
             return (MAPSURF_32BIT | MT_32BIT_xI824);
-         if ( view->swizzle_r == PIPE_SWIZZLE_ZERO &&
-              view->swizzle_g == PIPE_SWIZZLE_ZERO &&
-              view->swizzle_b == PIPE_SWIZZLE_ZERO &&
-              view->swizzle_a == PIPE_SWIZZLE_RED)
+         if ( view->swizzle_r == PIPE_SWIZZLE_0 &&
+              view->swizzle_g == PIPE_SWIZZLE_0 &&
+              view->swizzle_b == PIPE_SWIZZLE_0 &&
+              view->swizzle_a == PIPE_SWIZZLE_X)
             return (MAPSURF_32BIT | MT_32BIT_xL824);
          debug_printf("i915: unsupported depth swizzle %d %d %d %d\n",
                       view->swizzle_r,
@@ -304,11 +304,11 @@ static void update_map(struct i915_context *i915,
 {
    const struct pipe_resource *pt = &tex->b.b;
    uint width = pt->width0, height = pt->height0, depth = pt->depth0;
-   const uint num_levels = pt->last_level;
-   uint format, pitch;
-   unsigned max_lod = num_levels * 4;
    int first_level = view->u.tex.first_level;
+   const uint num_levels = pt->last_level - first_level;
+   unsigned max_lod = num_levels * 4;
    bool is_npot = (!util_is_power_of_two(pt->width0) || !util_is_power_of_two(pt->height0)); 
+   uint format, pitch;
 
    /*
     * This is a bit messy. i915 doesn't support NPOT with mipmaps, but we can