i915g: implement unfenced color&depth buffer using tiling bits

[mesa.git] / src / gallium / drivers / i915 / i915_winsys.h

diff --git a/src/gallium/drivers/i915/i915_winsys.h b/src/gallium/drivers/i915/i915_winsys.h
index 2ca9e581f3163db288de6b7013326469e3e25788..24ea416f015469b84215dba63bd9f2ca1b19e624 100644 (file)
--- a/src/gallium/drivers/i915/i915_winsys.h
+++ b/src/gallium/drivers/i915/i915_winsys.h
@@ -53,6 +53,7 @@ enum i915_winsys_buffer_type
    I915_NEW_VERTEX
 };
 
+/* These need to be in sync with the definitions of libdrm-intel! */
 enum i915_winsys_buffer_tile
 {
    I915_TILE_NONE,
@@ -106,7 +107,7 @@ struct i915_winsys {
    int (*batchbuffer_reloc)(struct i915_winsys_batchbuffer *batch,
                             struct i915_winsys_buffer *reloc,
                             enum i915_winsys_buffer_usage usage,
-                            unsigned offset);
+                            unsigned offset, bool fenced);
 
    /**
     * Flush a bufferbatch.
@@ -156,6 +157,7 @@ struct i915_winsys {
    struct i915_winsys_buffer *
       (*buffer_from_handle)(struct i915_winsys *iws,
                             struct winsys_handle *whandle,
+                            enum i915_winsys_buffer_tile *tiling,
                             unsigned *stride);
 
    /**