#include "brw_context.h"
#include "brw_vs.h"
#include "brw_debug.h"
+#include "brw_disasm.h"
+/* Choose one of the 4 vec4's which can be packed into each 16-wide reg.
+ */
+static INLINE struct brw_reg brw_vec4_grf_repeat( GLuint reg, GLuint slot )
+{
+ int nr = reg + slot/2;
+ int subnr = (slot%2) * 4;
+
+ return stride(brw_vec4_grf(nr, subnr), 0, 4, 1);
+}
static struct brw_reg get_tmp( struct brw_vs_compile *c )
static boolean is_position_output( struct brw_vs_compile *c,
unsigned vs_output )
{
- struct brw_vertex_shader *vs = c->vp;
-
- if (vs_output == c->prog_data.output_edgeflag) {
- return FALSE;
- }
- else {
- unsigned semantic = vs->info.output_semantic_name[vs_output];
- unsigned index = vs->info.output_semantic_index[vs_output];
+ const struct brw_vertex_shader *vs = c->vp;
+ unsigned semantic = vs->info.output_semantic_name[vs_output];
+ unsigned index = vs->info.output_semantic_index[vs_output];
- return (semantic == TGSI_SEMANTIC_POSITION &&
- index == 0);
- }
+ return (semantic == TGSI_SEMANTIC_POSITION &&
+ index == 0);
}
unsigned vs_output,
unsigned *fs_input_slot )
{
- struct brw_vertex_shader *vs = c->vp;
+ const struct brw_vertex_shader *vs = c->vp;
+ unsigned semantic = vs->info.output_semantic_name[vs_output];
+ unsigned index = vs->info.output_semantic_index[vs_output];
+ unsigned i;
- if (vs_output == c->prog_data.output_edgeflag) {
- *fs_input_slot = c->key.fs_signature.nr_inputs;
- return TRUE;
- }
- else {
- unsigned semantic = vs->info.output_semantic_name[vs_output];
- unsigned index = vs->info.output_semantic_index[vs_output];
- unsigned i;
-
- for (i = 0; i < c->key.fs_signature.nr_inputs; i++) {
- if (c->key.fs_signature.input[i].semantic == semantic &&
+ for (i = 0; i < c->key.fs_signature.nr_inputs; i++) {
+ if (c->key.fs_signature.input[i].semantic == semantic &&
c->key.fs_signature.input[i].semantic_index == index) {
- *fs_input_slot = i;
- return TRUE;
- }
+ *fs_input_slot = i;
+ return TRUE;
}
}
*/
static void brw_vs_alloc_regs( struct brw_vs_compile *c )
{
- GLuint i, reg = 0, mrf;
+ GLuint i, reg = 0, subreg = 0, mrf;
int attributes_in_vue;
/* Determine whether to use a real constant buffer or use a block
/* User clip planes from curbe:
*/
if (c->key.nr_userclip) {
- for (i = 0; i < c->key.nr_userclip; i++) {
- c->userplane[i] = stride( brw_vec4_grf(reg+3+i/2, (i%2) * 4), 0, 4, 1);
+ /* Skip over fixed planes: Or never read them into vs unit?
+ */
+ subreg += 6;
+
+ for (i = 0; i < c->key.nr_userclip; i++, subreg++) {
+ c->userplane[i] =
+ stride( brw_vec4_grf(reg+subreg/2, (subreg%2) * 4), 0, 4, 1);
}
/* Deal with curbe alignment:
*/
- reg += ((6 + c->key.nr_userclip + 3) / 4) * 2;
+ subreg = align(subreg, 2);
+ /*reg += ((6 + c->key.nr_userclip + 3) / 4) * 2;*/
}
- /* Vertex program parameters from curbe:
+
+ /* Immediates: always in the curbe.
+ *
+ * XXX: Can try to encode some immediates as brw immediates
+ * XXX: Make sure ureg sets minimal immediate size and respect it
+ * here.
*/
- if (c->vp->use_const_buffer) {
- /* get constants from a real constant buffer */
- c->prog_data.curb_read_length = 0;
- c->prog_data.nr_params = 4; /* XXX 0 causes a bug elsewhere... */
+ for (i = 0; i < c->vp->info.immediate_count; i++, subreg++) {
+ c->regs[TGSI_FILE_IMMEDIATE][i] =
+ stride( brw_vec4_grf(reg+subreg/2, (subreg%2) * 4), 0, 4, 1);
}
- else {
- /* use a section of the GRF for constants */
+ c->prog_data.nr_params = c->vp->info.immediate_count * 4;
+
+
+ /* Vertex constant buffer.
+ *
+ * Constants from the buffer can be either cached in the curbe or
+ * loaded as needed from the actual constant buffer.
+ */
+ if (!c->vp->use_const_buffer) {
GLuint nr_params = c->vp->info.file_max[TGSI_FILE_CONSTANT] + 1;
- for (i = 0; i < nr_params; i++) {
- c->regs[TGSI_FILE_CONSTANT][i] = stride( brw_vec4_grf(reg+i/2, (i%2) * 4), 0, 4, 1);
+
+ for (i = 0; i < nr_params; i++, subreg++) {
+ c->regs[TGSI_FILE_CONSTANT][i] =
+ stride( brw_vec4_grf(reg+subreg/2, (subreg%2) * 4), 0, 4, 1);
}
- reg += (nr_params + 1) / 2;
- c->prog_data.curb_read_length = reg - 1;
- c->prog_data.nr_params = nr_params * 4;
+
+ c->prog_data.nr_params += nr_params * 4;
}
+ /* All regs allocated
+ */
+ reg += (subreg + 1) / 2;
+ c->prog_data.curb_read_length = reg - 1;
+
+
/* Allocate input regs:
*/
c->nr_inputs = c->vp->info.num_inputs;
if (c->nr_inputs == 0)
reg++;
- /* Allocate a GRF and load immediate values by hand with 4 MOVs!!!
- *
- * XXX: Try to encode float immediates as brw immediates
- * XXX: Put immediates into the CURBE.
- * XXX: Make sure ureg sets minimal immediate size and respect it
- * here.
- */
- for (i = 0; i < c->nr_immediates; i++) {
- struct brw_reg r;
- int j;
-
- c->regs[TGSI_FILE_IMMEDIATE][i] =
- r = brw_vec8_grf(reg, 0);
-
- for (j = 0; j < 4; j++) {
- brw_MOV(&c->func,
- brw_writemask(r, (1<<j)),
- brw_imm_f(c->immediate[i][j]));
- }
-
- reg++;
- }
/* Allocate outputs. The non-position outputs go straight into message regs.
}
+#if 0
/* TODO: relative addressing!
*/
}
}
+#endif
+
/**
* Indirect addressing: get reg[[arg] + offset].
{
struct brw_reg reg;
- if (src->SrcRegister.File == TGSI_FILE_NULL)
+ if (src->Register.File == TGSI_FILE_NULL)
return brw_null_reg();
reg = get_src_reg(c, argIndex,
- src->SrcRegister.File,
- src->SrcRegister.Index,
- src->SrcRegister.Indirect);
+ src->Register.File,
+ src->Register.Index,
+ src->Register.Indirect);
/* Convert 3-bit swizzle to 2-bit.
*/
- reg.dw1.bits.swizzle = BRW_SWIZZLE4(src->SrcRegister.SwizzleX,
- src->SrcRegister.SwizzleY,
- src->SrcRegister.SwizzleZ,
- src->SrcRegister.SwizzleW);
+ reg.dw1.bits.swizzle = BRW_SWIZZLE4(src->Register.SwizzleX,
+ src->Register.SwizzleY,
+ src->Register.SwizzleZ,
+ src->Register.SwizzleW);
- reg.negate = src->SrcRegister.Negate ? 1 : 0;
+ reg.negate = src->Register.Negate ? 1 : 0;
/* XXX: abs, absneg
*/
int i;
GLuint len_vertext_header = 2;
- if (c->key.copy_edgeflag) {
- brw_MOV(p,
- get_reg(c, TGSI_FILE_OUTPUT, c->prog_data.output_edgeflag),
- brw_imm_f(1));
- }
-
/* Build ndc coords */
ndc = get_tmp(c);
/* ndc = 1.0 / pos.w */
const struct tgsi_full_instruction *inst)
{
unsigned opcode = inst->Instruction.Opcode;
- unsigned label = inst->InstructionExtLabel.Label;
+ unsigned label = inst->Label.Label;
struct brw_compile *p = &c->func;
struct brw_reg args[3], dst;
GLuint i;
/* Get argument regs.
*/
for (i = 0; i < 3; i++) {
- args[i] = get_arg(c, &inst->FullSrcRegisters[i], i);
+ args[i] = get_arg(c, &inst->Src[i], i);
}
/* Get dest regs. Note that it is possible for a reg to be both
* care needs to be taken emitting multi-operation instructions.
*/
dst = get_dst(c,
- inst->FullDstRegisters[0].DstRegister.File,
- inst->FullDstRegisters[0].DstRegister.Index,
- inst->FullDstRegisters[0].DstRegister.WriteMask);
+ inst->Dst[0].Register.File,
+ inst->Dst[0].Register.Index,
+ inst->Dst[0].Register.WriteMask);
/* XXX: saturate
*/
emit_math1(c, BRW_MATH_FUNCTION_INV, dst, args[0], BRW_MATH_PRECISION_FULL);
break;
case TGSI_OPCODE_RSQ:
- emit_math1(c, BRW_MATH_FUNCTION_RSQ, dst, args[0], BRW_MATH_PRECISION_FULL);
+ emit_math1(c, BRW_MATH_FUNCTION_RSQ, dst,
+ brw_swizzle(args[0], 0,0,0,0), BRW_MATH_PRECISION_FULL);
break;
case TGSI_OPCODE_SEQ:
emit_seq(p, dst, args[0], args[1]);
struct brw_instruction *end_inst, *last_inst;
struct tgsi_parse_context parse;
struct tgsi_full_instruction *inst;
- boolean done = FALSE;
- int i;
if (BRW_DEBUG & DEBUG_VS)
tgsi_dump(c->vp->tokens, 0);
brw_set_compression_control(p, BRW_COMPRESSION_NONE);
brw_set_access_mode(p, BRW_ALIGN_16);
- /* Inputs */
- tgsi_parse_init( &parse, tokens );
- while( !tgsi_parse_end_of_tokens( &parse ) ) {
- tgsi_parse_token( &parse );
-
- switch( parse.FullToken.Token.Type ) {
- case TGSI_TOKEN_TYPE_DECLARATION:
- /* Nothing to do -- using info from tgsi_scan().
- */
- break;
-
- case TGSI_TOKEN_TYPE_IMMEDIATE: {
- static const float id[4] = {0,0,0,1};
- const float *imm = &parse.FullToken.FullImmediate.u[0].Float;
- unsigned size = parse.FullToken.FullImmediate.Immediate.NrTokens - 1;
-
- for (i = 0; i < size; i++)
- c->immediate[c->nr_immediates][i] = imm[i];
-
- for ( ; i < 4; i++)
- c->immediate[c->nr_immediates][i] = id[i];
-
- c->nr_immediates++;
- break;
- }
-
- case TGSI_TOKEN_TYPE_INSTRUCTION:
- done = 1;
- break;
- }
- }
/* Static register allocation
*/