Squashed commit of the following:
[mesa.git] / src / gallium / drivers / i965 / brw_wm.c
index 7f2cb152563172c3d1bab896f3622e348105e575..5d66e61fbc1384e9ed9f62aad1ccb912b87957ef 100644 (file)
 
 #include "brw_context.h"
 #include "brw_screen.h"
-#include "brw_util.h"
 #include "brw_wm.h"
 #include "brw_state.h"
 #include "brw_debug.h"
+#include "brw_resource.h"
 #include "brw_pipe_rast.h"
 
 
@@ -56,6 +56,15 @@ GLuint brw_wm_nr_args( GLuint opcode )
    case WM_FB_WRITE:
    case WM_PINTERP:
       return 3;
+   case TGSI_OPCODE_TEX:
+   case TGSI_OPCODE_TXP:
+   case TGSI_OPCODE_TXB:
+   case TGSI_OPCODE_TXD:
+      /* sampler arg is held as a field in the instruction, not in an
+       * actual register:
+       */
+      return tgsi_get_opcode_info(opcode)->num_src - 1;
+
    default:
       assert(opcode < MAX_OPCODE);
       return tgsi_get_opcode_info(opcode)->num_src;
@@ -171,7 +180,7 @@ static enum pipe_error do_wm_prog( struct brw_context *brw,
       /* XXX: GLSL support
        */
       exit(1);
-      //brw_wm_branching_shader_emit(brw, c);
+      /* brw_wm_branching_shader_emit(brw, c); */
    }
    else {
       c->dispatch_width = 16;
@@ -225,7 +234,8 @@ static void brw_wm_populate_key( struct brw_context *brw,
       line_aa = AA_NEVER;
       break;
    case PIPE_PRIM_LINES:
-      line_aa = AA_ALWAYS;
+      line_aa = (brw->curr.rast->templ.line_smooth ? 
+                 AA_ALWAYS : AA_NEVER);
       break;
    default:
       line_aa = brw->curr.rast->unfilled_aa_line;
@@ -242,13 +252,13 @@ static void brw_wm_populate_key( struct brw_context *brw,
 
 
    /* PIPE_NEW_BOUND_TEXTURES */
-   for (i = 0; i < brw->curr.num_textures; i++) {
-      const struct brw_texture *tex = brw_texture(brw->curr.texture[i]);
+   for (i = 0; i < brw->curr.num_fragment_sampler_views; i++) {
+      const struct brw_texture *tex = brw_texture(brw->curr.fragment_sampler_views[i]->texture);
         
-      if (tex->base.format == PIPE_FORMAT_YCBCR)
+      if (tex->b.b.format == PIPE_FORMAT_UYVY)
         key->yuvtex_mask |= 1 << i;
 
-      if (tex->base.format == PIPE_FORMAT_YCBCR_REV)
+      if (tex->b.b.format == PIPE_FORMAT_YUYV)
         key->yuvtex_swap_mask |= 1 << i;
 
       /* XXX: shadow texture
@@ -259,6 +269,10 @@ static void brw_wm_populate_key( struct brw_context *brw,
    /* CACHE_NEW_VS_PROG */
    key->vp_nr_outputs = brw->vs.prog_data->nr_outputs;
 
+   key->nr_cbufs = brw->curr.fb.nr_cbufs;
+
+   key->nr_inputs = brw->curr.fragment_shader->info.num_inputs;
+
    /* The unique fragment program ID */
    key->program_string_id = brw->curr.fragment_shader->id;
 }
@@ -294,6 +308,7 @@ const struct brw_tracked_state brw_wm_prog = {
       .mesa  = (PIPE_NEW_FRAGMENT_SHADER |
                PIPE_NEW_DEPTH_STENCIL_ALPHA |
                PIPE_NEW_RAST |
+               PIPE_NEW_NR_CBUFS |
                PIPE_NEW_BOUND_TEXTURES),
       .brw   = (BRW_NEW_WM_INPUT_DIMENSIONS |
                BRW_NEW_REDUCED_PRIMITIVE),