r600g: make r600_drawl inherit pipe_draw_info

[mesa.git] / src / gallium / drivers / i965 / brw_wm.h

diff --git a/src/gallium/drivers/i965/brw_wm.h b/src/gallium/drivers/i965/brw_wm.h
index 2cd5bb708186a4ae4a6b07606b8f61afa276927d..f1ca9f6369661f18d8619b41391bb147399ad2ff 100644 (file)
--- a/src/gallium/drivers/i965/brw_wm.h
+++ b/src/gallium/drivers/i965/brw_wm.h
@@ -56,9 +56,6 @@
 #define AA_ALWAYS    2
 
 struct brw_wm_prog_key {
-   unsigned proj_attrib_mask;    /**< one bit per fragment program attribute */
-   unsigned linear_attrib_mask;  /**< linear interpolation vs perspective interp */
-
    GLuint source_depth_reg:3;
    GLuint aa_dest_stencil_reg:3;
    GLuint dest_depth_reg:3;
@@ -73,7 +70,9 @@ struct brw_wm_prog_key {
    GLuint yuvtex_swap_mask:16; /* UV swaped */
 
    GLuint vp_nr_outputs:6;
+   GLuint nr_inputs:6;
    GLuint nr_cbufs:3;
+   GLuint has_flow_control:1;
 
    GLuint program_string_id;
 };
@@ -130,22 +129,18 @@ struct brw_wm_ref {
    GLuint insn:24;
 };
 
-struct brw_wm_imm_ref {
-   const struct brw_wm_ref *ref;
-   GLfloat imm1f;
-};
-
-
 struct brw_wm_instruction {
    struct brw_wm_value *dst[4];
    struct brw_wm_ref *src[3][4];
    GLuint opcode:8;
    GLuint saturate:1;
    GLuint writemask:4;
+   GLuint sampler:4;
    GLuint tex_unit:4;   /* texture/sampler unit for texture instructions */
-   GLuint tex_target:4; /* TGSI_TEXTURE_x for texture instructions*/
+   GLuint target:4;     /* TGSI_TEXTURE_x for texture instructions,
+                         * target binding table index for FB_WRITE
+                         */
    GLuint eot:1;       /* End of thread indicator for FB_WRITE*/
-   GLuint target:10;    /* target binding table index for FB_WRITE*/
 };
 
 
@@ -176,9 +171,41 @@ struct brw_wm_instruction {
 #define MAX_WM_OPCODE     (MAX_OPCODE + 9)
 
 #define BRW_FILE_PAYLOAD   (TGSI_FILE_COUNT)
-#define PAYLOAD_DEPTH      (FRAG_ATTRIB_MAX) /* ?? */
+#define PAYLOAD_DEPTH      (PIPE_MAX_SHADER_INPUTS) /* ?? */
+
+#define X    0
+#define Y    1
+#define Z    2
+#define W    3
+
+
+struct brw_fp_src {
+   unsigned file:4;
+   unsigned index:16;
+   unsigned swizzle:8;
+   unsigned indirect:1;
+   unsigned negate:1;
+   unsigned abs:1;
+};
+
+struct brw_fp_dst {
+   unsigned file:4;
+   unsigned index:16;
+   unsigned writemask:4;
+   unsigned indirect:1;
+   unsigned saturate:1;
+};
+
+struct brw_fp_instruction {
+   struct brw_fp_dst dst;
+   struct brw_fp_src src[3];
+   unsigned opcode:8;
+   unsigned target:8; /* XXX: special usage for FB_WRITE */
+   unsigned tex_unit:4;
+   unsigned sampler:4;
+   unsigned pad:8;
+};
 
-struct brw_passfp_program;
 
 struct brw_wm_compile {
    struct brw_compile func;
@@ -198,9 +225,26 @@ struct brw_wm_compile {
     * simplifying and adding instructions for interpolation and
     * framebuffer writes.
     */
-   struct brw_passfp_program *pass_fp;
-
-
+   struct {
+      GLfloat v[4];
+      unsigned nr;
+   } immediate[BRW_WM_MAX_CONST+3];
+   GLuint nr_immediates;
+   
+   struct brw_fp_instruction fp_instructions[BRW_WM_MAX_INSN];
+   GLuint nr_fp_insns;
+   GLuint fp_temp;
+   GLuint fp_interp_emitted;
+   GLuint fp_fragcolor_emitted;
+   GLuint fp_first_internal_temp;
+
+   struct brw_fp_src fp_pixel_xy;
+   struct brw_fp_src fp_delta_xy;
+   struct brw_fp_src fp_pixel_w;
+
+
+   /* Subsequent passes using SSA representation:
+    */
    struct brw_wm_value vreg[BRW_WM_MAX_VREG];
    GLuint nr_vreg;
 
@@ -213,7 +257,7 @@ struct brw_wm_compile {
    } payload;
 
 
-   const struct brw_wm_ref *pass0_fp_reg[PROGRAM_PAYLOAD+1][256][4];
+   const struct brw_wm_ref *pass0_fp_reg[BRW_FILE_PAYLOAD+1][256][4];
 
    struct brw_wm_ref undef_ref;
    struct brw_wm_value undef_value;
@@ -224,9 +268,6 @@ struct brw_wm_compile {
    struct brw_wm_instruction instruction[BRW_WM_MAX_INSN];
    GLuint nr_insns;
 
-   struct brw_wm_imm_ref imm_ref[BRW_WM_MAX_CONST];
-   GLuint nr_imm_refs;
-
    struct brw_wm_grf pass2_grf[BRW_WM_MAX_GRF/2];
 
    GLuint grf_limit;
@@ -241,7 +282,7 @@ struct brw_wm_compile {
    struct {
       GLboolean inited;
       struct brw_reg reg;
-   } wm_regs[PROGRAM_PAYLOAD+1][256][4];
+   } wm_regs[BRW_FILE_PAYLOAD+1][256][4];
 
    GLboolean used_grf[BRW_WM_MAX_GRF];
    GLuint first_free_grf;
@@ -258,13 +299,15 @@ struct brw_wm_compile {
       GLint index;
       struct brw_reg reg;
    } current_const[3];
+
+   GLuint error;
 };
 
 
 GLuint brw_wm_nr_args( GLuint opcode );
 GLuint brw_wm_is_scalar_result( GLuint opcode );
 
-void brw_wm_pass_fp( struct brw_wm_compile *c );
+int brw_wm_pass_fp( struct brw_wm_compile *c );
 void brw_wm_pass0( struct brw_wm_compile *c );
 void brw_wm_pass1( struct brw_wm_compile *c );
 void brw_wm_pass2( struct brw_wm_compile *c );
@@ -282,12 +325,14 @@ void brw_wm_print_insn( struct brw_wm_compile *c,
 void brw_wm_print_program( struct brw_wm_compile *c,
                           const char *stage );
 
+void brw_wm_print_fp_program( struct brw_wm_compile *c,
+                              const char *stage );
+
 void brw_wm_lookup_iz( GLuint line_aa,
                       GLuint lookup,
                       GLboolean ps_uses_depth,
                       struct brw_wm_prog_key *key );
 
-GLboolean brw_wm_has_flow_control(const struct brw_fragment_shader *fp);
 void brw_wm_branching_shader_emit(struct brw_context *brw, struct brw_wm_compile *c);
 
 void emit_ddxy(struct brw_compile *p,