* Chia-I Wu <olv@lunarg.com>
*/
+#include "util/u_prim.h"
#include "intel_winsys.h"
#include "ilo_3d_pipeline.h"
+#include "ilo_blit.h"
#include "ilo_context.h"
#include "ilo_cp.h"
#include "ilo_query.h"
/* in pairs */
assert(q->reg_read % 2 == 0);
- intel_bo_map(q->bo, false);
- vals = intel_bo_get_virtual(q->bo);
+ vals = intel_bo_map(q->bo, false);
for (i = 1; i < q->reg_read; i += 2)
depth_count += vals[i] - vals[i - 1];
intel_bo_unmap(q->bo);
assert(q->reg_read == 1);
- intel_bo_map(q->bo, false);
- vals = intel_bo_get_virtual(q->bo);
+ vals = intel_bo_map(q->bo, false);
timestamp = vals[0];
intel_bo_unmap(q->bo);
/* in pairs */
assert(q->reg_read % 2 == 0);
- intel_bo_map(q->bo, false);
- vals = intel_bo_get_virtual(q->bo);
+ vals = intel_bo_map(q->bo, false);
for (i = 1; i < q->reg_read; i += 2)
elapsed += vals[i] - vals[i - 1];
q->reg_read = 0;
}
+static void
+process_query_for_pipeline_statistics(struct ilo_3d *hw3d,
+ struct ilo_query *q)
+{
+ const uint64_t *vals;
+ int i;
+
+ assert(q->reg_read % 22 == 0);
+
+ vals = intel_bo_map(q->bo, false);
+
+ for (i = 0; i < q->reg_read; i += 22) {
+ struct pipe_query_data_pipeline_statistics *stats =
+ &q->data.pipeline_statistics;
+ const uint64_t *begin = vals + i;
+ const uint64_t *end = begin + 11;
+
+ stats->ia_vertices += end[0] - begin[0];
+ stats->ia_primitives += end[1] - begin[1];
+ stats->vs_invocations += end[2] - begin[2];
+ stats->gs_invocations += end[3] - begin[3];
+ stats->gs_primitives += end[4] - begin[4];
+ stats->c_invocations += end[5] - begin[5];
+ stats->c_primitives += end[6] - begin[6];
+ stats->ps_invocations += end[7] - begin[7];
+ stats->hs_invocations += end[8] - begin[8];
+ stats->ds_invocations += end[9] - begin[9];
+ stats->cs_invocations += end[10] - begin[10];
+ }
+
+ intel_bo_unmap(q->bo);
+
+ q->reg_read = 0;
+}
+
static void
ilo_3d_resume_queries(struct ilo_3d *hw3d)
{
ilo_3d_pipeline_emit_write_timestamp(hw3d->pipeline,
q->bo, q->reg_read++);
}
+
+ /* resume pipeline statistics queries */
+ LIST_FOR_EACH_ENTRY(q, &hw3d->pipeline_statistics_queries, list) {
+ /* accumulate the result if the bo is alreay full */
+ if (q->reg_read >= q->reg_total)
+ process_query_for_pipeline_statistics(hw3d, q);
+
+ ilo_3d_pipeline_emit_write_statistics(hw3d->pipeline,
+ q->bo, q->reg_read);
+ q->reg_read += 11;
+ }
}
static void
ilo_3d_pipeline_emit_write_timestamp(hw3d->pipeline,
q->bo, q->reg_read++);
}
+
+ /* pause pipeline statistics queries */
+ LIST_FOR_EACH_ENTRY(q, &hw3d->pipeline_statistics_queries, list) {
+ assert(q->reg_read < q->reg_total);
+ ilo_3d_pipeline_emit_write_statistics(hw3d->pipeline,
+ q->bo, q->reg_read);
+ q->reg_read += 11;
+ }
}
static void
ilo_3d_pause_queries(hw3d);
}
-static void
+void
ilo_3d_own_render_ring(struct ilo_3d *hw3d)
{
- ilo_cp_set_ring(hw3d->cp, ILO_CP_RING_RENDER);
+ ilo_cp_set_ring(hw3d->cp, INTEL_RING_RENDER);
if (ilo_cp_set_owner(hw3d->cp, &hw3d->owner, hw3d->owner_reserve))
ilo_3d_resume_queries(hw3d);
q->data.u64 = 0;
list_add(&q->list, &hw3d->prim_emitted_queries);
break;
+ case PIPE_QUERY_PIPELINE_STATISTICS:
+ /* reserve some space for pausing the query */
+ q->reg_cmd_size = ilo_3d_pipeline_estimate_size(hw3d->pipeline,
+ ILO_3D_PIPELINE_WRITE_STATISTICS, NULL);
+ hw3d->owner_reserve += q->reg_cmd_size;
+ ilo_cp_set_owner(hw3d->cp, &hw3d->owner, hw3d->owner_reserve);
+
+ memset(&q->data.pipeline_statistics, 0,
+ sizeof(q->data.pipeline_statistics));
+
+ if (ilo_query_alloc_bo(q, 11 * 2, -1, hw3d->cp->winsys)) {
+ /* XXX we should check the aperture size */
+ ilo_3d_pipeline_emit_write_statistics(hw3d->pipeline,
+ q->bo, q->reg_read);
+ q->reg_read += 11;
+
+ list_add(&q->list, &hw3d->pipeline_statistics_queries);
+ }
+ break;
default:
assert(!"unknown query type");
break;
case PIPE_QUERY_PRIMITIVES_EMITTED:
list_del(&q->list);
break;
+ case PIPE_QUERY_PIPELINE_STATISTICS:
+ list_del(&q->list);
+
+ assert(q->reg_read + 11 <= q->reg_total);
+ hw3d->owner_reserve -= q->reg_cmd_size;
+ ilo_cp_set_owner(hw3d->cp, &hw3d->owner, hw3d->owner_reserve);
+ ilo_3d_pipeline_emit_write_statistics(hw3d->pipeline,
+ q->bo, q->reg_read);
+ q->reg_read += 11;
+ break;
default:
assert(!"unknown query type");
break;
case PIPE_QUERY_PRIMITIVES_GENERATED:
case PIPE_QUERY_PRIMITIVES_EMITTED:
break;
+ case PIPE_QUERY_PIPELINE_STATISTICS:
+ if (q->bo)
+ process_query_for_pipeline_statistics(hw3d, q);
+ break;
default:
assert(!"unknown query type");
break;
ilo_3d_pipeline_invalidate(hw3d->pipeline,
ILO_3D_PIPELINE_INVALIDATE_BATCH_BO |
ILO_3D_PIPELINE_INVALIDATE_STATE_BO);
- if (!hw3d->cp->render_ctx) {
- ilo_3d_pipeline_invalidate(hw3d->pipeline,
- ILO_3D_PIPELINE_INVALIDATE_HW);
- }
hw3d->new_batch = true;
}
list_inithead(&hw3d->time_elapsed_queries);
list_inithead(&hw3d->prim_generated_queries);
list_inithead(&hw3d->prim_emitted_queries);
+ list_inithead(&hw3d->pipeline_statistics_queries);
hw3d->pipeline = ilo_3d_pipeline_create(cp, dev);
if (!hw3d->pipeline) {
* happens in the middle of a batch buffer, we need to insert manual
* flushes.
*/
- need_flush = (ilo->dirty & ILO_DIRTY_FRAMEBUFFER);
+ need_flush = (ilo->dirty & ILO_DIRTY_FB);
/* same to SO target changes */
- need_flush |= (ilo->dirty & ILO_DIRTY_STREAM_OUTPUT_TARGETS);
+ need_flush |= (ilo->dirty & ILO_DIRTY_SO);
}
/* make sure there is enough room first */
}
if (max_len > ilo_cp_space(hw3d->cp)) {
- ilo_cp_flush(hw3d->cp);
+ ilo_cp_flush(hw3d->cp, "out of space");
need_flush = false;
assert(max_len <= ilo_cp_space(hw3d->cp));
}
return true;
/* Note: indices must be unsigned byte, unsigned short or unsigned int */
- switch (ilo->ib.state.index_size) {
+ switch (ilo->ib.index_size) {
case 1:
return ((restart_index & 0xff) == 0xff);
break;
return;
}
- if (ilo->ib.state.buffer) {
+ if (ilo->ib.buffer) {
struct pipe_transfer *transfer;
const void *map;
- map = pipe_buffer_map(pipe, ilo->ib.state.buffer,
+ map = pipe_buffer_map(pipe, ilo->ib.buffer,
PIPE_TRANSFER_READ, &transfer);
- sub_prim_count = ilo_find_sub_primitives(map + ilo->ib.state.offset,
- ilo->ib.state.index_size, info, restart_info);
+ sub_prim_count = ilo_find_sub_primitives(map + ilo->ib.offset,
+ ilo->ib.index_size, info, restart_info);
pipe_buffer_unmap(pipe, transfer);
}
else {
- sub_prim_count = ilo_find_sub_primitives(ilo->ib.state.user_buffer,
- ilo->ib.state.index_size, info, restart_info);
+ sub_prim_count = ilo_find_sub_primitives(ilo->ib.user_buffer,
+ ilo->ib.index_size, info, restart_info);
}
info = restart_info;
intel_bo_unreference(hw3d->kernel.bo);
hw3d->kernel.bo = intel_winsys_alloc_buffer(hw3d->cp->winsys,
- "kernel bo", new_size, 0);
+ "kernel bo", new_size, INTEL_DOMAIN_CPU);
if (!hw3d->kernel.bo) {
ilo_err("failed to allocate kernel bo\n");
return false;
struct ilo_3d *hw3d = ilo->hw3d;
int prim_generated, prim_emitted;
+ if (ilo_debug & ILO_DEBUG_DRAW) {
+ if (info->indexed) {
+ ilo_printf("indexed draw %s: "
+ "index start %d, count %d, vertex range [%d, %d]\n",
+ u_prim_name(info->mode), info->start, info->count,
+ info->min_index, info->max_index);
+ }
+ else {
+ ilo_printf("draw %s: vertex start %d, count %d\n",
+ u_prim_name(info->mode), info->start, info->count);
+ }
+
+ ilo_dump_dirty_flags(ilo->dirty);
+ }
+
if (!ilo_3d_pass_render_condition(ilo))
return;
if (!upload_shaders(hw3d, ilo->shader_cache))
return;
+ ilo_blit_resolve_framebuffer(ilo);
+
/* If draw_vbo ever fails, return immediately. */
if (!draw_vbo(hw3d, ilo, &prim_generated, &prim_emitted))
return;
ilo->dirty = 0x0;
hw3d->new_batch = false;
+ /* avoid dangling pointer reference */
+ ilo->draw = NULL;
+
update_prim_count(hw3d, prim_generated, prim_emitted);
if (ilo_debug & ILO_DEBUG_NOCACHE)
struct ilo_context *ilo = ilo_context(pipe);
struct ilo_3d *hw3d = ilo->hw3d;
- if (ilo->cp->ring != ILO_CP_RING_RENDER)
+ if (ilo->cp->ring != INTEL_RING_RENDER)
return;
ilo_3d_pipeline_emit_flush(hw3d->pipeline);
/* don't know why */
if (ilo->dev->gen >= ILO_GEN(7))
- ilo_cp_flush(hw3d->cp);
+ ilo_cp_flush(hw3d->cp, "texture barrier");
}
static void