ilo: add BLT-based blitting methods to ilo_blitter
[mesa.git] / src / gallium / drivers / ilo / ilo_3d_pipeline_gen6.c
index 3e716006930618d405fb54dbd9bc909b50d96ef8..c60fc014005779176350f367853aee837dcd8e85 100644 (file)
@@ -210,7 +210,8 @@ gen6_pipeline_common_base_address(struct ilo_3d_pipeline *p,
                                   struct gen6_pipeline_session *session)
 {
    /* STATE_BASE_ADDRESS */
-   if (session->state_bo_changed || session->instruction_bo_changed) {
+   if (session->state_bo_changed || session->instruction_bo_changed ||
+       session->batch_bo_changed) {
       if (p->dev->gen == ILO_GEN(6))
          gen6_wa_pipe_control_post_sync(p, false);
 
@@ -396,15 +397,16 @@ gen6_pipeline_vf(struct ilo_3d_pipeline *p,
                  struct gen6_pipeline_session *session)
 {
    /* 3DSTATE_INDEX_BUFFER */
-   if (DIRTY(INDEX_BUFFER)) {
+   if (DIRTY(INDEX_BUFFER) || session->batch_bo_changed) {
       p->gen6_3DSTATE_INDEX_BUFFER(p->dev,
             &ilo->ib.state, session->info->primitive_restart, p->cp);
    }
 
    /* 3DSTATE_VERTEX_BUFFERS */
-   if (DIRTY(VERTEX_BUFFERS)) {
+   if (DIRTY(VERTEX_BUFFERS) || DIRTY(VERTEX_ELEMENTS) ||
+       session->batch_bo_changed) {
       p->gen6_3DSTATE_VERTEX_BUFFERS(p->dev,
-            ilo->vb.states, NULL, ilo->vb.enabled_mask, p->cp);
+            ilo->vb.states, ilo->vb.enabled_mask, ilo->ve, p->cp);
    }
 
    /* 3DSTATE_VERTEX_ELEMENTS */
@@ -425,8 +427,7 @@ gen6_pipeline_vf(struct ilo_3d_pipeline *p,
          prepend_generate_ids = (info->has_instanceid || info->has_vertexid);
       }
 
-      p->gen6_3DSTATE_VERTEX_ELEMENTS(p->dev,
-            ve->states, ve->count,
+      p->gen6_3DSTATE_VERTEX_ELEMENTS(p->dev, ve,
             last_velement_edgeflag, prepend_generate_ids, p->cp);
    }
 }
@@ -477,7 +478,7 @@ gen6_pipeline_vs(struct ilo_3d_pipeline *p,
    /* 3DSTATE_VS */
    if (emit_3dstate_vs) {
       const struct ilo_shader *vs = (ilo->vs)? ilo->vs->shader : NULL;
-      const int num_samplers = ilo->samplers[PIPE_SHADER_VERTEX].num_samplers;
+      const int num_samplers = ilo->sampler[PIPE_SHADER_VERTEX].count;
 
       p->gen6_3DSTATE_VS(p->dev, vs, num_samplers, p->cp);
    }
@@ -598,24 +599,25 @@ gen6_pipeline_clip(struct ilo_3d_pipeline *p,
    /* 3DSTATE_CLIP */
    if (DIRTY(RASTERIZER) || DIRTY(FS) ||
        DIRTY(VIEWPORT) || DIRTY(FRAMEBUFFER)) {
-      const struct pipe_viewport_state *vp = &ilo->viewport.states[0];
-      bool enable_guardband;
-      float x1, x2, y1, y2;
+      bool enable_guardband = true;
+      unsigned i;
 
       /*
        * We do not do 2D clipping yet.  Guard band test should only be enabled
        * when the viewport is larger than the framebuffer.
        */
-      x1 = fabs(vp->scale[0]) * -1.0f + vp->translate[0];
-      x2 = fabs(vp->scale[0]) *  1.0f + vp->translate[0];
-      y1 = fabs(vp->scale[1]) * -1.0f + vp->translate[1];
-      y2 = fabs(vp->scale[1]) *  1.0f + vp->translate[1];
-      enable_guardband =
-         (x1 <= 0.0f && x2 >= (float) ilo->framebuffer.width &&
-          y1 <= 0.0f && y2 >= (float) ilo->framebuffer.height);
+      for (i = 0; i < ilo->viewport.count; i++) {
+         const struct ilo_viewport_cso *vp = &ilo->viewport.cso[i];
+
+         if (vp->min_x > 0.0f || vp->max_x < ilo->fb.state.width ||
+             vp->min_y > 0.0f || vp->max_y < ilo->fb.state.height) {
+            enable_guardband = false;
+            break;
+         }
+      }
 
       p->gen6_3DSTATE_CLIP(p->dev,
-            &ilo->rasterizer->state,
+            ilo->rasterizer,
             (ilo->fs && ilo->fs->shader->in.has_linear_interp),
             enable_guardband, 1, p->cp);
    }
@@ -633,8 +635,7 @@ gen6_pipeline_sf(struct ilo_3d_pipeline *p,
          (ilo->gs)? ilo->gs->shader :
          (ilo->vs)? ilo->vs->shader : NULL;
 
-      p->gen6_3DSTATE_SF(p->dev,
-            &ilo->rasterizer->state, fs, last_sh, p->cp);
+      p->gen6_3DSTATE_SF(p->dev, ilo->rasterizer, fs, last_sh, p->cp);
    }
 }
 
@@ -649,7 +650,7 @@ gen6_pipeline_sf_rect(struct ilo_3d_pipeline *p,
          gen6_wa_pipe_control_post_sync(p, false);
 
       p->gen6_3DSTATE_DRAWING_RECTANGLE(p->dev, 0, 0,
-            ilo->framebuffer.width, ilo->framebuffer.height, p->cp);
+            ilo->fb.state.width, ilo->fb.state.height, p->cp);
    }
 }
 
@@ -667,13 +668,10 @@ gen6_pipeline_wm(struct ilo_3d_pipeline *p,
        DIRTY(BLEND) || DIRTY(DEPTH_STENCIL_ALPHA) ||
        DIRTY(RASTERIZER)) {
       const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
-      const int num_samplers =
-         ilo->samplers[PIPE_SHADER_FRAGMENT].num_samplers;
-      const bool dual_blend = (!ilo->blend->logicop_enable &&
-                                  ilo->blend->rt[0].blend_enable &&
-                                  util_blend_state_is_dual(ilo->blend, 0));
-      const bool cc_may_kill = (ilo->depth_stencil_alpha->alpha.enabled ||
-                                   ilo->blend->alpha_to_coverage);
+      const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
+      const bool dual_blend = ilo->blend->dual_blend;
+      const bool cc_may_kill = (ilo->dsa->alpha.enabled ||
+                                ilo->blend->alpha_to_coverage);
 
       if (fs)
          assert(!fs->pcb.clip_state_size);
@@ -694,12 +692,8 @@ gen6_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
    /* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
    if (DIRTY(SAMPLE_MASK) || DIRTY(FRAMEBUFFER)) {
       const uint32_t *packed_sample_pos;
-      int num_samples = 1;
 
-      if (ilo->framebuffer.nr_cbufs)
-         num_samples = ilo->framebuffer.cbufs[0]->texture->nr_samples;
-
-      packed_sample_pos = (num_samples > 1) ?
+      packed_sample_pos = (ilo->fb.num_samples > 1) ?
          &p->packed_sample_position_4x : &p->packed_sample_position_1x;
 
       if (p->dev->gen == ILO_GEN(6)) {
@@ -707,11 +701,12 @@ gen6_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
          gen6_wa_pipe_control_wm_multisample_flush(p);
       }
 
-      p->gen6_3DSTATE_MULTISAMPLE(p->dev, num_samples, packed_sample_pos,
+      p->gen6_3DSTATE_MULTISAMPLE(p->dev,
+            ilo->fb.num_samples, packed_sample_pos,
             ilo->rasterizer->state.half_pixel_center, p->cp);
 
       p->gen6_3DSTATE_SAMPLE_MASK(p->dev,
-            (num_samples > 1) ? ilo->sample_mask : 0x1, p->cp);
+            (ilo->fb.num_samples > 1) ? ilo->sample_mask : 0x1, p->cp);
    }
 }
 
@@ -721,14 +716,13 @@ gen6_pipeline_wm_depth(struct ilo_3d_pipeline *p,
                        struct gen6_pipeline_session *session)
 {
    /* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
-   if (DIRTY(FRAMEBUFFER)) {
+   if (DIRTY(FRAMEBUFFER) || session->batch_bo_changed) {
       if (p->dev->gen == ILO_GEN(6)) {
          gen6_wa_pipe_control_post_sync(p, false);
          gen6_wa_pipe_control_wm_depth_flush(p);
       }
 
-      p->gen6_3DSTATE_DEPTH_BUFFER(p->dev,
-            ilo->framebuffer.zsbuf, false, p->cp);
+      p->gen6_3DSTATE_DEPTH_BUFFER(p->dev, ilo->fb.state.zsbuf, p->cp);
 
       /* TODO */
       p->gen6_3DSTATE_CLEAR_PARAMS(p->dev, 0, p->cp);
@@ -779,23 +773,23 @@ gen6_pipeline_state_viewports(struct ilo_3d_pipeline *p,
    /* SF_CLIP_VIEWPORT and CC_VIEWPORT */
    if (p->dev->gen >= ILO_GEN(7) && DIRTY(VIEWPORT)) {
       p->state.SF_CLIP_VIEWPORT = p->gen7_SF_CLIP_VIEWPORT(p->dev,
-            ilo->viewport.states, ilo->viewport.count, p->cp);
+            ilo->viewport.cso, ilo->viewport.count, p->cp);
 
       p->state.CC_VIEWPORT = p->gen6_CC_VIEWPORT(p->dev,
-            ilo->viewport.states, ilo->viewport.count, p->cp);
+            ilo->viewport.cso, ilo->viewport.count, p->cp);
 
       session->viewport_state_changed = true;
    }
    /* SF_VIEWPORT, CLIP_VIEWPORT, and CC_VIEWPORT */
    else if (DIRTY(VIEWPORT)) {
       p->state.CLIP_VIEWPORT = p->gen6_CLIP_VIEWPORT(p->dev,
-            ilo->viewport.states, ilo->viewport.count, p->cp);
+            ilo->viewport.cso, ilo->viewport.count, p->cp);
 
       p->state.SF_VIEWPORT = p->gen6_SF_VIEWPORT(p->dev,
-            ilo->viewport.states, ilo->viewport.count, p->cp);
+            ilo->viewport.cso, ilo->viewport.count, p->cp);
 
       p->state.CC_VIEWPORT = p->gen6_CC_VIEWPORT(p->dev,
-            ilo->viewport.states, ilo->viewport.count, p->cp);
+            ilo->viewport.cso, ilo->viewport.count, p->cp);
 
       session->viewport_state_changed = true;
    }
@@ -809,18 +803,16 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
    /* BLEND_STATE */
    if (DIRTY(BLEND) || DIRTY(FRAMEBUFFER) || DIRTY(DEPTH_STENCIL_ALPHA)) {
       p->state.BLEND_STATE = p->gen6_BLEND_STATE(p->dev,
-            ilo->blend, &ilo->framebuffer,
-            &ilo->depth_stencil_alpha->alpha, p->cp);
+            ilo->blend, &ilo->fb, &ilo->dsa->alpha, p->cp);
 
       session->cc_state_blend_changed = true;
    }
 
    /* COLOR_CALC_STATE */
    if (DIRTY(DEPTH_STENCIL_ALPHA) || DIRTY(STENCIL_REF) || DIRTY(BLEND_COLOR)) {
-      p->state.COLOR_CALC_STATE = p->gen6_COLOR_CALC_STATE(p->dev,
-            &ilo->stencil_ref,
-            ilo->depth_stencil_alpha->alpha.ref_value,
-            &ilo->blend_color, p->cp);
+      p->state.COLOR_CALC_STATE =
+         p->gen6_COLOR_CALC_STATE(p->dev, &ilo->stencil_ref,
+               ilo->dsa->alpha.ref_value, &ilo->blend_color, p->cp);
 
       session->cc_state_cc_changed = true;
    }
@@ -828,8 +820,7 @@ gen6_pipeline_state_cc(struct ilo_3d_pipeline *p,
    /* DEPTH_STENCIL_STATE */
    if (DIRTY(DEPTH_STENCIL_ALPHA)) {
       p->state.DEPTH_STENCIL_STATE =
-         p->gen6_DEPTH_STENCIL_STATE(p->dev,
-               ilo->depth_stencil_alpha, p->cp);
+         p->gen6_DEPTH_STENCIL_STATE(p->dev, ilo->dsa, p->cp);
 
       session->cc_state_dsa_changed = true;
    }
@@ -844,7 +835,7 @@ gen6_pipeline_state_scissors(struct ilo_3d_pipeline *p,
    if (DIRTY(SCISSOR) || DIRTY(VIEWPORT)) {
       /* there should be as many scissors as there are viewports */
       p->state.SCISSOR_RECT = p->gen6_SCISSOR_RECT(p->dev,
-            ilo->scissor.states, ilo->viewport.count, p->cp);
+            &ilo->scissor, ilo->viewport.count, p->cp);
 
       session->scissor_state_changed = true;
    }
@@ -861,12 +852,13 @@ gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
       uint32_t *surface_state = &p->state.wm.SURFACE_STATE[offset];
       int i;
 
-      for (i = 0; i < ilo->framebuffer.nr_cbufs; i++) {
-         const struct pipe_surface *surface = ilo->framebuffer.cbufs[i];
+      for (i = 0; i < ilo->fb.state.nr_cbufs; i++) {
+         const struct ilo_surface_cso *surface =
+            (const struct ilo_surface_cso *) ilo->fb.state.cbufs[i];
 
-         assert(surface);
+         assert(surface && surface->is_rt);
          surface_state[i] =
-            p->gen6_surf_SURFACE_STATE(p->dev, surface, p->cp);
+            p->gen6_SURFACE_STATE(p->dev, &surface->u.rt, true, p->cp);
       }
 
       /*
@@ -874,14 +866,14 @@ gen6_pipeline_state_surfaces_rt(struct ilo_3d_pipeline *p,
        * brw_update_renderbuffer_surfaces() does.  I don't know why.
        */
       if (i == 0) {
-         struct pipe_surface null_surface;
+         struct ilo_view_surface null_surface;
 
-         memset(&null_surface, 0, sizeof(null_surface));
-         null_surface.width = ilo->framebuffer.width;
-         null_surface.height = ilo->framebuffer.height;
+         ilo_gpe_init_view_surface_null(p->dev,
+               ilo->fb.state.width, ilo->fb.state.height,
+               1, 0, &null_surface);
 
          surface_state[i] =
-            p->gen6_surf_SURFACE_STATE(p->dev, &null_surface, p->cp);
+            p->gen6_SURFACE_STATE(p->dev, &null_surface, true, p->cp);
 
          i++;
       }
@@ -947,10 +939,9 @@ gen6_pipeline_state_surfaces_view(struct ilo_3d_pipeline *p,
                                   int shader_type,
                                   struct gen6_pipeline_session *session)
 {
-   const struct pipe_sampler_view **views =
-      (const struct pipe_sampler_view **)
-      ilo->sampler_views[shader_type].views;
-   const int num_views = ilo->sampler_views[shader_type].num_views;
+   const struct pipe_sampler_view * const *views =
+      (const struct pipe_sampler_view **) ilo->view[shader_type].states;
+   const int num_views = ilo->view[shader_type].count;
    uint32_t *surface_state;
    int offset, i;
    bool skip = false;
@@ -989,8 +980,11 @@ gen6_pipeline_state_surfaces_view(struct ilo_3d_pipeline *p,
 
    for (i = 0; i < num_views; i++) {
       if (views[i]) {
+         const struct ilo_view_cso *cso =
+            (const struct ilo_view_cso *) views[i];
+
          surface_state[i] =
-            p->gen6_view_SURFACE_STATE(p->dev, views[i], p->cp);
+            p->gen6_SURFACE_STATE(p->dev, &cso->surface, false, p->cp);
       }
       else {
          surface_state[i] = 0;
@@ -1009,9 +1003,8 @@ gen6_pipeline_state_surfaces_const(struct ilo_3d_pipeline *p,
                                    int shader_type,
                                    struct gen6_pipeline_session *session)
 {
-   const struct pipe_constant_buffer *buffers =
-      ilo->constant_buffers[shader_type].buffers;
-   const int num_buffers = ilo->constant_buffers[shader_type].num_buffers;
+   const struct ilo_cbuf_cso *buffers = ilo->cbuf[shader_type].cso;
+   const int num_buffers = ilo->cbuf[shader_type].count;
    uint32_t *surface_state;
    int offset, i;
    bool skip = false;
@@ -1049,9 +1042,11 @@ gen6_pipeline_state_surfaces_const(struct ilo_3d_pipeline *p,
       return;
 
    for (i = 0; i < num_buffers; i++) {
-      if (buffers[i].buffer) {
+      if (buffers[i].resource) {
+         const struct ilo_view_surface *surf = &buffers[i].surface;
+
          surface_state[i] =
-            p->gen6_cbuf_SURFACE_STATE(p->dev, &buffers[i], p->cp);
+            p->gen6_SURFACE_STATE(p->dev, surf, false, p->cp);
       }
       else {
          surface_state[i] = 0;
@@ -1129,14 +1124,12 @@ gen6_pipeline_state_samplers(struct ilo_3d_pipeline *p,
                              int shader_type,
                              struct gen6_pipeline_session *session)
 {
-   const struct pipe_sampler_state **samplers =
-      (const struct pipe_sampler_state **)
-      ilo->samplers[shader_type].samplers;
-   const struct pipe_sampler_view **views =
-      (const struct pipe_sampler_view **)
-      ilo->sampler_views[shader_type].views;
-   const int num_samplers = ilo->samplers[shader_type].num_samplers;
-   const int num_views = ilo->sampler_views[shader_type].num_views;
+   const struct ilo_sampler_cso * const *samplers =
+      ilo->sampler[shader_type].cso;
+   const struct pipe_sampler_view * const *views =
+      (const struct pipe_sampler_view **) ilo->view[shader_type].states;
+   const int num_samplers = ilo->sampler[shader_type].count;
+   const int num_views = ilo->view[shader_type].count;
    uint32_t *sampler_state, *border_color_state;
    bool emit_border_color = false;
    bool skip = false;
@@ -1185,7 +1178,7 @@ gen6_pipeline_state_samplers(struct ilo_3d_pipeline *p,
       for (i = 0; i < num_samplers; i++) {
          border_color_state[i] = (samplers[i]) ?
             p->gen6_SAMPLER_BORDER_COLOR_STATE(p->dev,
-                  &samplers[i]->border_color, p->cp) : 0;
+                  samplers[i], p->cp) : 0;
       }
    }
 
@@ -1307,11 +1300,24 @@ gen6_pipeline_prepare(const struct ilo_3d_pipeline *p,
 
    if (session->hw_ctx_changed) {
       /* these should be enough to make everything uploaded */
+      session->batch_bo_changed = true;
       session->state_bo_changed = true;
       session->instruction_bo_changed = true;
       session->prim_changed = true;
    }
    else {
+      /*
+       * Any state that involves resources needs to be re-emitted when the
+       * batch bo changed.  This is because we do not pin the resources and
+       * their offsets (or existence) may change between batch buffers.
+       *
+       * Since we messed around with ILO_3D_PIPELINE_INVALIDATE_BATCH_BO in
+       * handle_invalid_batch_bo(), use ILO_3D_PIPELINE_INVALIDATE_STATE_BO as
+       * a temporary workaround.
+       */
+      session->batch_bo_changed =
+         (p->invalidate_flags & ILO_3D_PIPELINE_INVALIDATE_STATE_BO);
+
       session->state_bo_changed =
          (p->invalidate_flags & ILO_3D_PIPELINE_INVALIDATE_STATE_BO);
       session->instruction_bo_changed =
@@ -1516,7 +1522,7 @@ gen6_pipeline_estimate_states(const struct ilo_3d_pipeline *p,
     * sampler views (vs, fs)
     * constant buffers (vs, fs)
     */
-   count = ilo->framebuffer.nr_cbufs;
+   count = ilo->fb.state.nr_cbufs;
 
    if (ilo->gs)
       count += ilo->gs->info.stream_output.num_outputs;
@@ -1524,8 +1530,8 @@ gen6_pipeline_estimate_states(const struct ilo_3d_pipeline *p,
       count += ilo->vs->info.stream_output.num_outputs;
 
    for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
-      count += ilo->sampler_views[shader_type].num_views;
-      count += ilo->constant_buffers[shader_type].num_buffers;
+      count += ilo->view[shader_type].count;
+      count += ilo->cbuf[shader_type].count;
    }
 
    if (count) {
@@ -1535,7 +1541,7 @@ gen6_pipeline_estimate_states(const struct ilo_3d_pipeline *p,
 
    /* samplers (vs, fs) */
    for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
-      count = ilo->samplers[shader_type].num_samplers;
+      count = ilo->sampler[shader_type].count;
       if (count) {
          size += gen6->estimate_state_size(p->dev,
                ILO_GPE_GEN6_SAMPLER_BORDER_COLOR_STATE, count);
@@ -1650,9 +1656,7 @@ ilo_3d_pipeline_init_gen6(struct ilo_3d_pipeline *p)
    GEN6_USE(p, DEPTH_STENCIL_STATE, gen6);
    GEN6_USE(p, SCISSOR_RECT, gen6);
    GEN6_USE(p, BINDING_TABLE_STATE, gen6);
-   GEN6_USE(p, surf_SURFACE_STATE, gen6);
-   GEN6_USE(p, view_SURFACE_STATE, gen6);
-   GEN6_USE(p, cbuf_SURFACE_STATE, gen6);
+   GEN6_USE(p, SURFACE_STATE, gen6);
    GEN6_USE(p, so_SURFACE_STATE, gen6);
    GEN6_USE(p, SAMPLER_STATE, gen6);
    GEN6_USE(p, SAMPLER_BORDER_COLOR_STATE, gen6);