freedreno/a3xx: add blend state
[mesa.git] / src / gallium / drivers / ilo / ilo_3d_pipeline_gen7.c
index 33f5a759984c9fdb047a3cf1aee1ed91cc061b29..51b2218184da665de3e7abab12b855d2ed77b847 100644 (file)
@@ -46,7 +46,7 @@ gen7_wa_pipe_control_cs_stall(struct ilo_3d_pipeline *p,
    struct intel_bo *bo = NULL;
    uint32_t dw1 = PIPE_CONTROL_CS_STALL;
 
-   assert(p->dev->gen == ILO_GEN(7));
+   assert(p->dev->gen == ILO_GEN(7) || p->dev->gen == ILO_GEN(7.5));
 
    /* emit once */
    if (p->state.has_gen6_wa_pipe_control)
@@ -88,13 +88,13 @@ gen7_wa_pipe_control_cs_stall(struct ilo_3d_pipeline *p,
       bo = p->workaround_bo;
    }
 
-   p->gen6_PIPE_CONTROL(p->dev, dw1, bo, 0, false, p->cp);
+   gen6_emit_PIPE_CONTROL(p->dev, dw1, bo, 0, false, p->cp);
 }
 
 static void
 gen7_wa_pipe_control_vs_depth_stall(struct ilo_3d_pipeline *p)
 {
-   assert(p->dev->gen == ILO_GEN(7));
+   assert(p->dev->gen == ILO_GEN(7) || p->dev->gen == ILO_GEN(7.5));
 
    /*
     * From the Ivy Bridge PRM, volume 2 part 1, page 106:
@@ -105,7 +105,7 @@ gen7_wa_pipe_control_vs_depth_stall(struct ilo_3d_pipeline *p)
     *      3DSTATE_SAMPLER_STATE_POINTER_VS command.  Only one PIPE_CONTROL
     *      needs to be sent before any combination of VS associated 3DSTATE."
     */
-   p->gen6_PIPE_CONTROL(p->dev,
+   gen6_emit_PIPE_CONTROL(p->dev,
          PIPE_CONTROL_DEPTH_STALL |
          PIPE_CONTROL_WRITE_IMMEDIATE,
          p->workaround_bo, 0, false, p->cp);
@@ -115,7 +115,7 @@ static void
 gen7_wa_pipe_control_wm_depth_stall(struct ilo_3d_pipeline *p,
                                     bool change_depth_buffer)
 {
-   assert(p->dev->gen == ILO_GEN(7));
+   assert(p->dev->gen == ILO_GEN(7) || p->dev->gen == ILO_GEN(7.5));
 
    /*
     * From the Ivy Bridge PRM, volume 2 part 1, page 276:
@@ -144,18 +144,18 @@ gen7_wa_pipe_control_wm_depth_stall(struct ilo_3d_pipeline *p,
     *      guarantee that the pipeline from WM onwards is already flushed
     *      (e.g., via a preceding MI_FLUSH)."
     */
-   p->gen6_PIPE_CONTROL(p->dev,
+   gen6_emit_PIPE_CONTROL(p->dev,
          PIPE_CONTROL_DEPTH_STALL,
          NULL, 0, false, p->cp);
 
    if (!change_depth_buffer)
       return;
 
-   p->gen6_PIPE_CONTROL(p->dev,
+   gen6_emit_PIPE_CONTROL(p->dev,
          PIPE_CONTROL_DEPTH_CACHE_FLUSH,
          NULL, 0, false, p->cp);
 
-   p->gen6_PIPE_CONTROL(p->dev,
+   gen6_emit_PIPE_CONTROL(p->dev,
          PIPE_CONTROL_DEPTH_STALL,
          NULL, 0, false, p->cp);
 }
@@ -172,7 +172,7 @@ gen7_wa_pipe_control_wm_max_threads_stall(struct ilo_3d_pipeline *p)
     *      between 3DPRIMITIVE commands, a PIPE_CONTROL command with Stall at
     *      Pixel Scoreboard set is required to be issued."
     */
-   p->gen6_PIPE_CONTROL(p->dev,
+   gen6_emit_PIPE_CONTROL(p->dev,
          PIPE_CONTROL_STALL_AT_SCOREBOARD,
          NULL, 0, false, p->cp);
 
@@ -186,13 +186,14 @@ gen7_pipeline_common_urb(struct ilo_3d_pipeline *p,
                          struct gen6_pipeline_session *session)
 {
    /* 3DSTATE_URB_{VS,GS,HS,DS} */
-   if (DIRTY(VERTEX_ELEMENTS) || DIRTY(VS)) {
-      const struct ilo_shader *vs = (ilo->vs) ? ilo->vs->shader : NULL;
+   if (DIRTY(VE) || DIRTY(VS)) {
       /* the first 16KB are reserved for VS and PS PCBs */
-      const int offset = 16 * 1024;
+      const int offset =
+         (p->dev->gen == ILO_GEN(7.5) && p->dev->gt == 3) ? 32768 : 16384;
       int vs_entry_size, vs_total_size;
 
-      vs_entry_size = (vs) ? vs->out.count : 0;
+      vs_entry_size = (ilo->vs) ?
+         ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_OUTPUT_COUNT) : 0;
 
       /*
        * From the Ivy Bridge PRM, volume 2 part 1, page 35:
@@ -210,12 +211,12 @@ gen7_pipeline_common_urb(struct ilo_3d_pipeline *p,
 
       gen7_wa_pipe_control_vs_depth_stall(p);
 
-      p->gen7_3DSTATE_URB_VS(p->dev,
+      gen7_emit_3DSTATE_URB_VS(p->dev,
             offset, vs_total_size, vs_entry_size, p->cp);
 
-      p->gen7_3DSTATE_URB_GS(p->dev, offset, 0, 0, p->cp);
-      p->gen7_3DSTATE_URB_HS(p->dev, offset, 0, 0, p->cp);
-      p->gen7_3DSTATE_URB_DS(p->dev, offset, 0, 0, p->cp);
+      gen7_emit_3DSTATE_URB_GS(p->dev, offset, 0, 0, p->cp);
+      gen7_emit_3DSTATE_URB_HS(p->dev, offset, 0, 0, p->cp);
+      gen7_emit_3DSTATE_URB_DS(p->dev, offset, 0, 0, p->cp);
    }
 }
 
@@ -227,16 +228,21 @@ gen7_pipeline_common_pcb_alloc(struct ilo_3d_pipeline *p,
    /* 3DSTATE_PUSH_CONSTANT_ALLOC_{VS,PS} */
    if (session->hw_ctx_changed) {
       /*
-       * push constant buffers are only allowed to take up at most the first
-       * 16KB of the URB
+       * Push constant buffers are only allowed to take up at most the first
+       * 16KB of the URB.  Split the space evenly for VS and FS.
        */
-      p->gen7_3DSTATE_PUSH_CONSTANT_ALLOC_VS(p->dev,
-            0, 8192, p->cp);
+      const int max_size =
+         (p->dev->gen == ILO_GEN(7.5) && p->dev->gt == 3) ? 32768 : 16384;
+      const int size = max_size / 2;
+      int offset = 0;
 
-      p->gen7_3DSTATE_PUSH_CONSTANT_ALLOC_PS(p->dev,
-            8192, 8192, p->cp);
+      gen7_emit_3DSTATE_PUSH_CONSTANT_ALLOC_VS(p->dev, offset, size, p->cp);
+      offset += size;
 
-      gen7_wa_pipe_control_cs_stall(p, true, true);
+      gen7_emit_3DSTATE_PUSH_CONSTANT_ALLOC_PS(p->dev, offset, size, p->cp);
+
+      if (p->dev->gen == ILO_GEN(7))
+         gen7_wa_pipe_control_cs_stall(p, true, true);
    }
 }
 
@@ -247,10 +253,10 @@ gen7_pipeline_common_pointers_1(struct ilo_3d_pipeline *p,
 {
    /* 3DSTATE_VIEWPORT_STATE_POINTERS_{CC,SF_CLIP} */
    if (session->viewport_state_changed) {
-      p->gen7_3DSTATE_VIEWPORT_STATE_POINTERS_CC(p->dev,
+      gen7_emit_3DSTATE_VIEWPORT_STATE_POINTERS_CC(p->dev,
             p->state.CC_VIEWPORT, p->cp);
 
-      p->gen7_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP(p->dev,
+      gen7_emit_3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP(p->dev,
             p->state.SF_CLIP_VIEWPORT, p->cp);
    }
 }
@@ -262,19 +268,19 @@ gen7_pipeline_common_pointers_2(struct ilo_3d_pipeline *p,
 {
    /* 3DSTATE_BLEND_STATE_POINTERS */
    if (session->cc_state_blend_changed) {
-      p->gen7_3DSTATE_BLEND_STATE_POINTERS(p->dev,
+      gen7_emit_3DSTATE_BLEND_STATE_POINTERS(p->dev,
             p->state.BLEND_STATE, p->cp);
    }
 
    /* 3DSTATE_CC_STATE_POINTERS */
    if (session->cc_state_cc_changed) {
-      p->gen7_3DSTATE_CC_STATE_POINTERS(p->dev,
+      gen7_emit_3DSTATE_CC_STATE_POINTERS(p->dev,
             p->state.COLOR_CALC_STATE, p->cp);
    }
 
    /* 3DSTATE_DEPTH_STENCIL_STATE_POINTERS */
    if (session->cc_state_dsa_changed) {
-      p->gen7_3DSTATE_DEPTH_STENCIL_STATE_POINTERS(p->dev,
+      gen7_emit_3DSTATE_DEPTH_STENCIL_STATE_POINTERS(p->dev,
             p->state.DEPTH_STENCIL_STATE, p->cp);
    }
 }
@@ -288,26 +294,40 @@ gen7_pipeline_vs(struct ilo_3d_pipeline *p,
    const bool emit_3dstate_sampler_state = session->sampler_state_vs_changed;
    /* see gen6_pipeline_vs() */
    const bool emit_3dstate_constant_vs = session->pcb_state_vs_changed;
-   const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(VERTEX_SAMPLERS));
+   const bool emit_3dstate_vs = (DIRTY(VS) || DIRTY(SAMPLER_VS) ||
+           session->kernel_bo_changed);
 
    /* emit depth stall before any of the VS commands */
    if (emit_3dstate_binding_table || emit_3dstate_sampler_state ||
-       emit_3dstate_constant_vs || emit_3dstate_vs)
-       gen7_wa_pipe_control_vs_depth_stall(p);
+           emit_3dstate_constant_vs || emit_3dstate_vs)
+      gen7_wa_pipe_control_vs_depth_stall(p);
 
    /* 3DSTATE_BINDING_TABLE_POINTERS_VS */
    if (emit_3dstate_binding_table) {
-      p->gen7_3DSTATE_BINDING_TABLE_POINTERS_VS(p->dev,
-            p->state.vs.BINDING_TABLE_STATE, p->cp);
+      gen7_emit_3DSTATE_BINDING_TABLE_POINTERS_VS(p->dev,
+              p->state.vs.BINDING_TABLE_STATE, p->cp);
    }
 
    /* 3DSTATE_SAMPLER_STATE_POINTERS_VS */
    if (emit_3dstate_sampler_state) {
-      p->gen7_3DSTATE_SAMPLER_STATE_POINTERS_VS(p->dev,
-            p->state.vs.SAMPLER_STATE, p->cp);
+      gen7_emit_3DSTATE_SAMPLER_STATE_POINTERS_VS(p->dev,
+              p->state.vs.SAMPLER_STATE, p->cp);
+   }
+
+   /* 3DSTATE_CONSTANT_VS */
+   if (emit_3dstate_constant_vs) {
+      gen7_emit_3DSTATE_CONSTANT_VS(p->dev,
+              &p->state.vs.PUSH_CONSTANT_BUFFER,
+              &p->state.vs.PUSH_CONSTANT_BUFFER_size,
+              1, p->cp);
    }
 
-   gen6_pipeline_vs(p, ilo, session);
+   /* 3DSTATE_VS */
+   if (emit_3dstate_vs) {
+      const int num_samplers = ilo->sampler[PIPE_SHADER_VERTEX].count;
+
+      gen6_emit_3DSTATE_VS(p->dev, ilo->vs, num_samplers, p->cp);
+   }
 }
 
 static void
@@ -317,13 +337,13 @@ gen7_pipeline_hs(struct ilo_3d_pipeline *p,
 {
    /* 3DSTATE_CONSTANT_HS and 3DSTATE_HS */
    if (session->hw_ctx_changed) {
-      p->gen7_3DSTATE_CONSTANT_HS(p->dev, 0, 0, 0, p->cp);
-      p->gen7_3DSTATE_HS(p->dev, NULL, 0, 0, p->cp);
+      gen7_emit_3DSTATE_CONSTANT_HS(p->dev, 0, 0, 0, p->cp);
+      gen7_emit_3DSTATE_HS(p->dev, NULL, 0, p->cp);
    }
 
    /* 3DSTATE_BINDING_TABLE_POINTERS_HS */
    if (session->hw_ctx_changed)
-      p->gen7_3DSTATE_BINDING_TABLE_POINTERS_HS(p->dev, 0, p->cp);
+      gen7_emit_3DSTATE_BINDING_TABLE_POINTERS_HS(p->dev, 0, p->cp);
 }
 
 static void
@@ -333,7 +353,7 @@ gen7_pipeline_te(struct ilo_3d_pipeline *p,
 {
    /* 3DSTATE_TE */
    if (session->hw_ctx_changed)
-      p->gen7_3DSTATE_TE(p->dev, p->cp);
+      gen7_emit_3DSTATE_TE(p->dev, p->cp);
 }
 
 static void
@@ -343,13 +363,13 @@ gen7_pipeline_ds(struct ilo_3d_pipeline *p,
 {
    /* 3DSTATE_CONSTANT_DS and 3DSTATE_DS */
    if (session->hw_ctx_changed) {
-      p->gen7_3DSTATE_CONSTANT_DS(p->dev, 0, 0, 0, p->cp);
-      p->gen7_3DSTATE_DS(p->dev, NULL, 0, 0, p->cp);
+      gen7_emit_3DSTATE_CONSTANT_DS(p->dev, 0, 0, 0, p->cp);
+      gen7_emit_3DSTATE_DS(p->dev, NULL, 0, p->cp);
    }
 
    /* 3DSTATE_BINDING_TABLE_POINTERS_DS */
    if (session->hw_ctx_changed)
-      p->gen7_3DSTATE_BINDING_TABLE_POINTERS_DS(p->dev, 0, p->cp);
+      gen7_emit_3DSTATE_BINDING_TABLE_POINTERS_DS(p->dev, 0, p->cp);
 
 }
 
@@ -360,13 +380,13 @@ gen7_pipeline_gs(struct ilo_3d_pipeline *p,
 {
    /* 3DSTATE_CONSTANT_GS and 3DSTATE_GS */
    if (session->hw_ctx_changed) {
-      p->gen6_3DSTATE_CONSTANT_GS(p->dev, 0, 0, 0, p->cp);
-      p->gen7_3DSTATE_GS(p->dev, NULL, 0, p->cp);
+      gen7_emit_3DSTATE_CONSTANT_GS(p->dev, 0, 0, 0, p->cp);
+      gen7_emit_3DSTATE_GS(p->dev, NULL, 0, p->cp);
    }
 
    /* 3DSTATE_BINDING_TABLE_POINTERS_GS */
    if (session->binding_table_gs_changed) {
-      p->gen7_3DSTATE_BINDING_TABLE_POINTERS_GS(p->dev,
+      gen7_emit_3DSTATE_BINDING_TABLE_POINTERS_GS(p->dev,
             p->state.gs.BINDING_TABLE_STATE, p->cp);
    }
 }
@@ -377,24 +397,25 @@ gen7_pipeline_sol(struct ilo_3d_pipeline *p,
                   struct gen6_pipeline_session *session)
 {
    const struct pipe_stream_output_info *so_info;
-   const struct ilo_shader *sh;
+   const struct ilo_shader_state *shader;
    bool dirty_sh = false;
 
    if (ilo->gs) {
-      so_info = &ilo->gs->info.stream_output;
-      sh = ilo->gs->shader;
+      shader = ilo->gs;
       dirty_sh = DIRTY(GS);
    }
-   else if (ilo->vs) {
-      so_info = &ilo->vs->info.stream_output;
-      sh = ilo->vs->shader;
+   else {
+      shader = ilo->vs;
       dirty_sh = DIRTY(VS);
    }
 
+   so_info = ilo_shader_get_kernel_so_info(shader);
+
    gen6_pipeline_update_max_svbi(p, ilo, session);
 
    /* 3DSTATE_SO_BUFFER */
-   if ((DIRTY(STREAM_OUTPUT_TARGETS) || dirty_sh) && ilo->so.enabled) {
+   if ((DIRTY(SO) || dirty_sh || session->batch_bo_changed) &&
+       ilo->so.enabled) {
       int i;
 
       for (i = 0; i < ilo->so.count; i++) {
@@ -407,23 +428,25 @@ gen7_pipeline_sol(struct ilo_3d_pipeline *p,
             base += p->state.so_num_vertices * stride;
          }
 
-         p->gen7_3DSTATE_SO_BUFFER(p->dev, i, base, stride,
+         gen7_emit_3DSTATE_SO_BUFFER(p->dev, i, base, stride,
                ilo->so.states[i], p->cp);
       }
 
       for (; i < 4; i++)
-         p->gen7_3DSTATE_SO_BUFFER(p->dev, i, 0, 0, NULL, p->cp);
+         gen7_emit_3DSTATE_SO_BUFFER(p->dev, i, 0, 0, NULL, p->cp);
    }
 
    /* 3DSTATE_SO_DECL_LIST */
    if (dirty_sh && ilo->so.enabled)
-      p->gen7_3DSTATE_SO_DECL_LIST(p->dev, so_info, sh, p->cp);
+      gen7_emit_3DSTATE_SO_DECL_LIST(p->dev, so_info, p->cp);
 
    /* 3DSTATE_STREAMOUT */
-   if (DIRTY(STREAM_OUTPUT_TARGETS) || DIRTY(RASTERIZER) || dirty_sh) {
+   if (DIRTY(SO) || DIRTY(RASTERIZER) || dirty_sh) {
       const unsigned buffer_mask = (1 << ilo->so.count) - 1;
+      const int output_count = ilo_shader_get_kernel_param(shader,
+            ILO_KERNEL_OUTPUT_COUNT);
 
-      p->gen7_3DSTATE_STREAMOUT(p->dev, buffer_mask, sh->out.count,
+      gen7_emit_3DSTATE_STREAMOUT(p->dev, buffer_mask, output_count,
             ilo->rasterizer->state.rasterizer_discard, p->cp);
    }
 }
@@ -434,22 +457,13 @@ gen7_pipeline_sf(struct ilo_3d_pipeline *p,
                  struct gen6_pipeline_session *session)
 {
    /* 3DSTATE_SBE */
-   if (DIRTY(RASTERIZER) || DIRTY(VS) || DIRTY(GS) || DIRTY(FS)) {
-      const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
-      const struct ilo_shader *last_sh =
-         (ilo->gs)? ilo->gs->shader :
-         (ilo->vs)? ilo->vs->shader : NULL;
-
-      p->gen7_3DSTATE_SBE(p->dev,
-            &ilo->rasterizer->state, fs, last_sh, p->cp);
-   }
+   if (DIRTY(RASTERIZER) || DIRTY(FS))
+      gen7_emit_3DSTATE_SBE(p->dev, ilo->rasterizer, ilo->fs, ilo->cp);
 
    /* 3DSTATE_SF */
-   if (DIRTY(RASTERIZER) || DIRTY(FRAMEBUFFER)) {
+   if (DIRTY(RASTERIZER) || DIRTY(FB)) {
       gen7_wa_pipe_control_cs_stall(p, true, true);
-
-      p->gen7_3DSTATE_SF(p->dev,
-            &ilo->rasterizer->state, ilo->fb.state.zsbuf, p->cp);
+      gen7_emit_3DSTATE_SF(p->dev, ilo->rasterizer, ilo->fb.state.zsbuf, p->cp);
    }
 }
 
@@ -459,68 +473,58 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
                  struct gen6_pipeline_session *session)
 {
    /* 3DSTATE_WM */
-   if (DIRTY(FS) || DIRTY(BLEND) || DIRTY(DEPTH_STENCIL_ALPHA) ||
-       DIRTY(RASTERIZER)) {
-      const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
-      const bool cc_may_kill = (ilo->dsa->state.alpha.enabled ||
-                                ilo->blend->state.alpha_to_coverage);
-
-      if (fs)
-         assert(!fs->pcb.clip_state_size);
+   if (DIRTY(FS) || DIRTY(BLEND) || DIRTY(DSA) || DIRTY(RASTERIZER)) {
+      const bool cc_may_kill = (ilo->dsa->dw_alpha ||
+                                ilo->blend->alpha_to_coverage);
 
       if (p->dev->gen == ILO_GEN(7) && session->hw_ctx_changed)
          gen7_wa_pipe_control_wm_max_threads_stall(p);
 
-      p->gen7_3DSTATE_WM(p->dev,
-            fs, &ilo->rasterizer->state, cc_may_kill, p->cp);
+      gen7_emit_3DSTATE_WM(p->dev, ilo->fs,
+            ilo->rasterizer, cc_may_kill, p->cp);
    }
 
    /* 3DSTATE_BINDING_TABLE_POINTERS_PS */
    if (session->binding_table_fs_changed) {
-      p->gen7_3DSTATE_BINDING_TABLE_POINTERS_PS(p->dev,
+      gen7_emit_3DSTATE_BINDING_TABLE_POINTERS_PS(p->dev,
             p->state.wm.BINDING_TABLE_STATE, p->cp);
    }
 
    /* 3DSTATE_SAMPLER_STATE_POINTERS_PS */
    if (session->sampler_state_fs_changed) {
-      p->gen7_3DSTATE_SAMPLER_STATE_POINTERS_PS(p->dev,
+      gen7_emit_3DSTATE_SAMPLER_STATE_POINTERS_PS(p->dev,
             p->state.wm.SAMPLER_STATE, p->cp);
    }
 
    /* 3DSTATE_CONSTANT_PS */
-   if (session->pcb_state_fs_changed)
-      p->gen6_3DSTATE_CONSTANT_PS(p->dev, NULL, NULL, 0, p->cp);
+   if (session->pcb_state_fs_changed) {
+      gen7_emit_3DSTATE_CONSTANT_PS(p->dev,
+            &p->state.wm.PUSH_CONSTANT_BUFFER,
+            &p->state.wm.PUSH_CONSTANT_BUFFER_size,
+            1, p->cp);
+   }
 
    /* 3DSTATE_PS */
-   if (DIRTY(FS) || DIRTY(FRAGMENT_SAMPLERS) ||
-       DIRTY(BLEND)) {
-      const struct ilo_shader *fs = (ilo->fs)? ilo->fs->shader : NULL;
+   if (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND) ||
+       session->kernel_bo_changed) {
       const int num_samplers = ilo->sampler[PIPE_SHADER_FRAGMENT].count;
-      const bool dual_blend =
-         (!ilo->blend->state.logicop_enable &&
-          ilo->blend->state.rt[0].blend_enable &&
-          util_blend_state_is_dual(&ilo->blend->state, 0));
+      const bool dual_blend = ilo->blend->dual_blend;
 
-      if (fs)
-         assert(!fs->pcb.clip_state_size);
-
-      p->gen7_3DSTATE_PS(p->dev, fs, num_samplers, dual_blend, p->cp);
+      gen7_emit_3DSTATE_PS(p->dev, ilo->fs, num_samplers, dual_blend, p->cp);
    }
 
    /* 3DSTATE_SCISSOR_STATE_POINTERS */
    if (session->scissor_state_changed) {
-      p->gen6_3DSTATE_SCISSOR_STATE_POINTERS(p->dev,
+      gen6_emit_3DSTATE_SCISSOR_STATE_POINTERS(p->dev,
             p->state.SCISSOR_RECT, p->cp);
    }
 
    /* XXX what is the best way to know if this workaround is needed? */
    {
-      const bool emit_3dstate_ps = (DIRTY(FS) ||
-                                       DIRTY(FRAGMENT_SAMPLERS) ||
-                                       DIRTY(BLEND));
+      const bool emit_3dstate_ps =
+         (DIRTY(FS) || DIRTY(SAMPLER_FS) || DIRTY(BLEND));
       const bool emit_3dstate_depth_buffer =
-         (DIRTY(FRAMEBUFFER) || DIRTY(DEPTH_STENCIL_ALPHA) ||
-          session->state_bo_changed);
+         (DIRTY(FB) || DIRTY(DSA) || session->state_bo_changed);
 
       if (emit_3dstate_ps ||
           emit_3dstate_depth_buffer ||
@@ -534,28 +538,27 @@ gen7_pipeline_wm(struct ilo_3d_pipeline *p,
          gen7_wa_pipe_control_wm_depth_stall(p, emit_3dstate_depth_buffer);
    }
 
-   /*
-    * glCopyPixels() with GL_DEPTH, which flushes the context before copying
-    * the depth buffer to a temporary texture, could not update the depth
-    * buffer _sometimes_.  Reissuing 3DSTATE_DEPTH_BUFFER in the new batch
-    * makes the problem gone.
-    */
-
    /* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
-   if (DIRTY(FRAMEBUFFER) || DIRTY(DEPTH_STENCIL_ALPHA) ||
-       session->state_bo_changed) {
-      const bool hiz = false;
+   if (DIRTY(FB) || session->batch_bo_changed) {
+      const struct ilo_zs_surface *zs;
 
-      p->gen7_3DSTATE_DEPTH_BUFFER(p->dev,
-            ilo->fb.state.zsbuf, &ilo->dsa->state, hiz, p->cp);
+      if (ilo->fb.state.zsbuf) {
+         const struct ilo_surface_cso *surface =
+            (const struct ilo_surface_cso *) ilo->fb.state.zsbuf;
 
-      p->gen6_3DSTATE_HIER_DEPTH_BUFFER(p->dev,
-            (hiz) ? ilo->fb.state.zsbuf : NULL, p->cp);
+         assert(!surface->is_rt);
+         zs = &surface->u.zs;
+      }
+      else {
+         zs = &ilo->fb.null_zs;
+      }
 
-      p->gen6_3DSTATE_STENCIL_BUFFER(p->dev, ilo->fb.state.zsbuf, p->cp);
+      gen6_emit_3DSTATE_DEPTH_BUFFER(p->dev, zs, p->cp);
+      gen6_emit_3DSTATE_HIER_DEPTH_BUFFER(p->dev, zs, p->cp);
+      gen6_emit_3DSTATE_STENCIL_BUFFER(p->dev, zs, p->cp);
 
       /* TODO */
-      p->gen6_3DSTATE_CLEAR_PARAMS(p->dev, 0, p->cp);
+      gen7_emit_3DSTATE_CLEAR_PARAMS(p->dev, 0, p->cp);
    }
 }
 
@@ -565,7 +568,7 @@ gen7_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
                              struct gen6_pipeline_session *session)
 {
    /* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
-   if (DIRTY(SAMPLE_MASK) || DIRTY(FRAMEBUFFER)) {
+   if (DIRTY(SAMPLE_MASK) || DIRTY(FB)) {
       const uint32_t *packed_sample_pos;
 
       gen7_wa_pipe_control_cs_stall(p, true, true);
@@ -575,16 +578,26 @@ gen7_pipeline_wm_multisample(struct ilo_3d_pipeline *p,
          (ilo->fb.num_samples > 1) ? &p->packed_sample_position_4x :
          &p->packed_sample_position_1x;
 
-      p->gen6_3DSTATE_MULTISAMPLE(p->dev,
+      gen6_emit_3DSTATE_MULTISAMPLE(p->dev,
             ilo->fb.num_samples, packed_sample_pos,
             ilo->rasterizer->state.half_pixel_center, p->cp);
 
-      p->gen7_3DSTATE_SAMPLE_MASK(p->dev,
+      gen7_emit_3DSTATE_SAMPLE_MASK(p->dev,
             (ilo->fb.num_samples > 1) ? ilo->sample_mask : 0x1,
             ilo->fb.num_samples, p->cp);
    }
 }
 
+static void
+gen7_pipeline_vf_draw(struct ilo_3d_pipeline *p,
+                      const struct ilo_context *ilo,
+                      struct gen6_pipeline_session *session)
+{
+   /* 3DPRIMITIVE */
+   gen7_emit_3DPRIMITIVE(p->dev, ilo->draw, &ilo->ib, false, p->cp);
+   p->state.has_gen6_wa_pipe_control = false;
+}
+
 static void
 gen7_pipeline_commands(struct ilo_3d_pipeline *p,
                        const struct ilo_context *ilo,
@@ -616,17 +629,16 @@ gen7_pipeline_commands(struct ilo_3d_pipeline *p,
    gen6_pipeline_wm_raster(p, ilo, session);
    gen6_pipeline_sf_rect(p, ilo, session);
    gen6_pipeline_vf(p, ilo, session);
-   gen6_pipeline_vf_draw(p, ilo, session);
+   gen7_pipeline_vf_draw(p, ilo, session);
 }
 
 static void
 ilo_3d_pipeline_emit_draw_gen7(struct ilo_3d_pipeline *p,
-                               const struct ilo_context *ilo,
-                               const struct pipe_draw_info *info)
+                               const struct ilo_context *ilo)
 {
    struct gen6_pipeline_session session;
 
-   gen6_pipeline_prepare(p, ilo, info, &session);
+   gen6_pipeline_prepare(p, ilo, &session);
 
    session.emit_draw_states = gen6_pipeline_states;
    session.emit_draw_commands = gen7_pipeline_commands;
@@ -637,7 +649,6 @@ ilo_3d_pipeline_emit_draw_gen7(struct ilo_3d_pipeline *p,
 
 static int
 gen7_pipeline_estimate_commands(const struct ilo_3d_pipeline *p,
-                                const struct ilo_gpe_gen7 *gen7,
                                 const struct ilo_context *ilo)
 {
    static int size;
@@ -678,7 +689,7 @@ gen7_pipeline_estimate_commands(const struct ilo_3d_pipeline *p,
       }
 
       if (count) {
-         size += gen7->estimate_command_size(p->dev,
+         size += ilo_gpe_gen7_estimate_command_size(p->dev,
                cmd, count);
       }
    }
@@ -688,7 +699,6 @@ gen7_pipeline_estimate_commands(const struct ilo_3d_pipeline *p,
 
 static int
 gen7_pipeline_estimate_states(const struct ilo_3d_pipeline *p,
-                              const struct ilo_gpe_gen7 *gen7,
                               const struct ilo_context *ilo)
 {
    static int static_size;
@@ -716,7 +726,7 @@ gen7_pipeline_estimate_states(const struct ilo_3d_pipeline *p,
       int i;
 
       for (i = 0; i < Elements(static_states); i++) {
-         static_size += gen7->estimate_state_size(p->dev,
+         static_size += ilo_gpe_gen7_estimate_state_size(p->dev,
                static_states[i].state,
                static_states[i].count);
       }
@@ -732,11 +742,11 @@ gen7_pipeline_estimate_states(const struct ilo_3d_pipeline *p,
    count = ilo->fb.state.nr_cbufs;
    for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
       count += ilo->view[shader_type].count;
-      count += ilo->cbuf[shader_type].count;
+      count += util_bitcount(ilo->cbuf[shader_type].enabled_mask);
    }
 
    if (count) {
-      size += gen7->estimate_state_size(p->dev,
+      size += ilo_gpe_gen7_estimate_state_size(p->dev,
             ILO_GPE_GEN7_SURFACE_STATE, count);
    }
 
@@ -744,19 +754,31 @@ gen7_pipeline_estimate_states(const struct ilo_3d_pipeline *p,
    for (shader_type = 0; shader_type < PIPE_SHADER_TYPES; shader_type++) {
       count = ilo->sampler[shader_type].count;
       if (count) {
-         size += gen7->estimate_state_size(p->dev,
+         size += ilo_gpe_gen7_estimate_state_size(p->dev,
                ILO_GPE_GEN7_SAMPLER_BORDER_COLOR_STATE, count);
-         size += gen7->estimate_state_size(p->dev,
+         size += ilo_gpe_gen7_estimate_state_size(p->dev,
                ILO_GPE_GEN7_SAMPLER_STATE, count);
       }
    }
 
    /* pcb (vs) */
-   if (ilo->vs && ilo->vs->shader->pcb.clip_state_size) {
-      const int pcb_size = ilo->vs->shader->pcb.clip_state_size;
+   if (ilo->vs) {
+      const int cbuf0_size =
+         ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_PCB_CBUF0_SIZE);
+      const int ucp_size =
+         ilo_shader_get_kernel_param(ilo->vs, ILO_KERNEL_VS_PCB_UCP_SIZE);
+
+      size += ilo_gpe_gen7_estimate_state_size(p->dev,
+            ILO_GPE_GEN7_PUSH_CONSTANT_BUFFER, cbuf0_size + ucp_size);
+   }
+
+   /* pcb (fs) */
+   if (ilo->fs) {
+      const int cbuf0_size =
+         ilo_shader_get_kernel_param(ilo->fs, ILO_KERNEL_PCB_CBUF0_SIZE);
 
-      size += gen7->estimate_state_size(p->dev,
-            ILO_GPE_GEN7_PUSH_CONSTANT_BUFFER, pcb_size);
+      size += ilo_gpe_gen7_estimate_state_size(p->dev,
+            ILO_GPE_GEN7_PUSH_CONSTANT_BUFFER, cbuf0_size);
    }
 
    return size;
@@ -767,7 +789,6 @@ ilo_3d_pipeline_estimate_size_gen7(struct ilo_3d_pipeline *p,
                                    enum ilo_3d_pipeline_action action,
                                    const void *arg)
 {
-   const struct ilo_gpe_gen7 *gen7 = ilo_gpe_gen7_get();
    int size;
 
    switch (action) {
@@ -775,14 +796,14 @@ ilo_3d_pipeline_estimate_size_gen7(struct ilo_3d_pipeline *p,
       {
          const struct ilo_context *ilo = arg;
 
-         size = gen7_pipeline_estimate_commands(p, gen7, ilo) +
-            gen7_pipeline_estimate_states(p, gen7, ilo);
+         size = gen7_pipeline_estimate_commands(p, ilo) +
+            gen7_pipeline_estimate_states(p, ilo);
       }
       break;
    case ILO_3D_PIPELINE_FLUSH:
    case ILO_3D_PIPELINE_WRITE_TIMESTAMP:
    case ILO_3D_PIPELINE_WRITE_DEPTH_COUNT:
-      size = gen7->estimate_command_size(p->dev,
+      size = ilo_gpe_gen7_estimate_command_size(p->dev,
             ILO_GPE_GEN7_PIPE_CONTROL, 1);
       break;
    default:
@@ -797,96 +818,9 @@ ilo_3d_pipeline_estimate_size_gen7(struct ilo_3d_pipeline *p,
 void
 ilo_3d_pipeline_init_gen7(struct ilo_3d_pipeline *p)
 {
-   const struct ilo_gpe_gen7 *gen7 = ilo_gpe_gen7_get();
-
    p->estimate_size = ilo_3d_pipeline_estimate_size_gen7;
    p->emit_draw = ilo_3d_pipeline_emit_draw_gen7;
    p->emit_flush = ilo_3d_pipeline_emit_flush_gen6;
    p->emit_write_timestamp = ilo_3d_pipeline_emit_write_timestamp_gen6;
    p->emit_write_depth_count = ilo_3d_pipeline_emit_write_depth_count_gen6;
-
-#define GEN6_USE(p, name, from) \
-   p->gen6_ ## name = from->emit_ ## name
-   GEN6_USE(p, STATE_BASE_ADDRESS, gen7);
-   GEN6_USE(p, STATE_SIP, gen7);
-   GEN6_USE(p, PIPELINE_SELECT, gen7);
-   GEN6_USE(p, 3DSTATE_VERTEX_BUFFERS, gen7);
-   GEN6_USE(p, 3DSTATE_VERTEX_ELEMENTS, gen7);
-   GEN6_USE(p, 3DSTATE_INDEX_BUFFER, gen7);
-   GEN6_USE(p, 3DSTATE_VF_STATISTICS, gen7);
-   GEN6_USE(p, 3DSTATE_SCISSOR_STATE_POINTERS, gen7);
-   GEN6_USE(p, 3DSTATE_VS, gen7);
-   GEN6_USE(p, 3DSTATE_CLIP, gen7);
-   GEN6_USE(p, 3DSTATE_CONSTANT_VS, gen7);
-   GEN6_USE(p, 3DSTATE_CONSTANT_GS, gen7);
-   GEN6_USE(p, 3DSTATE_CONSTANT_PS, gen7);
-   GEN6_USE(p, 3DSTATE_DRAWING_RECTANGLE, gen7);
-   GEN6_USE(p, 3DSTATE_POLY_STIPPLE_OFFSET, gen7);
-   GEN6_USE(p, 3DSTATE_POLY_STIPPLE_PATTERN, gen7);
-   GEN6_USE(p, 3DSTATE_LINE_STIPPLE, gen7);
-   GEN6_USE(p, 3DSTATE_AA_LINE_PARAMETERS, gen7);
-   GEN6_USE(p, 3DSTATE_MULTISAMPLE, gen7);
-   GEN6_USE(p, 3DSTATE_STENCIL_BUFFER, gen7);
-   GEN6_USE(p, 3DSTATE_HIER_DEPTH_BUFFER, gen7);
-   GEN6_USE(p, 3DSTATE_CLEAR_PARAMS, gen7);
-   GEN6_USE(p, PIPE_CONTROL, gen7);
-   GEN6_USE(p, 3DPRIMITIVE, gen7);
-   GEN6_USE(p, INTERFACE_DESCRIPTOR_DATA, gen7);
-   GEN6_USE(p, CC_VIEWPORT, gen7);
-   GEN6_USE(p, COLOR_CALC_STATE, gen7);
-   GEN6_USE(p, BLEND_STATE, gen7);
-   GEN6_USE(p, DEPTH_STENCIL_STATE, gen7);
-   GEN6_USE(p, SCISSOR_RECT, gen7);
-   GEN6_USE(p, BINDING_TABLE_STATE, gen7);
-   GEN6_USE(p, surf_SURFACE_STATE, gen7);
-   GEN6_USE(p, view_SURFACE_STATE, gen7);
-   GEN6_USE(p, cbuf_SURFACE_STATE, gen7);
-   GEN6_USE(p, SAMPLER_STATE, gen7);
-   GEN6_USE(p, SAMPLER_BORDER_COLOR_STATE, gen7);
-   GEN6_USE(p, push_constant_buffer, gen7);
-#undef GEN6_USE
-
-#define GEN7_USE(p, name, from) \
-   p->gen7_ ## name = from->emit_ ## name
-   GEN7_USE(p, 3DSTATE_DEPTH_BUFFER, gen7);
-   GEN7_USE(p, 3DSTATE_CC_STATE_POINTERS, gen7);
-   GEN7_USE(p, 3DSTATE_GS, gen7);
-   GEN7_USE(p, 3DSTATE_SF, gen7);
-   GEN7_USE(p, 3DSTATE_WM, gen7);
-   GEN7_USE(p, 3DSTATE_SAMPLE_MASK, gen7);
-   GEN7_USE(p, 3DSTATE_CONSTANT_HS, gen7);
-   GEN7_USE(p, 3DSTATE_CONSTANT_DS, gen7);
-   GEN7_USE(p, 3DSTATE_HS, gen7);
-   GEN7_USE(p, 3DSTATE_TE, gen7);
-   GEN7_USE(p, 3DSTATE_DS, gen7);
-   GEN7_USE(p, 3DSTATE_STREAMOUT, gen7);
-   GEN7_USE(p, 3DSTATE_SBE, gen7);
-   GEN7_USE(p, 3DSTATE_PS, gen7);
-   GEN7_USE(p, 3DSTATE_VIEWPORT_STATE_POINTERS_SF_CLIP, gen7);
-   GEN7_USE(p, 3DSTATE_VIEWPORT_STATE_POINTERS_CC, gen7);
-   GEN7_USE(p, 3DSTATE_BLEND_STATE_POINTERS, gen7);
-   GEN7_USE(p, 3DSTATE_DEPTH_STENCIL_STATE_POINTERS, gen7);
-   GEN7_USE(p, 3DSTATE_BINDING_TABLE_POINTERS_VS, gen7);
-   GEN7_USE(p, 3DSTATE_BINDING_TABLE_POINTERS_HS, gen7);
-   GEN7_USE(p, 3DSTATE_BINDING_TABLE_POINTERS_DS, gen7);
-   GEN7_USE(p, 3DSTATE_BINDING_TABLE_POINTERS_GS, gen7);
-   GEN7_USE(p, 3DSTATE_BINDING_TABLE_POINTERS_PS, gen7);
-   GEN7_USE(p, 3DSTATE_SAMPLER_STATE_POINTERS_VS, gen7);
-   GEN7_USE(p, 3DSTATE_SAMPLER_STATE_POINTERS_HS, gen7);
-   GEN7_USE(p, 3DSTATE_SAMPLER_STATE_POINTERS_DS, gen7);
-   GEN7_USE(p, 3DSTATE_SAMPLER_STATE_POINTERS_GS, gen7);
-   GEN7_USE(p, 3DSTATE_SAMPLER_STATE_POINTERS_PS, gen7);
-   GEN7_USE(p, 3DSTATE_URB_VS, gen7);
-   GEN7_USE(p, 3DSTATE_URB_HS, gen7);
-   GEN7_USE(p, 3DSTATE_URB_DS, gen7);
-   GEN7_USE(p, 3DSTATE_URB_GS, gen7);
-   GEN7_USE(p, 3DSTATE_PUSH_CONSTANT_ALLOC_VS, gen7);
-   GEN7_USE(p, 3DSTATE_PUSH_CONSTANT_ALLOC_HS, gen7);
-   GEN7_USE(p, 3DSTATE_PUSH_CONSTANT_ALLOC_DS, gen7);
-   GEN7_USE(p, 3DSTATE_PUSH_CONSTANT_ALLOC_GS, gen7);
-   GEN7_USE(p, 3DSTATE_PUSH_CONSTANT_ALLOC_PS, gen7);
-   GEN7_USE(p, 3DSTATE_SO_DECL_LIST, gen7);
-   GEN7_USE(p, 3DSTATE_SO_BUFFER, gen7);
-   GEN7_USE(p, SF_CLIP_VIEWPORT, gen7);
-#undef GEN7_USE
 }