*/
#include "genhw/genhw.h"
-#include "util/u_dual_blend.h"
+#include "core/ilo_builder_3d.h"
+#include "core/ilo_builder_render.h"
#include "ilo_blitter.h"
-#include "ilo_builder_3d.h"
-#include "ilo_builder_render.h"
+#include "ilo_resource.h"
#include "ilo_shader.h"
#include "ilo_state.h"
#include "ilo_render_gen.h"
-/**
- * A wrapper for gen6_PIPE_CONTROL().
- */
-static void
-gen8_pipe_control(struct ilo_render *r, uint32_t dw1)
-{
- struct intel_bo *bo = (dw1 & GEN6_PIPE_CONTROL_WRITE__MASK) ?
- r->workaround_bo : NULL;
-
- ILO_DEV_ASSERT(r->dev, 8, 8);
-
- if (dw1 & GEN6_PIPE_CONTROL_CS_STALL) {
- /* CS stall cannot be set alone */
- const uint32_t mask = GEN6_PIPE_CONTROL_RENDER_CACHE_FLUSH |
- GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH |
- GEN6_PIPE_CONTROL_PIXEL_SCOREBOARD_STALL |
- GEN6_PIPE_CONTROL_DEPTH_STALL |
- GEN6_PIPE_CONTROL_WRITE__MASK;
- if (!(dw1 & mask))
- dw1 |= GEN6_PIPE_CONTROL_PIXEL_SCOREBOARD_STALL;
- }
-
- gen6_PIPE_CONTROL(r->builder, dw1, bo, 0, 0);
-
-
- r->state.current_pipe_control_dw1 |= dw1;
- r->state.deferred_pipe_control_dw1 &= ~dw1;
-}
-
static void
gen8_wa_pre_depth(struct ilo_render *r)
{
- /*
- * From the Ivy Bridge PRM, volume 2 part 1, page 315:
- *
- * "Driver must send a least one PIPE_CONTROL command with CS Stall and
- * a post sync operation prior to the group of depth
- * commands(3DSTATE_DEPTH_BUFFER, 3DSTATE_CLEAR_PARAMS,
- * 3DSTATE_STENCIL_BUFFER, and 3DSTATE_HIER_DEPTH_BUFFER)."
- */
- const uint32_t dw1 = GEN6_PIPE_CONTROL_CS_STALL |
- GEN6_PIPE_CONTROL_WRITE_IMM;
-
ILO_DEV_ASSERT(r->dev, 8, 8);
- if ((r->state.current_pipe_control_dw1 & dw1) != dw1)
- gen8_pipe_control(r, dw1);
-
/*
* From the Ivy Bridge PRM, volume 2 part 1, page 315:
*
* guarantee that the pipeline from WM onwards is already flushed
* (e.g., via a preceding MI_FLUSH)."
*/
- gen8_pipe_control(r, GEN6_PIPE_CONTROL_DEPTH_STALL);
- gen8_pipe_control(r, GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH);
- gen8_pipe_control(r, GEN6_PIPE_CONTROL_DEPTH_STALL);
+ ilo_render_pipe_control(r, GEN6_PIPE_CONTROL_DEPTH_STALL);
+ ilo_render_pipe_control(r, GEN6_PIPE_CONTROL_DEPTH_CACHE_FLUSH);
+ ilo_render_pipe_control(r, GEN6_PIPE_CONTROL_DEPTH_STALL);
}
#define DIRTY(state) (session->pipe_dirty & ILO_DIRTY_ ## state)
struct ilo_render_draw_session *session)
{
/* 3DSTATE_RASTER */
- if (DIRTY(RASTERIZER)) {
- gen8_3DSTATE_RASTER(r->builder, (vec->rasterizer) ?
- &vec->rasterizer->sf : NULL);
- }
+ if (session->rs_delta.dirty & ILO_STATE_RASTER_3DSTATE_RASTER)
+ gen8_3DSTATE_RASTER(r->builder, &vec->rasterizer->rs);
- /* 3DSTATE_SBE */
- if (DIRTY(RASTERIZER) || DIRTY(FS)) {
- gen8_3DSTATE_SBE(r->builder, vec->fs, (vec->rasterizer) ?
- vec->rasterizer->state.sprite_coord_mode : 0);
- }
+ /* 3DSTATE_SBE and 3DSTATE_SBE_SWIZ */
+ if (DIRTY(FS)) {
+ const struct ilo_state_sbe *sbe = ilo_shader_get_kernel_sbe(vec->fs);
- /* 3DSTATE_SBE_SWIZ */
- if (DIRTY(FS))
- gen8_3DSTATE_SBE_SWIZ(r->builder, vec->fs);
+ gen8_3DSTATE_SBE(r->builder, sbe);
+ gen8_3DSTATE_SBE_SWIZ(r->builder, sbe);
+ }
/* 3DSTATE_SF */
- if (DIRTY(RASTERIZER)) {
- gen8_3DSTATE_SF(r->builder, (vec->rasterizer) ?
- &vec->rasterizer->sf : NULL);
- }
+ if (session->rs_delta.dirty & ILO_STATE_RASTER_3DSTATE_SF)
+ gen7_3DSTATE_SF(r->builder, &vec->rasterizer->rs);
}
static void
const struct ilo_state_vector *vec,
struct ilo_render_draw_session *session)
{
+ const union ilo_shader_cso *cso = ilo_shader_get_kernel_cso(vec->fs);
+ const uint32_t kernel_offset = ilo_shader_get_kernel_offset(vec->fs);
+
/* 3DSTATE_WM */
- if (DIRTY(FS) || DIRTY(RASTERIZER))
- gen8_3DSTATE_WM(r->builder, vec->fs, vec->rasterizer);
+ if (session->rs_delta.dirty & ILO_STATE_RASTER_3DSTATE_WM)
+ gen8_3DSTATE_WM(r->builder, &vec->rasterizer->rs);
- if (DIRTY(DSA))
- gen8_3DSTATE_WM_DEPTH_STENCIL(r->builder, vec->dsa);
+ if (session->cc_delta.dirty & ILO_STATE_CC_3DSTATE_WM_DEPTH_STENCIL)
+ gen8_3DSTATE_WM_DEPTH_STENCIL(r->builder, &vec->blend->cc);
/* 3DSTATE_WM_HZ_OP and 3DSTATE_WM_CHROMAKEY */
if (r->hw_ctx_changed) {
/* 3DSTATE_PS */
if (DIRTY(FS) || r->instruction_bo_changed)
- gen8_3DSTATE_PS(r->builder, vec->fs);
+ gen8_3DSTATE_PS(r->builder, &cso->ps, kernel_offset, r->fs_scratch.bo);
/* 3DSTATE_PS_EXTRA */
- if (DIRTY(FS) || DIRTY(DSA) || DIRTY(BLEND)) {
- const bool cc_may_kill = (vec->dsa->dw_blend_alpha ||
- vec->blend->alpha_to_coverage);
- gen8_3DSTATE_PS_EXTRA(r->builder, vec->fs, cc_may_kill, false);
- }
+ if (DIRTY(FS))
+ gen8_3DSTATE_PS_EXTRA(r->builder, &cso->ps);
/* 3DSTATE_PS_BLEND */
- if (DIRTY(BLEND) || DIRTY(FB) || DIRTY(DSA))
- gen8_3DSTATE_PS_BLEND(r->builder, vec->blend, &vec->fb, vec->dsa);
+ if (session->cc_delta.dirty & ILO_STATE_CC_3DSTATE_PS_BLEND)
+ gen8_3DSTATE_PS_BLEND(r->builder, &vec->blend->cc);
/* 3DSTATE_SCISSOR_STATE_POINTERS */
if (session->scissor_changed) {
/* 3DSTATE_DEPTH_BUFFER and 3DSTATE_CLEAR_PARAMS */
if (DIRTY(FB) || r->batch_bo_changed) {
- const struct ilo_zs_surface *zs;
+ const struct ilo_state_zs *zs;
uint32_t clear_params;
if (vec->fb.state.zsbuf) {
gen8_wa_pre_depth(r);
- gen6_3DSTATE_DEPTH_BUFFER(r->builder, zs, false);
+ gen6_3DSTATE_DEPTH_BUFFER(r->builder, zs);
gen6_3DSTATE_HIER_DEPTH_BUFFER(r->builder, zs);
gen6_3DSTATE_STENCIL_BUFFER(r->builder, zs);
gen7_3DSTATE_CLEAR_PARAMS(r->builder, clear_params);
struct ilo_render_draw_session *session)
{
/* 3DSTATE_SAMPLE_PATTERN */
- if (r->hw_ctx_changed) {
- gen8_3DSTATE_SAMPLE_PATTERN(r->builder,
- &r->sample_pattern_1x,
- &r->sample_pattern_2x,
- &r->sample_pattern_4x,
- r->sample_pattern_8x,
- r->sample_pattern_16x);
- }
+ if (r->hw_ctx_changed)
+ gen8_3DSTATE_SAMPLE_PATTERN(r->builder, &r->sample_pattern);
}
static void
const struct ilo_state_vector *vec,
struct ilo_render_draw_session *session)
{
- /* 3DSTATE_MULTISAMPLE and 3DSTATE_SAMPLE_MASK */
- if (DIRTY(SAMPLE_MASK) || DIRTY(FB) || DIRTY(RASTERIZER)) {
- gen8_3DSTATE_MULTISAMPLE(r->builder, vec->fb.num_samples,
- vec->rasterizer->state.half_pixel_center);
-
- gen7_3DSTATE_SAMPLE_MASK(r->builder,
- (vec->fb.num_samples > 1) ? vec->sample_mask : 0x1,
- vec->fb.num_samples);
- }
+ /* 3DSTATE_MULTISAMPLE */
+ if (session->rs_delta.dirty & ILO_STATE_RASTER_3DSTATE_MULTISAMPLE)
+ gen8_3DSTATE_MULTISAMPLE(r->builder, &vec->rasterizer->rs);
+
+ /* 3DSTATE_SAMPLE_MASK */
+ if (session->rs_delta.dirty & ILO_STATE_RASTER_3DSTATE_SAMPLE_MASK)
+ gen6_3DSTATE_SAMPLE_MASK(r->builder, &vec->rasterizer->rs);
}
static void
const struct ilo_state_vector *vec,
struct ilo_render_draw_session *session)
{
- int i;
-
/* 3DSTATE_INDEX_BUFFER */
- if (DIRTY(IB) || r->batch_bo_changed)
- gen8_3DSTATE_INDEX_BUFFER(r->builder, &vec->ib);
+ if ((session->vf_delta.dirty & ILO_STATE_VF_3DSTATE_INDEX_BUFFER) ||
+ DIRTY(IB) || r->batch_bo_changed)
+ gen8_3DSTATE_INDEX_BUFFER(r->builder, &vec->ve->vf, &vec->ib.ib);
/* 3DSTATE_VF */
- if (session->primitive_restart_changed) {
- gen75_3DSTATE_VF(r->builder, vec->draw->primitive_restart,
- vec->draw->restart_index);
- }
+ if (session->vf_delta.dirty & ILO_STATE_VF_3DSTATE_VF)
+ gen75_3DSTATE_VF(r->builder, &vec->ve->vf);
/* 3DSTATE_VERTEX_BUFFERS */
- if (DIRTY(VB) || DIRTY(VE) || r->batch_bo_changed)
- gen6_3DSTATE_VERTEX_BUFFERS(r->builder, vec->ve, &vec->vb);
+ if ((session->vf_delta.dirty & ILO_STATE_VF_3DSTATE_VERTEX_BUFFERS) ||
+ DIRTY(VB) || DIRTY(VE) || r->batch_bo_changed) {
+ gen6_3DSTATE_VERTEX_BUFFERS(r->builder, &vec->ve->vf,
+ vec->vb.vb, vec->ve->vb_count);
+ }
/* 3DSTATE_VERTEX_ELEMENTS */
- if (DIRTY(VE))
- gen6_3DSTATE_VERTEX_ELEMENTS(r->builder, vec->ve);
+ if (session->vf_delta.dirty & ILO_STATE_VF_3DSTATE_VERTEX_ELEMENTS)
+ gen6_3DSTATE_VERTEX_ELEMENTS(r->builder, &vec->ve->vf);
- gen8_3DSTATE_VF_TOPOLOGY(r->builder, vec->draw->mode);
+ gen8_3DSTATE_VF_TOPOLOGY(r->builder, vec->draw_info.topology);
- for (i = 0; i < vec->ve->vb_count; i++) {
- gen8_3DSTATE_VF_INSTANCING(r->builder, i,
- vec->ve->instance_divisors[i]);
+ if (session->vf_delta.dirty & ILO_STATE_VF_3DSTATE_VF_INSTANCING) {
+ const uint8_t attr_count = ilo_state_vf_get_attr_count(&vec->ve->vf);
+ uint8_t i;
+
+ for (i = 0; i < attr_count; i++)
+ gen8_3DSTATE_VF_INSTANCING(r->builder, &vec->ve->vf, i);
}
- gen8_3DSTATE_VF_SGVS(r->builder,
- false, 0, 0,
- false, 0, 0);
+ if (session->vf_delta.dirty & ILO_STATE_VF_3DSTATE_VF_SGVS)
+ gen8_3DSTATE_VF_SGVS(r->builder, &vec->ve->vf);
}
void
gen6_draw_wm_raster(render, vec, session);
gen6_draw_sf_rect(render, vec, session);
gen8_draw_vf(render, vec, session);
- gen7_draw_vf_draw(render, vec, session);
+
+ ilo_render_3dprimitive(render, &vec->draw_info);
}
int
const struct ilo_blitter *blitter,
const struct ilo_render_rectlist_session *session)
{
- uint32_t op;
-
ILO_DEV_ASSERT(r->dev, 8, 8);
gen8_wa_pre_depth(r);
if (blitter->uses & (ILO_BLITTER_USE_FB_DEPTH |
- ILO_BLITTER_USE_FB_STENCIL)) {
- gen6_3DSTATE_DEPTH_BUFFER(r->builder,
- &blitter->fb.dst.u.zs, true);
- }
+ ILO_BLITTER_USE_FB_STENCIL))
+ gen6_3DSTATE_DEPTH_BUFFER(r->builder, &blitter->fb.dst.u.zs);
if (blitter->uses & ILO_BLITTER_USE_FB_DEPTH) {
gen6_3DSTATE_HIER_DEPTH_BUFFER(r->builder,
gen6_3DSTATE_DRAWING_RECTANGLE(r->builder, 0, 0,
blitter->fb.width, blitter->fb.height);
- switch (blitter->op) {
- case ILO_BLITTER_RECTLIST_CLEAR_ZS:
- op = 0;
- if (blitter->uses & ILO_BLITTER_USE_FB_DEPTH)
- op |= GEN8_WM_HZ_DW1_DEPTH_CLEAR;
- if (blitter->uses & ILO_BLITTER_USE_FB_STENCIL)
- op |= GEN8_WM_HZ_DW1_STENCIL_CLEAR;
- break;
- case ILO_BLITTER_RECTLIST_RESOLVE_Z:
- op = GEN8_WM_HZ_DW1_DEPTH_RESOLVE;
- break;
- case ILO_BLITTER_RECTLIST_RESOLVE_HIZ:
- op = GEN8_WM_HZ_DW1_HIZ_RESOLVE;
- break;
- default:
- op = 0;
- break;
- }
-
- gen8_3DSTATE_WM_HZ_OP(r->builder, op, blitter->fb.width,
- blitter->fb.height, blitter->fb.num_samples);
+ gen8_3DSTATE_WM_HZ_OP(r->builder, &blitter->fb.rs,
+ blitter->fb.width, blitter->fb.height);
- gen8_pipe_control(r, GEN6_PIPE_CONTROL_WRITE_IMM);
+ ilo_render_pipe_control(r, GEN6_PIPE_CONTROL_WRITE_IMM);
gen8_disable_3DSTATE_WM_HZ_OP(r->builder);
}
projects / mesa.git / blobdiff