#include "pipe/p_state.h"
#include "util/ralloc.h"
#include "util/u_inlines.h"
-#include "util/u_format.h"
+#include "util/format/u_format.h"
#include "util/u_upload_mgr.h"
#include "drm-uapi/i915_drm.h"
#include "iris_context.h"
* batch is one of our context's, so hackily claw our way back.
*/
struct iris_context *ice = NULL;
- struct iris_screen *screen;
if (batch->name == IRIS_BATCH_RENDER) {
ice = container_of(batch, ice, batches[IRIS_BATCH_RENDER]);
assert(&ice->batches[IRIS_BATCH_RENDER] == batch);
- screen = (void *) ice->ctx.screen;
- ice->vtbl.init_render_context(screen, batch, &ice->vtbl, &ice->dbg);
+ batch->screen->vtbl.init_render_context(batch);
} else if (batch->name == IRIS_BATCH_COMPUTE) {
ice = container_of(batch, ice, batches[IRIS_BATCH_COMPUTE]);
assert(&ice->batches[IRIS_BATCH_COMPUTE] == batch);
- screen = (void *) ice->ctx.screen;
- ice->vtbl.init_compute_context(screen, batch, &ice->vtbl, &ice->dbg);
+ batch->screen->vtbl.init_compute_context(batch);
} else {
unreachable("unhandled batch reset");
}
ice->state.dirty = ~0ull;
+ ice->state.stage_dirty = ~0ull;
+ ice->state.current_hash_scale = 0;
+ memset(ice->state.last_block, 0, sizeof(ice->state.last_block));
memset(ice->state.last_grid, 0, sizeof(ice->state.last_grid));
batch->last_surface_base_address = ~0ull;
+ batch->last_aux_map_state = 0;
+ batch->screen->vtbl.lost_genx_state(ice, batch);
}
static enum pipe_reset_status
iris_destroy_context(struct pipe_context *ctx)
{
struct iris_context *ice = (struct iris_context *)ctx;
+ struct iris_screen *screen = (struct iris_screen *)ctx->screen;
if (ctx->stream_uploader)
u_upload_destroy(ctx->stream_uploader);
- ice->vtbl.destroy_state(ice);
+ screen->vtbl.destroy_state(ice);
iris_destroy_program_cache(ice);
iris_destroy_border_color_pool(ice);
u_upload_destroy(ice->state.surface_uploader);
u_upload_destroy(ice->state.dynamic_uploader);
u_upload_destroy(ice->query_buffer_uploader);
- slab_destroy_child(&ice->transfer_pool);
-
iris_batch_free(&ice->batches[IRIS_BATCH_RENDER]);
iris_batch_free(&ice->batches[IRIS_BATCH_COMPUTE]);
iris_destroy_binder(&ice->state.binder);
+ slab_destroy_child(&ice->transfer_pool);
+
ralloc_free(ice);
}
#define genX_call(devinfo, func, ...) \
switch (devinfo->gen) { \
+ case 12: \
+ gen12_##func(__VA_ARGS__); \
+ break; \
case 11: \
gen11_##func(__VA_ARGS__); \
break; \
ctx->get_device_reset_status = iris_get_device_reset_status;
ctx->get_sample_position = iris_get_sample_position;
- ice->shaders.urb_size = devinfo->urb.size;
-
iris_init_context_fence_functions(ctx);
iris_init_blit_functions(ctx);
iris_init_clear_functions(ctx);
iris_init_program_functions(ctx);
iris_init_resource_functions(ctx);
- iris_init_query_functions(ctx);
iris_init_flush_functions(ctx);
+ iris_init_perfquery_functions(ctx);
iris_init_program_cache(ice);
iris_init_border_color_pool(ice);
genX_call(devinfo, init_state, ice);
genX_call(devinfo, init_blorp, ice);
+ genX_call(devinfo, init_query, ice);
int priority = 0;
if (flags & PIPE_CONTEXT_HIGH_PRIORITY)
ice->state.sizes = _mesa_hash_table_u64_create(ice);
for (int i = 0; i < IRIS_BATCH_COUNT; i++) {
- iris_init_batch(&ice->batches[i], screen, &ice->vtbl, &ice->dbg,
- &ice->reset, ice->state.sizes,
- ice->batches, (enum iris_batch_name) i,
- I915_EXEC_RENDER, priority);
+ iris_init_batch(ice, (enum iris_batch_name) i, priority);
}
- ice->vtbl.init_render_context(screen, &ice->batches[IRIS_BATCH_RENDER],
- &ice->vtbl, &ice->dbg);
- ice->vtbl.init_compute_context(screen, &ice->batches[IRIS_BATCH_COMPUTE],
- &ice->vtbl, &ice->dbg);
+ screen->vtbl.init_render_context(&ice->batches[IRIS_BATCH_RENDER]);
+ screen->vtbl.init_compute_context(&ice->batches[IRIS_BATCH_COMPUTE]);
return ctx;
}