iris: Use render_batch/compute_batch locals in memory_barrier

[mesa.git] / src / gallium / drivers / iris / iris_pipe_control.c

diff --git a/src/gallium/drivers/iris/iris_pipe_control.c b/src/gallium/drivers/iris/iris_pipe_control.c
index 5b9935398d3d0c90745b85a1a95d95e5eadac920..f686ef745c90bab78159f252387f92c9ec43bf20 100644 (file)
--- a/src/gallium/drivers/iris/iris_pipe_control.c
+++ b/src/gallium/drivers/iris/iris_pipe_control.c
@@ -149,10 +149,26 @@ static void
 iris_texture_barrier(struct pipe_context *ctx, unsigned flags)
 {
    struct iris_context *ice = (void *) ctx;
+   struct iris_batch *render_batch = &ice->batches[IRIS_BATCH_RENDER];
+   struct iris_batch *compute_batch = &ice->batches[IRIS_BATCH_COMPUTE];
+
+   if (render_batch->contains_draw ||
+       render_batch->cache.render->entries ||
+       render_batch->cache.depth->entries) {
+      iris_emit_pipe_control_flush(render_batch,
+                                   PIPE_CONTROL_DEPTH_CACHE_FLUSH |
+                                   PIPE_CONTROL_RENDER_TARGET_FLUSH |
+                                   PIPE_CONTROL_CS_STALL);
+      iris_emit_pipe_control_flush(render_batch,
+                                   PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
+   }
 
-   // XXX: compute batch?
-
-   iris_flush_depth_and_render_caches(&ice->render_batch);
+   if (compute_batch->contains_draw) {
+      iris_emit_pipe_control_flush(compute_batch,
+                                   PIPE_CONTROL_CS_STALL);
+      iris_emit_pipe_control_flush(compute_batch,
+                                   PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE);
+   }
 }
 
 static void
@@ -172,24 +188,16 @@ iris_memory_barrier(struct pipe_context *ctx, unsigned flags)
               PIPE_CONTROL_CONST_CACHE_INVALIDATE;
    }
 
-   if (flags & PIPE_BARRIER_TEXTURE) {
-      bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE;
-   }
-
-   if (flags & PIPE_BARRIER_FRAMEBUFFER) {
+   if (flags & (PIPE_BARRIER_TEXTURE | PIPE_BARRIER_FRAMEBUFFER)) {
       bits |= PIPE_CONTROL_TEXTURE_CACHE_INVALIDATE |
               PIPE_CONTROL_RENDER_TARGET_FLUSH;
    }
 
-   // XXX: MAPPED_BUFFER, QUERY_BUFFER, STREAMOUT_BUFFER, GLOBAL_BUFFER?
-
-   // XXX: don't unconditionally emit flushes in both engines, we don't
-   // even know if we're even using e.g. the compute engine...
-
-   if (ice->render_batch.contains_draw)
-      iris_emit_pipe_control_flush(&ice->render_batch, bits);
-   if (ice->compute_batch.contains_draw)
-      iris_emit_pipe_control_flush(&ice->compute_batch, bits);
+   for (int i = 0; i < IRIS_BATCH_COUNT; i++) {
+      if (ice->batches[i].contains_draw ||
+          ice->batches[i].cache.render->entries)
+         iris_emit_pipe_control_flush(&ice->batches[i], bits);
+   }
 }
 
 void