}
}
+// XXX: need unify_interfaces() at link time...
+static void
+update_so_info(struct pipe_stream_output_info *so_info)
+{
+ for (unsigned i = 0; i < so_info->num_outputs; i++) {
+ struct pipe_stream_output *output = &so_info->output[i];
+
+ /* The VUE header contains three scalar fields packed together:
+ * - gl_PointSize is stored in VARYING_SLOT_PSIZ.w
+ * - gl_Layer is stored in VARYING_SLOT_PSIZ.y
+ * - gl_ViewportIndex is stored in VARYING_SLOT_PSIZ.z
+ */
+ switch (output->register_index) {
+ case VARYING_SLOT_LAYER:
+ assert(output->num_components == 1);
+ output->register_index = VARYING_SLOT_PSIZ;
+ output->start_component = 1;
+ break;
+ case VARYING_SLOT_VIEWPORT:
+ assert(output->num_components == 1);
+ output->register_index = VARYING_SLOT_PSIZ;
+ output->start_component = 2;
+ break;
+ case VARYING_SLOT_PSIZ:
+ assert(output->num_components == 1);
+ output->start_component = 3;
+ break;
+ }
-// XXX: need unify_interfaces() at link time...
+ //info->outputs_written |= 1ull << output->register_index;
+ }
+}
/**
* The pipe->create_[stage]_state() driver hooks.
nir_shader *nir,
const struct pipe_stream_output_info *so_info)
{
- //struct iris_context *ice = (struct iris_context *)ctx;
struct iris_screen *screen = (struct iris_screen *)ctx->screen;
const struct gen_device_info *devinfo = &screen->devinfo;
ish->program_id = get_new_program_id(screen);
ish->nir = nir;
- if (so_info)
+ if (so_info) {
memcpy(&ish->stream_output, so_info, sizeof(*so_info));
-
- switch (nir->info.stage) {
- case MESA_SHADER_VERTEX:
- /* User clip planes */
- if (nir->info.clip_distance_array_size == 0)
- ish->nos |= IRIS_NOS_RASTERIZER;
- // XXX: NOS
- break;
- case MESA_SHADER_TESS_CTRL:
- // XXX: NOS
- break;
- case MESA_SHADER_TESS_EVAL:
- // XXX: NOS
- break;
- case MESA_SHADER_GEOMETRY:
- // XXX: NOS
- break;
- case MESA_SHADER_FRAGMENT:
- ish->nos |= IRIS_NOS_FRAMEBUFFER |
- IRIS_NOS_DEPTH_STENCIL_ALPHA |
- IRIS_NOS_RASTERIZER |
- IRIS_NOS_BLEND;
-
- /* The program key needs the VUE map if there are > 16 inputs */
- if (util_bitcount64(ish->nir->info.inputs_read &
- BRW_FS_VARYING_INPUT_MASK) > 16) {
- ish->nos |= IRIS_NOS_LAST_VUE_MAP;
- }
- break;
- case MESA_SHADER_COMPUTE:
- // XXX: NOS
- break;
- default:
- break;
+ update_so_info(&ish->stream_output);
}
- // XXX: precompile!
- // XXX: disallow more than 64KB of shared variables
-
return ish;
}
-/**
- * The pipe->delete_[stage]_state() driver hooks.
- *
- * Frees the iris_uncompiled_shader.
- */
-static void *
+static struct iris_uncompiled_shader *
iris_create_shader_state(struct pipe_context *ctx,
const struct pipe_shader_state *state)
{
&state->stream_output);
}
+static void *
+iris_create_vs_state(struct pipe_context *ctx,
+ const struct pipe_shader_state *state)
+{
+ struct iris_uncompiled_shader *ish = iris_create_shader_state(ctx, state);
+
+ /* User clip planes */
+ if (ish->nir->info.clip_distance_array_size == 0)
+ ish->nos |= IRIS_NOS_RASTERIZER;
+
+ return ish;
+}
+
+static void *
+iris_create_tcs_state(struct pipe_context *ctx,
+ const struct pipe_shader_state *state)
+{
+ struct iris_uncompiled_shader *ish = iris_create_shader_state(ctx, state);
+
+ // XXX: NOS?
+
+ return ish;
+}
+
+static void *
+iris_create_tes_state(struct pipe_context *ctx,
+ const struct pipe_shader_state *state)
+{
+ struct iris_uncompiled_shader *ish = iris_create_shader_state(ctx, state);
+
+ // XXX: NOS?
+
+ return ish;
+}
+
+static void *
+iris_create_gs_state(struct pipe_context *ctx,
+ const struct pipe_shader_state *state)
+{
+ struct iris_uncompiled_shader *ish = iris_create_shader_state(ctx, state);
+
+ // XXX: NOS?
+
+ return ish;
+}
+
+static void *
+iris_create_fs_state(struct pipe_context *ctx,
+ const struct pipe_shader_state *state)
+{
+ struct iris_uncompiled_shader *ish = iris_create_shader_state(ctx, state);
+
+ ish->nos |= IRIS_NOS_FRAMEBUFFER |
+ IRIS_NOS_DEPTH_STENCIL_ALPHA |
+ IRIS_NOS_RASTERIZER |
+ IRIS_NOS_BLEND;
+
+ /* The program key needs the VUE map if there are > 16 inputs */
+ if (util_bitcount64(ish->nir->info.inputs_read &
+ BRW_FS_VARYING_INPUT_MASK) > 16) {
+ ish->nos |= IRIS_NOS_LAST_VUE_MAP;
+ }
+
+ return ish;
+}
+
static void *
iris_create_compute_state(struct pipe_context *ctx,
const struct pipe_compute_state *state)
{
assert(state->ir_type == PIPE_SHADER_IR_NIR);
- return iris_create_uncompiled_shader(ctx, (void *) state->prog, NULL);
+ // XXX: disallow more than 64KB of shared variables
+
+ struct iris_uncompiled_shader *ish =
+ iris_create_uncompiled_shader(ctx, (void *) state->prog, NULL);
+
+ return ish;
}
+/**
+ * The pipe->delete_[stage]_state() driver hooks.
+ *
+ * Frees the iris_uncompiled_shader.
+ */
static void
iris_delete_shader_state(struct pipe_context *ctx, void *state)
{
assign_common_binding_table_offsets(const struct gen_device_info *devinfo,
const struct nir_shader *nir,
struct brw_stage_prog_data *prog_data,
- uint32_t next_binding_table_offset)
+ uint32_t next_binding_table_offset,
+ unsigned num_system_values)
{
const struct shader_info *info = &nir->info;
prog_data->binding_table.image_start = 0xd0d0d0d0;
}
- int num_ubos = info->num_ubos + (nir->num_uniforms > 0 ? 1 : 0);
+ int num_ubos = info->num_ubos +
+ ((nir->num_uniforms || num_system_values) ? 1 : 0);
if (num_ubos) {
//assert(info->num_ubos <= BRW_MAX_UBO);
enum brw_param_builtin **out_system_values,
unsigned *out_num_system_values)
{
+ /* We don't use params[], but fs_visitor::nir_setup_uniforms() asserts
+ * about it for compute shaders, so go ahead and make some fake ones
+ * which the backend will dead code eliminate.
+ */
+ prog_data->nr_params = nir->num_uniforms;
+ prog_data->param = rzalloc_array(mem_ctx, uint32_t, prog_data->nr_params);
+
/* The intel compiler assumes that num_uniforms is in bytes. For
* scalar that means 4 bytes per uniform slot.
*
*/
nir->num_uniforms *= 4;
- prog_data->nr_params = 0;
- prog_data->param = rzalloc_array(mem_ctx, uint32_t, 1);
-
const unsigned IRIS_MAX_SYSTEM_VALUES = 32;
enum brw_param_builtin *system_values =
rzalloc_array(mem_ctx, enum brw_param_builtin, IRIS_MAX_SYSTEM_VALUES);
nir_lower_io_to_temporaries(nir, impl, true, false);
nir_lower_global_vars_to_local(nir);
nir_lower_vars_to_ssa(nir);
+ nir_shader_gather_info(nir, impl);
}
// XXX: alt mode
- assign_common_binding_table_offsets(devinfo, nir, prog_data, 0);
iris_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
&num_system_values);
+ assign_common_binding_table_offsets(devinfo, nir, prog_data, 0,
+ num_system_values);
+
brw_compute_vue_map(devinfo,
&vue_prog_data->vue_map, nir->info.outputs_written,
nir->info.separate_shader);
iris_get_shader_num_ubos(const struct iris_context *ice, gl_shader_stage stage)
{
const struct iris_uncompiled_shader *ish = ice->shaders.uncompiled[stage];
+ const struct iris_compiled_shader *shader = ice->shaders.prog[stage];
if (ish) {
const nir_shader *nir = ish->nir;
/* see assign_common_binding_table_offsets */
- return nir->info.num_ubos + (nir->num_uniforms > 0 ? 1 : 0);
+ return nir->info.num_ubos +
+ ((nir->num_uniforms || shader->num_system_values) ? 1 : 0);
}
return 0;
}
*per_patch_slots = tes->patch_inputs_read;
if (tcs) {
- *per_vertex_slots |= tcs->inputs_read;
- *per_patch_slots |= tcs->patch_inputs_read;
+ *per_vertex_slots |= tcs->outputs_written;
+ *per_patch_slots |= tcs->patch_outputs_written;
}
}
if (ish) {
nir = nir_shader_clone(mem_ctx, ish->nir);
- assign_common_binding_table_offsets(devinfo, nir, prog_data, 0);
iris_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
&num_system_values);
+ assign_common_binding_table_offsets(devinfo, nir, prog_data, 0,
+ num_system_values);
} else {
nir = brw_nir_create_passthrough_tcs(mem_ctx, compiler, options, key);
nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir);
- assign_common_binding_table_offsets(devinfo, nir, prog_data, 0);
-
iris_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
&num_system_values);
+ assign_common_binding_table_offsets(devinfo, nir, prog_data, 0,
+ num_system_values);
+
struct brw_vue_map input_vue_map;
brw_compute_tess_vue_map(&input_vue_map, key->inputs_read,
key->patch_inputs_read);
nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir);
- assign_common_binding_table_offsets(devinfo, nir, prog_data, 0);
-
iris_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
&num_system_values);
+ assign_common_binding_table_offsets(devinfo, nir, prog_data, 0,
+ num_system_values);
+
brw_compute_vue_map(devinfo,
&vue_prog_data->vue_map, nir->info.outputs_written,
nir->info.separate_shader);
nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir);
// XXX: alt mode
- assign_common_binding_table_offsets(devinfo, nir, prog_data,
- MAX2(key->nr_color_regions, 1));
iris_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
&num_system_values);
+ assign_common_binding_table_offsets(devinfo, nir, prog_data,
+ MAX2(key->nr_color_regions, 1),
+ num_system_values);
char *error_str = NULL;
const unsigned *program =
brw_compile_fs(compiler, &ice->dbg, mem_ctx, key, fs_prog_data,
nir_shader *nir = nir_shader_clone(mem_ctx, ish->nir);
cs_prog_data->binding_table.work_groups_start = 0;
- assign_common_binding_table_offsets(devinfo, nir, prog_data, 1);
+
+ prog_data->total_shared = nir->info.cs.shared_size;
iris_setup_uniforms(compiler, mem_ctx, nir, prog_data, &system_values,
&num_system_values);
+ assign_common_binding_table_offsets(devinfo, nir, prog_data, 1,
+ num_system_values);
+
char *error_str = NULL;
const unsigned *program =
brw_compile_cs(compiler, &ice->dbg, mem_ctx, key, cs_prog_data,
void
iris_init_program_functions(struct pipe_context *ctx)
{
- ctx->create_vs_state = iris_create_shader_state;
- ctx->create_tcs_state = iris_create_shader_state;
- ctx->create_tes_state = iris_create_shader_state;
- ctx->create_gs_state = iris_create_shader_state;
- ctx->create_fs_state = iris_create_shader_state;
+ ctx->create_vs_state = iris_create_vs_state;
+ ctx->create_tcs_state = iris_create_tcs_state;
+ ctx->create_tes_state = iris_create_tes_state;
+ ctx->create_gs_state = iris_create_gs_state;
+ ctx->create_fs_state = iris_create_fs_state;
ctx->create_compute_state = iris_create_compute_state;
ctx->delete_vs_state = iris_delete_shader_state;
projects / mesa.git / blobdiff