#include "util/os_memory.h"
#include "util/u_cpu_detect.h"
#include "util/u_inlines.h"
-#include "util/u_format.h"
+#include "util/format/u_format.h"
#include "util/u_threaded_context.h"
#include "util/u_transfer.h"
#include "util/u_transfer_helper.h"
enum isl_format linear_format = isl_format_srgb_to_linear(rt_format);
- if (!isl_format_supports_ccs_e(devinfo, linear_format))
+ if (linear_format == ISL_FORMAT_UNSUPPORTED ||
+ !isl_format_supports_ccs_e(devinfo, linear_format))
return false;
return devinfo->gen >= 9 && devinfo->gen <= 11;
return usage;
}
+enum isl_format
+iris_image_view_get_format(struct iris_context *ice,
+ const struct pipe_image_view *img)
+{
+ struct iris_screen *screen = (struct iris_screen *)ice->ctx.screen;
+ const struct gen_device_info *devinfo = &screen->devinfo;
+
+ isl_surf_usage_flags_t usage = ISL_SURF_USAGE_STORAGE_BIT;
+ enum isl_format isl_fmt =
+ iris_format_for_usage(devinfo, img->format, usage).fmt;
+
+ if (img->shader_access & PIPE_IMAGE_ACCESS_READ) {
+ /* On Gen8, try to use typed surfaces reads (which support a
+ * limited number of formats), and if not possible, fall back
+ * to untyped reads.
+ */
+ if (devinfo->gen == 8 &&
+ !isl_has_matching_typed_storage_image_format(devinfo, isl_fmt))
+ return ISL_FORMAT_RAW;
+ else
+ return isl_lower_storage_image_format(devinfo, isl_fmt);
+ }
+
+ return isl_fmt;
+}
+
struct pipe_resource *
iris_resource_get_separate_stencil(struct pipe_resource *p_res)
{
iris_resource_disable_aux(struct iris_resource *res)
{
iris_bo_unreference(res->aux.bo);
- iris_bo_unreference(res->aux.extra_aux.bo);
iris_bo_unreference(res->aux.clear_color_bo);
free(res->aux.state);
res->aux.surf.size_B = 0;
res->aux.bo = NULL;
res->aux.extra_aux.surf.size_B = 0;
- res->aux.extra_aux.bo = NULL;
res->aux.clear_color_bo = NULL;
res->aux.state = NULL;
}
iris_resource_disable_aux(res);
iris_bo_unreference(res->bo);
+ iris_pscreen_unref(res->base.screen);
+
free(res);
}
return NULL;
res->base = *templ;
- res->base.screen = pscreen;
+ res->base.screen = iris_pscreen_ref(pscreen);
pipe_reference_init(&res->base.reference, 1);
res->aux.possible_usages = 1 << ISL_AUX_USAGE_NONE;
static enum isl_aux_state **
create_aux_state_map(struct iris_resource *res, enum isl_aux_state initial)
{
+ assert(res->aux.state == NULL);
+
uint32_t total_slices = 0;
for (uint32_t level = 0; level < res->surf.levels; level++)
total_slices += iris_get_num_logical_layers(res, level);
if (devinfo->gen >= 12 && isl_aux_usage_has_ccs(res->aux.usage)) {
void *aux_map_ctx = iris_bufmgr_get_aux_map_context(screen->bufmgr);
assert(aux_map_ctx);
- const bool has_extra_ccs = res->aux.extra_aux.surf.size_B > 0;
- struct iris_bo *aux_bo = has_extra_ccs ?
- res->aux.extra_aux.bo : res->aux.bo;
- const unsigned aux_offset = has_extra_ccs ?
+ const unsigned aux_offset = res->aux.extra_aux.surf.size_B > 0 ?
res->aux.extra_aux.offset : res->aux.offset;
gen_aux_map_add_image(aux_map_ctx, &res->surf, res->bo->gtt_offset,
- aux_bo->gtt_offset + aux_offset);
- res->bo->aux_map_address = aux_bo->gtt_offset;
+ res->aux.bo->gtt_offset + aux_offset);
+ res->bo->aux_map_address = res->aux.bo->gtt_offset;
}
}
* Configure aux for the resource, but don't allocate it. For images which
* might be shared with modifiers, we must allocate the image and aux data in
* a single bo.
+ *
+ * Returns false on unexpected error (e.g. allocation failed, or invalid
+ * configuration result).
*/
static bool
iris_resource_configure_aux(struct iris_screen *screen,
/* Only allow a CCS modifier if the aux was created successfully. */
res->aux.possible_usages |= 1 << res->mod_info->aux_usage;
} else if (has_mcs) {
- res->aux.possible_usages |= 1 << ISL_AUX_USAGE_MCS;
+ res->aux.possible_usages |=
+ 1 << (has_ccs ? ISL_AUX_USAGE_MCS_CCS : ISL_AUX_USAGE_MCS);
} else if (has_hiz) {
- res->aux.possible_usages |= 1 << ISL_AUX_USAGE_HIZ;
+ if (!has_ccs) {
+ res->aux.possible_usages |= 1 << ISL_AUX_USAGE_HIZ;
+ } else if (res->surf.samples == 1 &&
+ (res->surf.usage & ISL_SURF_USAGE_TEXTURE_BIT)) {
+ /* If this resource is single-sampled and will be used as a texture,
+ * put the HiZ surface in write-through mode so that we can sample
+ * from it.
+ */
+ res->aux.possible_usages |= 1 << ISL_AUX_USAGE_HIZ_CCS_WT;
+ } else {
+ res->aux.possible_usages |= 1 << ISL_AUX_USAGE_HIZ_CCS;
+ }
+ } else if (has_ccs && isl_surf_usage_is_stencil(res->surf.usage)) {
+ res->aux.possible_usages |= 1 << ISL_AUX_USAGE_STC_CCS;
} else if (has_ccs) {
if (want_ccs_e_for_format(devinfo, res->surf.format))
res->aux.possible_usages |= 1 << ISL_AUX_USAGE_CCS_E;
if (!devinfo->has_sample_with_hiz || res->surf.samples > 1)
res->aux.sampler_usages &= ~(1 << ISL_AUX_USAGE_HIZ);
+ /* ISL_AUX_USAGE_HIZ_CCS doesn't support sampling at all */
+ res->aux.sampler_usages &= ~(1 << ISL_AUX_USAGE_HIZ_CCS);
+
enum isl_aux_state initial_state;
*aux_size_B = 0;
*alloc_flags = 0;
/* Having no aux buffer is only okay if there's no modifier with aux. */
return !res->mod_info || res->mod_info->aux_usage == ISL_AUX_USAGE_NONE;
case ISL_AUX_USAGE_HIZ:
+ case ISL_AUX_USAGE_HIZ_CCS:
+ case ISL_AUX_USAGE_HIZ_CCS_WT:
initial_state = ISL_AUX_STATE_AUX_INVALID;
break;
case ISL_AUX_USAGE_MCS:
+ case ISL_AUX_USAGE_MCS_CCS:
/* The Ivybridge PRM, Vol 2 Part 1 p326 says:
*
* "When MCS buffer is enabled and bound to MSRT, it is required
break;
case ISL_AUX_USAGE_CCS_D:
case ISL_AUX_USAGE_CCS_E:
+ case ISL_AUX_USAGE_STC_CCS:
/* When CCS_E is used, we need to ensure that the CCS starts off in
* a valid state. From the Sky Lake PRM, "MCS Buffer for Render
* Target(s)":
* For CCS_D, do the same thing. On Gen9+, this avoids having any
* undefined bits in the aux buffer.
*/
- if (imported)
+ if (imported) {
+ assert(res->aux.usage != ISL_AUX_USAGE_STC_CCS);
initial_state =
isl_drm_modifier_get_default_aux_state(res->mod_info->modifier);
- else
+ } else {
initial_state = ISL_AUX_STATE_PASS_THROUGH;
+ }
*alloc_flags |= BO_ALLOC_ZEROED;
break;
+ case ISL_AUX_USAGE_MC:
+ unreachable("Unsupported aux mode");
}
- if (!res->aux.state) {
- /* Create the aux_state for the auxiliary buffer. */
- res->aux.state = create_aux_state_map(res, initial_state);
- if (!res->aux.state)
- return false;
- }
+ /* Create the aux_state for the auxiliary buffer. */
+ res->aux.state = create_aux_state_map(res, initial_state);
+ if (!res->aux.state)
+ return false;
+ /* Increase the aux offset if the main and aux surfaces will share a BO. */
+ res->aux.offset =
+ !res->mod_info || res->mod_info->aux_usage == res->aux.usage ?
+ ALIGN(res->surf.size_B, res->aux.surf.alignment_B) : 0;
uint64_t size = res->aux.surf.size_B;
/* Allocate space in the buffer for storing the CCS. */
if (res->aux.extra_aux.surf.size_B > 0) {
- res->aux.extra_aux.offset =
+ const uint64_t padded_aux_size =
ALIGN(size, res->aux.extra_aux.surf.alignment_B);
- size = res->aux.extra_aux.offset + res->aux.extra_aux.surf.size_B;
+ res->aux.extra_aux.offset = res->aux.offset + padded_aux_size;
+ size = padded_aux_size + res->aux.extra_aux.surf.size_B;
}
/* Allocate space in the buffer for storing the clear color. On modern
*
* On gen <= 9, we are going to store the clear color on the buffer
* anyways, and copy it back to the surface state during state emission.
+ *
+ * Also add some padding to make sure the fast clear color state buffer
+ * starts at a 4K alignment. We believe that 256B might be enough, but due
+ * to lack of testing we will leave this as 4K for now.
*/
- res->aux.clear_color_offset = size;
+ size = ALIGN(size, 4096);
+ res->aux.clear_color_offset = res->aux.offset + size;
size += iris_get_aux_clear_color_state_size(screen);
*aux_size_B = size;
- if (res->aux.usage == ISL_AUX_USAGE_HIZ) {
+ if (isl_aux_usage_has_hiz(res->aux.usage)) {
for (unsigned level = 0; level < res->surf.levels; ++level) {
uint32_t width = u_minify(res->surf.phys_level0_sa.width, level);
uint32_t height = u_minify(res->surf.phys_level0_sa.height, level);
/**
* Initialize the aux buffer contents.
+ *
+ * Returns false on unexpected error (e.g. mapping a BO failed).
*/
static bool
iris_resource_init_aux_buf(struct iris_resource *res, uint32_t alloc_flags,
if (!(alloc_flags & BO_ALLOC_ZEROED)) {
void *map = iris_bo_map(NULL, res->aux.bo, MAP_WRITE | MAP_RAW);
- if (!map) {
- iris_resource_disable_aux(res);
+ if (!map)
return false;
- }
if (iris_resource_get_aux_state(res, 0, 0) != ISL_AUX_STATE_AUX_INVALID) {
- uint8_t memset_value = res->aux.usage == ISL_AUX_USAGE_MCS ? 0xFF : 0;
+ uint8_t memset_value = isl_aux_usage_has_mcs(res->aux.usage) ? 0xFF : 0;
memset((char*)map + res->aux.offset, memset_value,
res->aux.surf.size_B);
}
- /* Resolved is usually a safe state for CCS_E. */
- memset((char*)map + res->aux.extra_aux.offset, 0,
- res->aux.extra_aux.surf.size_B);
+ memset((char*)map + res->aux.extra_aux.offset,
+ 0, res->aux.extra_aux.surf.size_B);
/* Zero the indirect clear color to match ::fast_clear_color. */
memset((char *)map + res->aux.clear_color_offset, 0,
iris_bo_unmap(res->aux.bo);
}
- if (res->aux.extra_aux.surf.size_B > 0) {
- res->aux.extra_aux.bo = res->aux.bo;
- iris_bo_reference(res->aux.extra_aux.bo);
- }
-
if (clear_color_state_size > 0) {
res->aux.clear_color_bo = res->aux.bo;
iris_bo_reference(res->aux.clear_color_bo);
/**
* Allocate the initial aux surface for a resource based on aux.usage
+ *
+ * Returns false on unexpected error (e.g. allocation failed, or invalid
+ * configuration result).
*/
static bool
iris_resource_alloc_separate_aux(struct iris_screen *screen,
return NULL;
}
+ if (templ->bind & PIPE_BIND_SHARED)
+ iris_bo_make_external(res->bo);
+
return &res->base;
}
} else {
if (modifiers_count > 0) {
fprintf(stderr, "Unsupported modifier, resource creation failed.\n");
- return NULL;
+ goto fail;
}
/* Use linear for staging buffers */
if (templ->usage == PIPE_USAGE_STAGING ||
templ->bind & (PIPE_BIND_LINEAR | PIPE_BIND_CURSOR) )
tiling_flags = ISL_TILING_LINEAR_BIT;
+ else if (templ->bind & PIPE_BIND_SCANOUT)
+ tiling_flags = ISL_TILING_X_BIT;
}
isl_surf_usage_flags_t usage = pipe_bind_to_isl_usage(templ->bind);
uint32_t aux_preferred_alloc_flags;
uint64_t aux_size = 0;
- bool aux_enabled =
- iris_resource_configure_aux(screen, res, false, &aux_size,
- &aux_preferred_alloc_flags);
- aux_enabled = aux_enabled && res->aux.surf.size_B > 0;
- const bool separate_aux = aux_enabled && !res->mod_info;
- uint64_t aux_offset;
- uint64_t bo_size;
-
- if (aux_enabled && !separate_aux) {
- /* Allocate aux data with main surface. This is required for modifiers
- * with aux data (ccs).
- */
- aux_offset = ALIGN(res->surf.size_B, res->aux.surf.alignment_B);
- bo_size = aux_offset + aux_size;
- } else {
- aux_offset = 0;
- bo_size = res->surf.size_B;
+ if (!iris_resource_configure_aux(screen, res, false, &aux_size,
+ &aux_preferred_alloc_flags)) {
+ goto fail;
}
+ /* Modifiers require the aux data to be in the same buffer as the main
+ * surface, but we combine them even when a modifiers is not being used.
+ */
+ const uint64_t bo_size =
+ MAX2(res->surf.size_B, res->aux.offset + aux_size);
uint32_t alignment = MAX2(4096, res->surf.alignment_B);
res->bo = iris_bo_alloc_tiled(screen->bufmgr, name, bo_size, alignment,
memzone,
if (!res->bo)
goto fail;
- if (aux_enabled) {
- if (separate_aux) {
- if (!iris_resource_alloc_separate_aux(screen, res))
- aux_enabled = false;
- } else {
- res->aux.bo = res->bo;
- iris_bo_reference(res->aux.bo);
- res->aux.offset += aux_offset;
- unsigned clear_color_state_size =
- iris_get_aux_clear_color_state_size(screen);
- if (clear_color_state_size > 0)
- res->aux.clear_color_offset += aux_offset;
- if (!iris_resource_init_aux_buf(res, flags, clear_color_state_size))
- aux_enabled = false;
- map_aux_addresses(screen, res);
- }
+ if (aux_size > 0) {
+ res->aux.bo = res->bo;
+ iris_bo_reference(res->aux.bo);
+ unsigned clear_color_state_size =
+ iris_get_aux_clear_color_state_size(screen);
+ if (!iris_resource_init_aux_buf(res, flags, clear_color_state_size))
+ goto fail;
+ map_aux_addresses(screen, res);
}
- if (!aux_enabled)
- iris_resource_disable_aux(res);
+ if (templ->bind & PIPE_BIND_SHARED)
+ iris_bo_make_external(res->bo);
return &res->base;
user_memory, templ->width0,
IRIS_MEMZONE_OTHER);
if (!res->bo) {
- free(res);
+ iris_resource_destroy(pscreen, &res->base);
return NULL;
}
struct gen_device_info *devinfo = &screen->devinfo;
struct iris_bufmgr *bufmgr = screen->bufmgr;
struct iris_resource *res = iris_alloc_resource(pscreen, templ);
+ const struct isl_drm_modifier_info *mod_inf =
+ isl_drm_modifier_get_info(whandle->modifier);
+ uint32_t tiling;
+
if (!res)
return NULL;
switch (whandle->type) {
case WINSYS_HANDLE_TYPE_FD:
- res->bo = iris_bo_import_dmabuf(bufmgr, whandle->handle);
+ if (mod_inf)
+ tiling = isl_tiling_to_i915_tiling(mod_inf->tiling);
+ else
+ tiling = I915_TILING_LAST + 1;
+ res->bo = iris_bo_import_dmabuf(bufmgr, whandle->handle,
+ tiling, whandle->stride);
break;
case WINSYS_HANDLE_TYPE_SHARED:
res->bo = iris_bo_gem_create_from_name(bufmgr, "winsys image",
unreachable("invalid winsys handle type");
}
if (!res->bo)
- return NULL;
+ goto fail;
res->offset = whandle->offset;
- uint64_t modifier = whandle->modifier;
- if (modifier == DRM_FORMAT_MOD_INVALID) {
- modifier = tiling_to_modifier(res->bo->tiling_mode);
+ if (mod_inf == NULL) {
+ mod_inf =
+ isl_drm_modifier_get_info(tiling_to_modifier(res->bo->tiling_mode));
}
- res->mod_info = isl_drm_modifier_get_info(modifier);
- assert(res->mod_info);
+ assert(mod_inf);
+
+ res->external_format = whandle->format;
+ res->mod_info = mod_inf;
isl_surf_usage_flags_t isl_usage = pipe_bind_to_isl_usage(templ->bind);
if (templ->target == PIPE_BUFFER) {
res->surf.tiling = ISL_TILING_LINEAR;
} else {
- if (whandle->modifier == DRM_FORMAT_MOD_INVALID || whandle->plane == 0) {
+ /* Create a surface for each plane specified by the external format. */
+ if (whandle->plane < util_format_get_num_planes(whandle->format)) {
UNUSED const bool isl_surf_created_successfully =
isl_surf_init(&screen->isl_dev, &res->surf,
.dim = target_to_isl_surf_dim(templ->target),
whandle->stride = res->surf.row_pitch_B;
bo = res->bo;
}
+
+ whandle->format = res->external_format;
whandle->modifier =
res->mod_info ? res->mod_info->modifier
: tiling_to_modifier(res->bo->tiling_mode);
if (resource->target != PIPE_BUFFER)
return;
+ /* If it's already invalidated, don't bother doing anything. */
+ if (res->valid_buffer_range.start > res->valid_buffer_range.end)
+ return;
+
if (!resource_is_busy(ice, res)) {
/* The resource is idle, so just mark that it contains no data and
* keep using the same underlying buffer object.
/* Rebind the buffer, replacing any state referring to the old BO's
* address, and marking state dirty so it's reemitted.
*/
- ice->vtbl.rebind_buffer(ice, res, old_bo->gtt_offset);
+ screen->vtbl.rebind_buffer(ice, res);
util_range_set_empty(&res->valid_buffer_range);
struct iris_resource *res = (struct iris_resource *)resource;
struct isl_surf *surf = &res->surf;
+ if (iris_resource_unfinished_aux_import(res))
+ iris_resource_finish_aux_import(ctx->screen, res);
+
if (usage & PIPE_TRANSFER_DISCARD_WHOLE_RESOURCE) {
/* Replace the backing storage with a fresh buffer for non-async maps */
if (!(usage & (PIPE_TRANSFER_UNSYNCHRONIZED |
if (resource->target != PIPE_BUFFER) {
bool need_hiz_resolve = iris_resource_level_has_hiz(res, level);
+ bool need_stencil_resolve = res->aux.usage == ISL_AUX_USAGE_STC_CCS;
need_color_resolve =
(res->aux.usage == ISL_AUX_USAGE_CCS_D ||
res->aux.usage == ISL_AUX_USAGE_CCS_E) &&
iris_has_color_unresolved(res, level, 1, box->z, box->depth);
- need_resolve = need_color_resolve || need_hiz_resolve;
+ need_resolve = need_color_resolve ||
+ need_hiz_resolve ||
+ need_stencil_resolve;
}
bool map_would_stall = false;