iris: Don't enable smooth points when point sprites are enabled

[mesa.git] / src / gallium / drivers / iris / iris_screen.c

diff --git a/src/gallium/drivers/iris/iris_screen.c b/src/gallium/drivers/iris/iris_screen.c
index f2c45e5ec6eb219a6222cac150497a45fc5a19a9..9da3369d7c28ddcca1888b75f358adf9280615aa 100644 (file)
--- a/src/gallium/drivers/iris/iris_screen.c
+++ b/src/gallium/drivers/iris/iris_screen.c
@@ -37,8 +37,10 @@
 #include "pipe/p_state.h"
 #include "pipe/p_context.h"
 #include "pipe/p_screen.h"
+#include "util/debug.h"
 #include "util/u_inlines.h"
 #include "util/u_format.h"
+#include "util/u_transfer_helper.h"
 #include "util/u_upload_mgr.h"
 #include "util/ralloc.h"
 #include "drm-uapi/i915_drm.h"
@@ -125,7 +127,7 @@ iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_TEXTURE_MULTISAMPLE:
    case PIPE_CAP_CUBE_MAP_ARRAY:
    case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
-   case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
+   case PIPE_CAP_QUERY_PIPELINE_STATISTICS_SINGLE:
    case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
    case PIPE_CAP_TEXTURE_QUERY_LOD:
    case PIPE_CAP_SAMPLE_SHADING:
@@ -155,12 +157,10 @@ iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
    case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
    case PIPE_CAP_POLYGON_OFFSET_CLAMP:
-   case PIPE_CAP_POST_DEPTH_COVERAGE:
    case PIPE_CAP_QUERY_SO_OVERFLOW:
    case PIPE_CAP_QUERY_BUFFER_OBJECT:
    case PIPE_CAP_TGSI_TEX_TXF_LZ:
    case PIPE_CAP_TGSI_TXQS:
-   case PIPE_CAP_TGSI_FS_FBFETCH:
    case PIPE_CAP_TGSI_CLOCK:
    case PIPE_CAP_TGSI_BALLOT:
    case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
@@ -170,10 +170,12 @@ iris_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
    case PIPE_CAP_TEXTURE_GATHER_SM5:
    case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
    case PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS:
-   case PIPE_CAP_SHADER_STENCIL_EXPORT:
    case PIPE_CAP_LOAD_CONSTBUF:
       return true;
-
+   case PIPE_CAP_TGSI_FS_FBFETCH:
+   case PIPE_CAP_POST_DEPTH_COVERAGE:
+   case PIPE_CAP_SHADER_STENCIL_EXPORT:
+      return devinfo->gen >= 9;
    case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
       return 1;
    case PIPE_CAP_MAX_RENDER_TARGETS:
@@ -324,13 +326,14 @@ iris_get_shader_param(struct pipe_screen *pscreen,
    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
       return 0;
    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
-      return !compiler->glsl_compiler_options[stage].EmitNoIndirectInput;
    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
-      return !compiler->glsl_compiler_options[stage].EmitNoIndirectOutput;
    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
-      return !compiler->glsl_compiler_options[stage].EmitNoIndirectTemp;
    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
-      return 1;
+      /* Lie about these to avoid st/mesa's GLSL IR lowering of indirects,
+       * which we don't want.  Our compiler backend will check brw_compiler's
+       * options and call nir_lower_indirect_derefs appropriately anyway.
+       */
+      return true;
    case PIPE_SHADER_CAP_SUBROUTINES:
       return 0;
    case PIPE_SHADER_CAP_INTEGERS:
@@ -457,6 +460,8 @@ iris_destroy_screen(struct pipe_screen *pscreen)
 {
    struct iris_screen *screen = (struct iris_screen *) pscreen;
    iris_bo_unreference(screen->workaround_bo);
+   u_transfer_helper_destroy(pscreen->transfer_helper);
+   iris_bufmgr_destroy(screen->bufmgr);
    ralloc_free(screen);
 }
 
@@ -550,6 +555,9 @@ iris_screen_create(int fd)
    if (!gen_get_device_info(screen->pci_id, &screen->devinfo))
       return NULL;
 
+   if (screen->devinfo.gen < 8 || screen->devinfo.is_cherryview)
+      return NULL;
+
    screen->devinfo.timestamp_frequency =
       iris_getparam_integer(screen, I915_PARAM_CS_TIMESTAMP_FREQUENCY);
 
@@ -564,6 +572,8 @@ iris_screen_create(int fd)
 
    brw_process_intel_debug_variable();
 
+   screen->precompile = env_var_as_boolean("shader_precompile", true);
+
    bool hw_has_swizzling = false; // XXX: detect?
    isl_device_init(&screen->isl_dev, &screen->devinfo, hw_has_swizzling);