radeonsi: use a clever alignment for constant buffer uploads

[mesa.git] / src / gallium / drivers / nouveau / Android.mk

diff --git a/src/gallium/drivers/nouveau/Android.mk b/src/gallium/drivers/nouveau/Android.mk
index 3f6ec5b6a0710916bccee2f8a3ea808b8db01be3..839a3899cb7bacdfdd6fa816c2d22730e543a011 100644 (file)
--- a/src/gallium/drivers/nouveau/Android.mk
+++ b/src/gallium/drivers/nouveau/Android.mk
@@ -36,11 +36,13 @@ LOCAL_SRC_FILES := \
        $(NVC0_CODEGEN_SOURCES) \
        $(NVC0_C_SOURCES)
 
-LOCAL_C_INCLUDES := \
-       $(TARGET_OUT_HEADERS)/libdrm
-
+LOCAL_SHARED_LIBRARIES := libdrm_nouveau
 LOCAL_MODULE := libmesa_pipe_nouveau
 
+ifeq ($(MESA_LOLLIPOP_BUILD),true)
+LOCAL_C_INCLUDES := external/libcxx/include
+else
 include external/stlport/libstlport.mk
+endif
 include $(GALLIUM_COMMON_MK)
 include $(BUILD_STATIC_LIBRARY)