**************************************************************************
- Copyright (C) 2006-2007 :
+ Copyright (C) 2006-2008 :
Dmitry Baryshkov,
Laurent Carlier,
Matthieu Castet,
#define NV04_DX6_MULTITEX_TRIANGLE_TLMTVERTEX_DRAWPRIMITIVE_I5_MASK 0x00f00000
+#define NV10_DX5_TEXTURED_TRIANGLE 0x00000094
+
+
+
#define NV10TCL 0x00000056
#define NV10TCL_NOP 0x00000100
#define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000100
#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000180
#define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000200
+#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000280
#define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000300
#define NV10TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000380
#define NV10TCL_TX_FORMAT_FORMAT_INDEX8 0x00000580
#define NV10TCL_TX_FORMAT_FORMAT_DXT3 0x00000700
#define NV10TCL_TX_FORMAT_FORMAT_DXT5 0x00000780
#define NV10TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00000800
+#define NV10TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00000880
#define NV10TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00000900
#define NV10TCL_TX_FORMAT_FORMAT_L8_RECT 0x00000980
#define NV10TCL_TX_FORMAT_FORMAT_A8L8 0x00000d00
#define NV10TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00000d80
-#define NV10TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00000f00
#define NV10TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00000e80
+#define NV10TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00000f00
#define NV10TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00001000
#define NV10TCL_TX_FORMAT_FORMAT_A16 0x00001900
+#define NV10TCL_TX_FORMAT_FORMAT_HILO16 0x00001980
#define NV10TCL_TX_FORMAT_FORMAT_A16_RECT 0x00001a80
+#define NV10TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00001b00
+#define NV10TCL_TX_FORMAT_FORMAT_HILO8 0x00002200
+#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00002280
+#define NV10TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00002300
+#define NV10TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00002380
#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00002500
#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00002580
#define NV10TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00002600
#define NV10TCL_VERTEX_WGH_1F 0x00000ce4
#define NV10TCL_EDGEFLAG_ENABLE 0x00000cec
#define NV10TCL_VERTEX_ARRAY_VALIDATE 0x00000cf0
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET(x) (0x00000d00+((x)*8))
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_OFFSET__SIZE 0x00000008
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT(x) (0x00000d04+((x)*8))
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT__SIZE 0x00000008
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_TYPE_SHIFT 0
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_TYPE_MASK 0x0000000f
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_FIELDS_SHIFT 4
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_FIELDS_MASK 0x000000f0
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_STRIDE_SHIFT 8
+#define NV10TCL_VERTEX_ARRAY_ATTRIB_FORMAT_STRIDE_MASK 0x0000ff00
#define NV10TCL_VERTEX_ARRAY_OFFSET_POS 0x00000d00
#define NV10TCL_VERTEX_ARRAY_FORMAT_POS 0x00000d04
#define NV10TCL_VERTEX_ARRAY_FORMAT_POS_TYPE_SHIFT 0
#define NV34TCL_COLOR1_PITCH 0x0000021c
#define NV34TCL_RT_ENABLE 0x00000220
#define NV34TCL_RT_ENABLE_MRT (1 << 4)
-#define NV34TCL_RT_ENABLE_COLOR3 (1 << 3)
-#define NV34TCL_RT_ENABLE_COLOR2 (1 << 2)
#define NV34TCL_RT_ENABLE_COLOR1 (1 << 1)
#define NV34TCL_RT_ENABLE_COLOR0 (1 << 0)
-#define NV34TCL_ZETA_PITCH 0x0000022c
+#define NV34TCL_LMA_DEPTH_PITCH 0x0000022c
#define NV34TCL_LMA_DEPTH_OFFSET 0x00000230
#define NV34TCL_TX_UNITS_ENABLE 0x0000023c
#define NV34TCL_TX_UNITS_ENABLE_TX0 (1 << 0)
#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_COLOR 0x80020000
#define NV34TCL_BLEND_FUNC_DST_ALPHA_CONSTANT_ALPHA 0x80030000
#define NV34TCL_BLEND_FUNC_DST_ALPHA_ONE_MINUS_CONSTANT_ALPHA 0x80040000
-#define NV34TCL_BLEND_FUNC_COLOR 0x0000031c
-#define NV34TCL_BLEND_FUNC_EQUATION 0x00000320
-#define NV34TCL_BLEND_FUNC_EQUATION_FUNC_ADD 0x00008006
-#define NV34TCL_BLEND_FUNC_EQUATION_MIN 0x00008007
-#define NV34TCL_BLEND_FUNC_EQUATION_MAX 0x00008008
-#define NV34TCL_BLEND_FUNC_EQUATION_FUNC_SUBTRACT 0x0000800a
-#define NV34TCL_BLEND_FUNC_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b
+#define NV34TCL_BLEND_COLOR 0x0000031c
+#define NV34TCL_BLEND_COLOR_B_SHIFT 0
+#define NV34TCL_BLEND_COLOR_B_MASK 0x000000ff
+#define NV34TCL_BLEND_COLOR_G_SHIFT 8
+#define NV34TCL_BLEND_COLOR_G_MASK 0x0000ff00
+#define NV34TCL_BLEND_COLOR_R_SHIFT 16
+#define NV34TCL_BLEND_COLOR_R_MASK 0x00ff0000
+#define NV34TCL_BLEND_COLOR_A_SHIFT 24
+#define NV34TCL_BLEND_COLOR_A_MASK 0xff000000
+#define NV34TCL_BLEND_EQUATION 0x00000320
+#define NV34TCL_BLEND_EQUATION_FUNC_ADD 0x00008006
+#define NV34TCL_BLEND_EQUATION_MIN 0x00008007
+#define NV34TCL_BLEND_EQUATION_MAX 0x00008008
+#define NV34TCL_BLEND_EQUATION_FUNC_SUBTRACT 0x0000800a
+#define NV34TCL_BLEND_EQUATION_FUNC_REVERSE_SUBTRACT 0x0000800b
#define NV34TCL_COLOR_MASK 0x00000324
#define NV34TCL_COLOR_MASK_B_SHIFT 0
#define NV34TCL_COLOR_MASK_B_MASK 0x000000ff
#define NV34TCL_DEPTH_TEST_ENABLE 0x00000a74
#define NV34TCL_POLYGON_OFFSET_FACTOR 0x00000a78
#define NV34TCL_POLYGON_OFFSET_UNITS 0x00000a7c
-#define NV34TCL_VERTEX_NOR_3I_XY 0x00000a90
-#define NV34TCL_VERTEX_NOR_3I_XY_X_SHIFT 0
-#define NV34TCL_VERTEX_NOR_3I_XY_X_MASK 0x0000ffff
-#define NV34TCL_VERTEX_NOR_3I_XY_Y_SHIFT 16
-#define NV34TCL_VERTEX_NOR_3I_XY_Y_MASK 0xffff0000
-#define NV34TCL_VERTEX_NOR_3I_Z 0x00000a94
-#define NV34TCL_VERTEX_NOR_3I_Z_Z_SHIFT 0
-#define NV34TCL_VERTEX_NOR_3I_Z_Z_MASK 0x0000ffff
+#define NV34TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8))
+#define NV34TCL_VTX_ATTR_3I_XY__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_3I_XY_X_SHIFT 0
+#define NV34TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff
+#define NV34TCL_VTX_ATTR_3I_XY_Y_SHIFT 16
+#define NV34TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000
+#define NV34TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8))
+#define NV34TCL_VTX_ATTR_3I_Z__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_3I_Z_Z_SHIFT 0
+#define NV34TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff
#define NV34TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4))
#define NV34TCL_VP_UPLOAD_INST__SIZE 0x00000004
#define NV34TCL_CLIP_PLANE_A(x) (0x00000e00+((x)*16))
#define NV34TCL_LIGHT_ATTENUATION_QUADRATIC__SIZE 0x00000008
#define NV34TCL_FRONT_MATERIAL_SHININESS(x) (0x00001400+((x)*4))
#define NV34TCL_FRONT_MATERIAL_SHININESS__SIZE 0x00000006
+#define NV34TCL_ENABLED_LIGHTS 0x00001420
#define NV34TCL_FP_REG_CONTROL 0x00001450
#define NV34TCL_FP_REG_CONTROL_UNK1_SHIFT 16
#define NV34TCL_FP_REG_CONTROL_UNK1_MASK 0xffff0000
#define NV34TCL_POLYGON_STIPPLE_ENABLE 0x0000147c
#define NV34TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4))
#define NV34TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020
-#define NV34TCL_VERTEX_ATTR_3F_X(x) (0x00001500+((x)*16))
-#define NV34TCL_VERTEX_ATTR_3F_X__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_3F_Y(x) (0x00001504+((x)*16))
-#define NV34TCL_VERTEX_ATTR_3F_Y__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_3F_Z(x) (0x00001508+((x)*16))
-#define NV34TCL_VERTEX_ATTR_3F_Z__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_3F_X(x) (0x00001500+((x)*16))
+#define NV34TCL_VTX_ATTR_3F_X__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_3F_Y(x) (0x00001504+((x)*16))
+#define NV34TCL_VTX_ATTR_3F_Y__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_3F_Z(x) (0x00001508+((x)*16))
+#define NV34TCL_VTX_ATTR_3F_Z__SIZE 0x00000010
#define NV34TCL_VP_CLIP_PLANE_A(x) (0x00001600+((x)*16))
#define NV34TCL_VP_CLIP_PLANE_A__SIZE 0x00000006
#define NV34TCL_VP_CLIP_PLANE_B(x) (0x00001604+((x)*16))
#define NV34TCL_VP_CLIP_PLANE_C__SIZE 0x00000006
#define NV34TCL_VP_CLIP_PLANE_D(x) (0x0000160c+((x)*16))
#define NV34TCL_VP_CLIP_PLANE_D__SIZE 0x00000006
-#define NV34TCL_VERTEX_BUFFER_ADDRESS(x) (0x00001680+((x)*4))
-#define NV34TCL_VERTEX_BUFFER_ADDRESS__SIZE 0x00000010
-#define NV34TCL_VERTEX_BUFFER_ADDRESS_DMA1 (1 << 31)
-#define NV34TCL_VERTEX_BUFFER_ADDRESS_OFFSET_SHIFT 0
-#define NV34TCL_VERTEX_BUFFER_ADDRESS_OFFSET_MASK 0x0fffffff
-#define NV34TCL_VERTEX_ARRAY_FORMAT(x) (0x00001740+((x)*4))
-#define NV34TCL_VERTEX_ARRAY_FORMAT__SIZE 0x00000010
-#define NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_SHIFT 0
-#define NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_MASK 0x0000000f
-#define NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_FLOAT 0x00000002
-#define NV34TCL_VERTEX_ARRAY_FORMAT_TYPE_UBYTE 0x00000004
-#define NV34TCL_VERTEX_ARRAY_FORMAT_SIZE_SHIFT 4
-#define NV34TCL_VERTEX_ARRAY_FORMAT_SIZE_MASK 0x000000f0
-#define NV34TCL_VERTEX_ARRAY_FORMAT_STRIDE_SHIFT 8
-#define NV34TCL_VERTEX_ARRAY_FORMAT_STRIDE_MASK 0x0000ff00
+#define NV34TCL_VTXBUF_ADDRESS(x) (0x00001680+((x)*4))
+#define NV34TCL_VTXBUF_ADDRESS__SIZE 0x00000010
+#define NV34TCL_VTXBUF_ADDRESS_DMA1 (1 << 31)
+#define NV34TCL_VTXBUF_ADDRESS_OFFSET_SHIFT 0
+#define NV34TCL_VTXBUF_ADDRESS_OFFSET_MASK 0x0fffffff
+#define NV34TCL_VTXFMT(x) (0x00001740+((x)*4))
+#define NV34TCL_VTXFMT__SIZE 0x00000010
+#define NV34TCL_VTXFMT_TYPE_SHIFT 0
+#define NV34TCL_VTXFMT_TYPE_MASK 0x0000000f
+#define NV34TCL_VTXFMT_TYPE_FLOAT 0x00000002
+#define NV34TCL_VTXFMT_TYPE_UBYTE 0x00000004
+#define NV34TCL_VTXFMT_TYPE_USHORT 0x00000005
+#define NV34TCL_VTXFMT_SIZE_SHIFT 4
+#define NV34TCL_VTXFMT_SIZE_MASK 0x000000f0
+#define NV34TCL_VTXFMT_STRIDE_SHIFT 8
+#define NV34TCL_VTXFMT_STRIDE_MASK 0x0000ff00
#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_R 0x000017a0
#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_G 0x000017a4
#define NV34TCL_LIGHT_MODEL_BACK_SIDE_PRODUCT_AMBIENT_PLUS_EMISSION_B 0x000017a8
#define NV34TCL_VB_VERTEX_BATCH_COUNT_SHIFT 24
#define NV34TCL_VB_VERTEX_BATCH_COUNT_MASK 0xff000000
#define NV34TCL_VERTEX_DATA 0x00001818
+#define NV34TCL_IDXBUF_ADDRESS 0x0000181c
+#define NV34TCL_IDXBUF_FORMAT 0x00001820
+#define NV34TCL_IDXBUF_FORMAT_TYPE_SHIFT 4
+#define NV34TCL_IDXBUF_FORMAT_TYPE_MASK 0x000000f0
+#define NV34TCL_IDXBUF_FORMAT_TYPE_U32 0x00000000
+#define NV34TCL_IDXBUF_FORMAT_TYPE_U16 0x00000010
+#define NV34TCL_IDXBUF_FORMAT_DMA1 (1 << 0)
+#define NV34TCL_VB_INDEX_BATCH 0x00001824
+#define NV34TCL_VB_INDEX_BATCH_COUNT_SHIFT 24
+#define NV34TCL_VB_INDEX_BATCH_COUNT_MASK 0xff000000
+#define NV34TCL_VB_INDEX_BATCH_START_SHIFT 0
+#define NV34TCL_VB_INDEX_BATCH_START_MASK 0x00ffffff
#define NV34TCL_POLYGON_MODE_FRONT 0x00001828
#define NV34TCL_POLYGON_MODE_FRONT_POINT 0x00001b00
#define NV34TCL_POLYGON_MODE_FRONT_LINE 0x00001b01
#define NV34TCL_FRONT_FACE_CCW 0x00000901
#define NV34TCL_POLYGON_SMOOTH_ENABLE 0x00001838
#define NV34TCL_CULL_FACE_ENABLE 0x0000183c
-#define NV34TCL_VERTEX_ATTR_2F_X(x) (0x00001880+((x)*8))
-#define NV34TCL_VERTEX_ATTR_2F_X__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_2F_Y(x) (0x00001884+((x)*8))
-#define NV34TCL_VERTEX_ATTR_2F_Y__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_2I(x) (0x00001900+((x)*4))
-#define NV34TCL_VERTEX_ATTR_2I__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_2I_Y_SHIFT 16
-#define NV34TCL_VERTEX_ATTR_2I_Y_MASK 0xffff0000
-#define NV34TCL_VERTEX_ATTR_2I_X_SHIFT 0
-#define NV34TCL_VERTEX_ATTR_2I_X_MASK 0x0000ffff
-#define NV34TCL_VERTEX_COL_4I(x) (0x0000194c+((x)*4))
-#define NV34TCL_VERTEX_COL_4I__SIZE 0x00000002
-#define NV34TCL_VERTEX_COL_4I_R_SHIFT 0
-#define NV34TCL_VERTEX_COL_4I_R_MASK 0x000000ff
-#define NV34TCL_VERTEX_COL_4I_G_SHIFT 8
-#define NV34TCL_VERTEX_COL_4I_G_MASK 0x0000ff00
-#define NV34TCL_VERTEX_COL_4I_B_SHIFT 16
-#define NV34TCL_VERTEX_COL_4I_B_MASK 0x00ff0000
-#define NV34TCL_VERTEX_COL_4I_A_SHIFT 24
-#define NV34TCL_VERTEX_COL_4I_A_MASK 0xff000000
-#define NV34TCL_VERTEX_POS_4I_XY 0x00001980
-#define NV34TCL_VERTEX_POS_4I_XY_X_SHIFT 0
-#define NV34TCL_VERTEX_POS_4I_XY_X_MASK 0x0000ffff
-#define NV34TCL_VERTEX_POS_4I_XY_Y_SHIFT 16
-#define NV34TCL_VERTEX_POS_4I_XY_Y_MASK 0xffff0000
-#define NV34TCL_VERTEX_POS_4I_ZW 0x00001984
-#define NV34TCL_VERTEX_POS_4I_ZW_Z_SHIFT 0
-#define NV34TCL_VERTEX_POS_4I_ZW_Z_MASK 0x0000ffff
-#define NV34TCL_VERTEX_POS_4I_ZW_W_SHIFT 16
-#define NV34TCL_VERTEX_POS_4I_ZW_W_MASK 0xffff0000
-#define NV34TCL_VERTEX_TX_4I_ST(x) (0x000019c0+((x)*8))
-#define NV34TCL_VERTEX_TX_4I_ST__SIZE 0x00000004
-#define NV34TCL_VERTEX_TX_4I_ST_S_SHIFT 0
-#define NV34TCL_VERTEX_TX_4I_ST_S_MASK 0x0000ffff
-#define NV34TCL_VERTEX_TX_4I_ST_T_SHIFT 16
-#define NV34TCL_VERTEX_TX_4I_ST_T_MASK 0xffff0000
-#define NV34TCL_VERTEX_TX_4I_RQ(x) (0x000019c4+((x)*8))
-#define NV34TCL_VERTEX_TX_4I_RQ__SIZE 0x00000004
-#define NV34TCL_VERTEX_TX_4I_RQ_R_SHIFT 0
-#define NV34TCL_VERTEX_TX_4I_RQ_R_MASK 0x0000ffff
-#define NV34TCL_VERTEX_TX_4I_RQ_Q_SHIFT 16
-#define NV34TCL_VERTEX_TX_4I_RQ_Q_MASK 0xffff0000
+#define NV34TCL_TX_PALETTE_OFFSET(x) (0x00001840+((x)*4))
+#define NV34TCL_TX_PALETTE_OFFSET__SIZE 0x00000004
+#define NV34TCL_VTX_ATTR_2F_X(x) (0x00001880+((x)*8))
+#define NV34TCL_VTX_ATTR_2F_X__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_2F_Y(x) (0x00001884+((x)*8))
+#define NV34TCL_VTX_ATTR_2F_Y__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4))
+#define NV34TCL_VTX_ATTR_2I__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_2I_X_SHIFT 0
+#define NV34TCL_VTX_ATTR_2I_X_MASK 0x0000ffff
+#define NV34TCL_VTX_ATTR_2I_Y_SHIFT 16
+#define NV34TCL_VTX_ATTR_2I_Y_MASK 0xffff0000
+#define NV34TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4))
+#define NV34TCL_VTX_ATTR_4UB__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_4UB_X_SHIFT 0
+#define NV34TCL_VTX_ATTR_4UB_X_MASK 0x000000ff
+#define NV34TCL_VTX_ATTR_4UB_Y_SHIFT 8
+#define NV34TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00
+#define NV34TCL_VTX_ATTR_4UB_Z_SHIFT 16
+#define NV34TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000
+#define NV34TCL_VTX_ATTR_4UB_W_SHIFT 24
+#define NV34TCL_VTX_ATTR_4UB_W_MASK 0xff000000
+#define NV34TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8))
+#define NV34TCL_VTX_ATTR_4I_XY__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_4I_XY_X_SHIFT 0
+#define NV34TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff
+#define NV34TCL_VTX_ATTR_4I_XY_Y_SHIFT 16
+#define NV34TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000
+#define NV34TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8))
+#define NV34TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0
+#define NV34TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff
+#define NV34TCL_VTX_ATTR_4I_ZW_W_SHIFT 16
+#define NV34TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000
#define NV34TCL_TX_OFFSET(x) (0x00001a00+((x)*32))
#define NV34TCL_TX_OFFSET__SIZE 0x00000004
#define NV34TCL_TX_FORMAT(x) (0x00001a04+((x)*32))
#define NV34TCL_TX_FORMAT__SIZE 0x00000004
#define NV34TCL_TX_FORMAT_DMA0 (1 << 0)
#define NV34TCL_TX_FORMAT_DMA1 (1 << 1)
-#define NV34TCL_TX_FORMAT_CUBE_MAP (1 << 2)
+#define NV34TCL_TX_FORMAT_CUBIC (1 << 2)
+#define NV34TCL_TX_FORMAT_NO_BORDER (1 << 3)
#define NV34TCL_TX_FORMAT_DIMS_SHIFT 4
#define NV34TCL_TX_FORMAT_DIMS_MASK 0x000000f0
#define NV34TCL_TX_FORMAT_DIMS_1D 0x00000010
#define NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5 0x00000200
#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT 0x00000300
#define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4 0x00000400
+#define NV34TCL_TX_FORMAT_FORMAT_R5G6B5 0x00000500
#define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8 0x00000600
#define NV34TCL_TX_FORMAT_FORMAT_X8R8G8B8 0x00000700
#define NV34TCL_TX_FORMAT_FORMAT_INDEX8 0x00000b00
#define NV34TCL_TX_FORMAT_FORMAT_DXT3 0x00000e00
#define NV34TCL_TX_FORMAT_FORMAT_DXT5 0x00000f00
#define NV34TCL_TX_FORMAT_FORMAT_A1R5G5B5_RECT 0x00001000
+#define NV34TCL_TX_FORMAT_FORMAT_R5G6B5_RECT 0x00001100
#define NV34TCL_TX_FORMAT_FORMAT_A8R8G8B8_RECT 0x00001200
#define NV34TCL_TX_FORMAT_FORMAT_L8_RECT 0x00001300
#define NV34TCL_TX_FORMAT_FORMAT_A8L8 0x00001a00
#define NV34TCL_TX_FORMAT_FORMAT_A8_RECT2 0x00001b00
-#define NV34TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00001e00
#define NV34TCL_TX_FORMAT_FORMAT_A4R4G4B4_RECT 0x00001d00
+#define NV34TCL_TX_FORMAT_FORMAT_R8G8B8_RECT 0x00001e00
#define NV34TCL_TX_FORMAT_FORMAT_L8A8_RECT 0x00002000
#define NV34TCL_TX_FORMAT_FORMAT_A16 0x00003200
+#define NV34TCL_TX_FORMAT_FORMAT_HILO16 0x00003300
#define NV34TCL_TX_FORMAT_FORMAT_A16_RECT 0x00003500
+#define NV34TCL_TX_FORMAT_FORMAT_HILO16_RECT 0x00003600
+#define NV34TCL_TX_FORMAT_FORMAT_HILO8 0x00004400
+#define NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8 0x00004500
+#define NV34TCL_TX_FORMAT_FORMAT_HILO8_RECT 0x00004600
+#define NV34TCL_TX_FORMAT_FORMAT_SIGNED_HILO8_RECT 0x00004700
#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA16_NV 0x00004a00
#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_RGBA32_NV 0x00004b00
#define NV34TCL_TX_FORMAT_FORMAT_FLOAT_R32_NV 0x00004c00
-#define NV34TCL_TX_FORMAT_NPOT (1 << 12)
-#define NV34TCL_TX_FORMAT_RECT (1 << 14)
-#define NV34TCL_TX_FORMAT_MIPMAP_LEVELS_SHIFT 16
-#define NV34TCL_TX_FORMAT_MIPMAP_LEVELS_MASK 0x000f0000
+#define NV34TCL_TX_FORMAT_MIPMAP (1 << 19)
#define NV34TCL_TX_FORMAT_BASE_SIZE_U_SHIFT 20
#define NV34TCL_TX_FORMAT_BASE_SIZE_U_MASK 0x00f00000
#define NV34TCL_TX_FORMAT_BASE_SIZE_V_SHIFT 24
#define NV34TCL_TX_WRAP_S_CLAMP_TO_BORDER 0x00000004
#define NV34TCL_TX_WRAP_S_CLAMP 0x00000005
#define NV34TCL_TX_WRAP_T_SHIFT 8
-#define NV34TCL_TX_WRAP_T_MASK 0x0000ff00
+#define NV34TCL_TX_WRAP_T_MASK 0x00000f00
#define NV34TCL_TX_WRAP_T_REPEAT 0x00000100
#define NV34TCL_TX_WRAP_T_MIRRORED_REPEAT 0x00000200
#define NV34TCL_TX_WRAP_T_CLAMP_TO_EDGE 0x00000300
#define NV34TCL_TX_WRAP_T_CLAMP_TO_BORDER 0x00000400
#define NV34TCL_TX_WRAP_T_CLAMP 0x00000500
+#define NV34TCL_TX_WRAP_EXPAND_NORMAL_SHIFT 12
+#define NV34TCL_TX_WRAP_EXPAND_NORMAL_MASK 0x0000f000
#define NV34TCL_TX_WRAP_R_SHIFT 16
#define NV34TCL_TX_WRAP_R_MASK 0x00ff0000
#define NV34TCL_TX_WRAP_R_REPEAT 0x00010000
#define NV34TCL_TX_WRAP_R_CLAMP_TO_EDGE 0x00030000
#define NV34TCL_TX_WRAP_R_CLAMP_TO_BORDER 0x00040000
#define NV34TCL_TX_WRAP_R_CLAMP 0x00050000
+#define NV34TCL_TX_WRAP_RCOMP_SHIFT 28
+#define NV34TCL_TX_WRAP_RCOMP_MASK 0xf0000000
+#define NV34TCL_TX_WRAP_RCOMP_NEVER 0x00000000
+#define NV34TCL_TX_WRAP_RCOMP_GREATER 0x10000000
+#define NV34TCL_TX_WRAP_RCOMP_EQUAL 0x20000000
+#define NV34TCL_TX_WRAP_RCOMP_GEQUAL 0x30000000
+#define NV34TCL_TX_WRAP_RCOMP_LESS 0x40000000
+#define NV34TCL_TX_WRAP_RCOMP_NOTEQUAL 0x50000000
+#define NV34TCL_TX_WRAP_RCOMP_LEQUAL 0x60000000
+#define NV34TCL_TX_WRAP_RCOMP_ALWAYS 0x70000000
#define NV34TCL_TX_ENABLE(x) (0x00001a0c+((x)*32))
#define NV34TCL_TX_ENABLE__SIZE 0x00000004
+#define NV34TCL_TX_ENABLE_ANISO_SHIFT 4
+#define NV34TCL_TX_ENABLE_ANISO_MASK 0x00000030
+#define NV34TCL_TX_ENABLE_ANISO_NONE 0x00000000
+#define NV34TCL_TX_ENABLE_ANISO_2X 0x00000010
+#define NV34TCL_TX_ENABLE_ANISO_4X 0x00000020
+#define NV34TCL_TX_ENABLE_ANISO_8X 0x00000030
+#define NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT 14
+#define NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_MASK 0x0003c000
+#define NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT 26
+#define NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_MASK 0x3c000000
#define NV34TCL_TX_ENABLE_ENABLE (1 << 30)
#define NV34TCL_TX_SWIZZLE(x) (0x00001a10+((x)*32))
#define NV34TCL_TX_SWIZZLE__SIZE 0x00000004
#define NV34TCL_TX_SWIZZLE_RECT_PITCH_MASK 0xffff0000
#define NV34TCL_TX_FILTER(x) (0x00001a14+((x)*32))
#define NV34TCL_TX_FILTER__SIZE 0x00000004
+#define NV34TCL_TX_FILTER_LOD_BIAS_SHIFT 8
+#define NV34TCL_TX_FILTER_LOD_BIAS_MASK 0x00000f00
#define NV34TCL_TX_FILTER_MINIFY_SHIFT 16
#define NV34TCL_TX_FILTER_MINIFY_MASK 0x000f0000
#define NV34TCL_TX_FILTER_MINIFY_NEAREST 0x00010000
#define NV34TCL_TX_BORDER_COLOR_R_MASK 0x00ff0000
#define NV34TCL_TX_BORDER_COLOR_A_SHIFT 24
#define NV34TCL_TX_BORDER_COLOR_A_MASK 0xff000000
-#define NV34TCL_VERTEX_ATTR_4F_X(x) (0x00001c00+((x)*16))
-#define NV34TCL_VERTEX_ATTR_4F_X__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_4F_Y(x) (0x00001c04+((x)*16))
-#define NV34TCL_VERTEX_ATTR_4F_Y__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_4F_Z(x) (0x00001c08+((x)*16))
-#define NV34TCL_VERTEX_ATTR_4F_Z__SIZE 0x00000010
-#define NV34TCL_VERTEX_ATTR_4F_W(x) (0x00001c0c+((x)*16))
-#define NV34TCL_VERTEX_ATTR_4F_W__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_4F_X(x) (0x00001c00+((x)*16))
+#define NV34TCL_VTX_ATTR_4F_X__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_4F_Y(x) (0x00001c04+((x)*16))
+#define NV34TCL_VTX_ATTR_4F_Y__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_4F_Z(x) (0x00001c08+((x)*16))
+#define NV34TCL_VTX_ATTR_4F_Z__SIZE 0x00000010
+#define NV34TCL_VTX_ATTR_4F_W(x) (0x00001c0c+((x)*16))
+#define NV34TCL_VTX_ATTR_4F_W__SIZE 0x00000010
#define NV34TCL_FP_CONTROL 0x00001d60
#define NV34TCL_FP_CONTROL_USES_KIL (1 << 7)
#define NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_SHIFT 0
#define NV34TCL_FP_CONTROL_USED_REGS_MINUS1_DIV2_MASK 0x0000000f
#define NV34TCL_MULTISAMPLE_CONTROL 0x00001d7c
+#define NV34TCL_MULTISAMPLE_CONTROL_ENABLE (1 << 0)
+#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_COVERAGE (1 << 4)
+#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_ALPHA_TO_ONE (1 << 8)
+#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_SHIFT 16
+#define NV34TCL_MULTISAMPLE_CONTROL_SAMPLE_COVERAGE_MASK 0xffff0000
#define NV34TCL_CLEAR_DEPTH_VALUE 0x00001d8c
#define NV34TCL_CLEAR_COLOR_VALUE 0x00001d90
#define NV34TCL_CLEAR_COLOR_VALUE_B_SHIFT 0
#define NV34TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000
#define NV34TCL_BACK_MATERIAL_SHININESS(x) (0x00001e20+((x)*4))
#define NV34TCL_BACK_MATERIAL_SHININESS__SIZE 0x00000006
-#define NV34TCL_VERTEX_FOG_1F 0x00001e54
+#define NV34TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4))
+#define NV34TCL_VTX_ATTR_1F__SIZE 0x00000010
#define NV34TCL_VP_UPLOAD_FROM_ID 0x00001e9c
#define NV34TCL_VP_START_FROM_ID 0x00001ea0
#define NV34TCL_POINT_PARAMETERS(x) (0x00001ec0+((x)*4))
#define NV34TCL_VP_UPLOAD_CONST_W__SIZE 0x00000004
#define NV34TCL_UNK1f80(x) (0x00001f80+((x)*4))
#define NV34TCL_UNK1f80__SIZE 0x00000010
-#define NV34TCL_VP_ATTRIB_EN 0x00001ff0
-#define NV34TCL_VP_RESULT_EN 0x00001ff4
#define NV40_CONTEXT_SURFACES_2D 0x00003062
#define NV40TCL_DEPTH_TEST_ENABLE 0x00000a74
#define NV40TCL_POLYGON_OFFSET_FACTOR 0x00000a78
#define NV40TCL_POLYGON_OFFSET_UNITS 0x00000a7c
+#define NV40TCL_VTX_ATTR_3I_XY(x) (0x00000a80+((x)*8))
+#define NV40TCL_VTX_ATTR_3I_XY__SIZE 0x00000010
+#define NV40TCL_VTX_ATTR_3I_XY_X_SHIFT 0
+#define NV40TCL_VTX_ATTR_3I_XY_X_MASK 0x0000ffff
+#define NV40TCL_VTX_ATTR_3I_XY_Y_SHIFT 16
+#define NV40TCL_VTX_ATTR_3I_XY_Y_MASK 0xffff0000
+#define NV40TCL_VTX_ATTR_3I_Z(x) (0x00000a84+((x)*8))
+#define NV40TCL_VTX_ATTR_3I_Z__SIZE 0x00000010
+#define NV40TCL_VTX_ATTR_3I_Z_Z_SHIFT 0
+#define NV40TCL_VTX_ATTR_3I_Z_Z_MASK 0x0000ffff
#define NV40TCL_UNK0B40(x) (0x00000b40+((x)*4))
#define NV40TCL_UNK0B40__SIZE 0x00000008
#define NV40TCL_VP_UPLOAD_INST(x) (0x00000b80+((x)*4))
#define NV40TCL_VP_UPLOAD_INST__SIZE 0x00000004
#define NV40TCL_CLIP_PLANE_ENABLE 0x00001478
-#define NV40TCL_CLIP_PLANE_ENABLE_PLANE0 (1 << 2)
-#define NV40TCL_CLIP_PLANE_ENABLE_PLANE1 (1 << 6)
-#define NV40TCL_CLIP_PLANE_ENABLE_PLANE2 (1 << 10)
-#define NV40TCL_CLIP_PLANE_ENABLE_PLANE3 (1 << 14)
-#define NV40TCL_CLIP_PLANE_ENABLE_PLANE4 (1 << 18)
-#define NV40TCL_CLIP_PLANE_ENABLE_PLANE5 (1 << 22)
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE0 (1 << 1)
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE1 (1 << 5)
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE2 (1 << 9)
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE3 (1 << 13)
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE4 (1 << 17)
+#define NV40TCL_CLIP_PLANE_ENABLE_PLANE5 (1 << 21)
#define NV40TCL_POLYGON_STIPPLE_ENABLE 0x0000147c
#define NV40TCL_POLYGON_STIPPLE_PATTERN(x) (0x00001480+((x)*4))
#define NV40TCL_POLYGON_STIPPLE_PATTERN__SIZE 0x00000020
#define NV40TCL_VTXFMT_TYPE_MASK 0x0000000f
#define NV40TCL_VTXFMT_TYPE_FLOAT 0x00000002
#define NV40TCL_VTXFMT_TYPE_UBYTE 0x00000004
+#define NV40TCL_VTXFMT_TYPE_USHORT 0x00000005
#define NV40TCL_VTXFMT_SIZE_SHIFT 4
#define NV40TCL_VTXFMT_SIZE_MASK 0x000000f0
#define NV40TCL_VTXFMT_STRIDE_SHIFT 8
#define NV40TCL_VTX_ATTR_2F_Y__SIZE 0x00000010
#define NV40TCL_VTX_ATTR_2I(x) (0x00001900+((x)*4))
#define NV40TCL_VTX_ATTR_2I__SIZE 0x00000010
-#define NV40TCL_VTX_ATTR_2I_Y_SHIFT 16
-#define NV40TCL_VTX_ATTR_2I_Y_MASK 0xffff0000
#define NV40TCL_VTX_ATTR_2I_X_SHIFT 0
#define NV40TCL_VTX_ATTR_2I_X_MASK 0x0000ffff
-#define NV40TCL_VTX_ATTR_4I_0(x) (0x00001900+((x)*8))
-#define NV40TCL_VTX_ATTR_4I_0__SIZE 0x00000010
-#define NV40TCL_VTX_ATTR_4I_0_Y_SHIFT 16
-#define NV40TCL_VTX_ATTR_4I_0_Y_MASK 0xffff0000
-#define NV40TCL_VTX_ATTR_4I_0_X_SHIFT 0
-#define NV40TCL_VTX_ATTR_4I_0_X_MASK 0x0000ffff
-#define NV40TCL_VTX_ATTR_4I_1(x) (0x00001904+((x)*8))
-#define NV40TCL_VTX_ATTR_4I_1__SIZE 0x00000010
-#define NV40TCL_VTX_ATTR_4I_1_W_SHIFT 16
-#define NV40TCL_VTX_ATTR_4I_1_W_MASK 0xffff0000
-#define NV40TCL_VTX_ATTR_4I_1_Z_SHIFT 0
-#define NV40TCL_VTX_ATTR_4I_1_Z_MASK 0x0000ffff
+#define NV40TCL_VTX_ATTR_2I_Y_SHIFT 16
+#define NV40TCL_VTX_ATTR_2I_Y_MASK 0xffff0000
+#define NV40TCL_VTX_ATTR_4UB(x) (0x00001940+((x)*4))
+#define NV40TCL_VTX_ATTR_4UB__SIZE 0x00000010
+#define NV40TCL_VTX_ATTR_4UB_X_SHIFT 0
+#define NV40TCL_VTX_ATTR_4UB_X_MASK 0x000000ff
+#define NV40TCL_VTX_ATTR_4UB_Y_SHIFT 8
+#define NV40TCL_VTX_ATTR_4UB_Y_MASK 0x0000ff00
+#define NV40TCL_VTX_ATTR_4UB_Z_SHIFT 16
+#define NV40TCL_VTX_ATTR_4UB_Z_MASK 0x00ff0000
+#define NV40TCL_VTX_ATTR_4UB_W_SHIFT 24
+#define NV40TCL_VTX_ATTR_4UB_W_MASK 0xff000000
+#define NV40TCL_VTX_ATTR_4I_XY(x) (0x00001980+((x)*8))
+#define NV40TCL_VTX_ATTR_4I_XY__SIZE 0x00000010
+#define NV40TCL_VTX_ATTR_4I_XY_X_SHIFT 0
+#define NV40TCL_VTX_ATTR_4I_XY_X_MASK 0x0000ffff
+#define NV40TCL_VTX_ATTR_4I_XY_Y_SHIFT 16
+#define NV40TCL_VTX_ATTR_4I_XY_Y_MASK 0xffff0000
+#define NV40TCL_VTX_ATTR_4I_ZW(x) (0x00001984+((x)*8))
+#define NV40TCL_VTX_ATTR_4I_ZW__SIZE 0x00000010
+#define NV40TCL_VTX_ATTR_4I_ZW_Z_SHIFT 0
+#define NV40TCL_VTX_ATTR_4I_ZW_Z_MASK 0x0000ffff
+#define NV40TCL_VTX_ATTR_4I_ZW_W_SHIFT 16
+#define NV40TCL_VTX_ATTR_4I_ZW_W_MASK 0xffff0000
#define NV40TCL_TEX_OFFSET(x) (0x00001a00+((x)*32))
#define NV40TCL_TEX_OFFSET__SIZE 0x00000010
#define NV40TCL_TEX_FORMAT(x) (0x00001a04+((x)*32))
#define NV40TCL_TEX_FORMAT_FORMAT_A8L8 0x00000b00
#define NV40TCL_TEX_FORMAT_FORMAT_Z24 0x00001000
#define NV40TCL_TEX_FORMAT_FORMAT_Z16 0x00001200
+#define NV40TCL_TEX_FORMAT_FORMAT_A16 0x00001400
#define NV40TCL_TEX_FORMAT_FORMAT_HILO8 0x00001800
#define NV40TCL_TEX_FORMAT_FORMAT_RGBA16F 0x00001a00
#define NV40TCL_TEX_FORMAT_FORMAT_RGBA32F 0x00001b00
#define NV40TCL_LINE_STIPPLE_PATTERN_FACTOR_MASK 0x0000ffff
#define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_SHIFT 16
#define NV40TCL_LINE_STIPPLE_PATTERN_PATTERN_MASK 0xffff0000
+#define NV40TCL_VTX_ATTR_1F(x) (0x00001e40+((x)*4))
+#define NV40TCL_VTX_ATTR_1F__SIZE 0x00000010
#define NV40TCL_VP_UPLOAD_FROM_ID 0x00001e9c
#define NV40TCL_VP_START_FROM_ID 0x00001ea0
#define NV40TCL_POINT_SIZE 0x00001ee0
#define NV50TCL_NOP 0x00000100
#define NV50TCL_NOTIFY 0x00000104
#define NV50TCL_DMA_NOTIFY 0x00000180
-#define NV50TCL_DMA_IN_MEMORY0(x) (0x00000184+((x)*4))
-#define NV50TCL_DMA_IN_MEMORY0__SIZE 0x0000000b
-#define NV50TCL_DMA_IN_MEMORY1(x) (0x000001c0+((x)*4))
-#define NV50TCL_DMA_IN_MEMORY1__SIZE 0x00000008
+#define NV50TCL_DMA_UNK0(x) (0x00000184+((x)*4))
+#define NV50TCL_DMA_UNK0__SIZE 0x0000000b
+#define NV50TCL_DMA_UNK1(x) (0x000001c0+((x)*4))
+#define NV50TCL_DMA_UNK1__SIZE 0x00000008
#define NV50TCL_RT_ADDRESS_HIGH(x) (0x00000200+((x)*32))
#define NV50TCL_RT_ADDRESS_HIGH__SIZE 0x00000008
#define NV50TCL_RT_ADDRESS_LOW(x) (0x00000204+((x)*32))
#define NV50TCL_RT_ADDRESS_LOW__SIZE 0x00000008
#define NV50TCL_RT_FORMAT(x) (0x00000208+((x)*32))
#define NV50TCL_RT_FORMAT__SIZE 0x00000008
-#define NV50TCL_RT_UNK3(x) (0x0000020c+((x)*32))
-#define NV50TCL_RT_UNK3__SIZE 0x00000008
+#define NV50TCL_RT_FORMAT_32BPP 0x000000cf
+#define NV50TCL_RT_FORMAT_24BPP 0x000000e6
+#define NV50TCL_RT_FORMAT_16BPP 0x000000e8
+#define NV50TCL_RT_FORMAT_8BPP 0x000000f3
+#define NV50TCL_RT_FORMAT_15BPP 0x000000f8
+#define NV50TCL_RT_TILE_UNK(x) (0x0000020c+((x)*32))
+#define NV50TCL_RT_TILE_UNK__SIZE 0x00000008
#define NV50TCL_RT_UNK4(x) (0x00000210+((x)*32))
#define NV50TCL_RT_UNK4__SIZE 0x00000008
#define NV50TCL_VTX_ATTR_1F(x) (0x00000300+((x)*4))
#define NV50TCL_SCISSOR_VERT_T_MASK 0x0000ffff
#define NV50TCL_SCISSOR_VERT_B_SHIFT 16
#define NV50TCL_SCISSOR_VERT_B_MASK 0xffff0000
-#define NV50TCL_VP_UPLOAD_CONST_ID 0x00000f00
-#define NV50TCL_VP_UPLOAD_CONST(x) (0x00000f04+((x)*4))
-#define NV50TCL_VP_UPLOAD_CONST__SIZE 0x00000010
+#define NV50TCL_CB_ADDR 0x00000f00
+#define NV50TCL_CB_ADDR_ID_SHIFT 8
+#define NV50TCL_CB_ADDR_ID_MASK 0xffffff00
+#define NV50TCL_CB_ADDR_BUFFER_SHIFT 0
+#define NV50TCL_CB_ADDR_BUFFER_MASK 0x000000ff
+#define NV50TCL_CB_DATA(x) (0x00000f04+((x)*4))
+#define NV50TCL_CB_DATA__SIZE 0x00000010
#define NV50TCL_STENCIL_FRONT_FUNC_REF 0x00000f54
#define NV50TCL_STENCIL_FRONT_MASK 0x00000f58
#define NV50TCL_STENCIL_FRONT_FUNC_MASK 0x00000f5c
#define NV50TCL_RT_HORIZ__SIZE 0x00000008
#define NV50TCL_RT_VERT(x) (0x00001244+((x)*8))
#define NV50TCL_RT_VERT__SIZE 0x00000008
+#define NV50TCL_CB_DEF_ADDRESS_HIGH 0x00001280
+#define NV50TCL_CB_DEF_ADDRESS_LOW 0x00001284
+#define NV50TCL_CB_DEF_SET 0x00001288
+#define NV50TCL_CB_DEF_SET_SIZE_SHIFT 0
+#define NV50TCL_CB_DEF_SET_SIZE_MASK 0x0000ffff
+#define NV50TCL_CB_DEF_SET_BUFFER_SHIFT 16
+#define NV50TCL_CB_DEF_SET_BUFFER_MASK 0xffff0000
#define NV50TCL_DEPTH_TEST_ENABLE 0x000012cc
#define NV50TCL_SHADE_MODEL 0x000012d4
#define NV50TCL_SHADE_MODEL_FLAT 0x00001d00
#define NV50TCL_GP_START_ID 0x00001410
#define NV50TCL_FP_START_ID 0x00001414
#define NV50TCL_POINT_SIZE 0x00001518
-#define NV50TCL_TEX_CB0_ADDRESS_HIGH 0x0000155c
-#define NV50TCL_TEX_CB0_ADDRESS_LOW 0x00001560
+#define NV50TCL_TSC_ADDRESS_HIGH 0x0000155c
+#define NV50TCL_TSC_ADDRESS_LOW 0x00001560
#define NV50TCL_POLYGON_OFFSET_FACTOR 0x0000156c
#define NV50TCL_LINE_SMOOTH_ENABLE 0x00001570
-#define NV50TCL_TEX_CB1_ADDRESS_HIGH 0x00001574
-#define NV50TCL_TEX_CB1_ADDRESS_LOW 0x00001578
+#define NV50TCL_TIC_ADDRESS_HIGH 0x00001574
+#define NV50TCL_TIC_ADDRESS_LOW 0x00001578
#define NV50TCL_STENCIL_FRONT_ENABLE 0x00001594
#define NV50TCL_STENCIL_FRONT_OP_FAIL 0x00001598
#define NV50TCL_STENCIL_FRONT_OP_FAIL_ZERO 0x00000000
projects / mesa.git / blobdiff