freedreno/a3xx: only emit dirty consts

[mesa.git] / src / gallium / drivers / nouveau / nouveau_screen.h

diff --git a/src/gallium/drivers/nouveau/nouveau_screen.h b/src/gallium/drivers/nouveau/nouveau_screen.h
index 4ca286bfe8da60ba145d4ff83f3200dcee1a5999..cf06f7e88aa0b848355d79b820b77b648c62a52c 100644 (file)
--- a/src/gallium/drivers/nouveau/nouveau_screen.h
+++ b/src/gallium/drivers/nouveau/nouveau_screen.h
@@ -4,7 +4,12 @@
 #include "pipe/p_screen.h"
 #include "util/u_memory.h"
 
+#ifdef DEBUG
+# define NOUVEAU_ENABLE_DRIVER_STATISTICS
+#endif
+
 typedef uint32_t u32;
+typedef uint16_t u16;
 
 extern int nouveau_mesa_debug;
 
@@ -17,7 +22,15 @@ struct nouveau_screen {
        struct nouveau_client *client;
        struct nouveau_pushbuf *pushbuf;
 
-       unsigned sysmem_bindings;
+       int refcount;
+
+       unsigned vidmem_bindings; /* PIPE_BIND_* where VRAM placement is desired */
+       unsigned sysmem_bindings; /* PIPE_BIND_* where GART placement is desired */
+       unsigned lowmem_bindings; /* PIPE_BIND_* that require an address < 4 GiB */
+       /*
+        * For bindings with (vidmem & sysmem) bits set, PIPE_USAGE_* decides
+        * placement.
+        */
 
        uint16_t class_3d;
 
@@ -33,14 +46,76 @@ struct nouveau_screen {
 
        struct nouveau_mman *mm_VRAM;
        struct nouveau_mman *mm_GART;
+
+       int64_t cpu_gpu_time_delta;
+
+       boolean hint_buf_keep_sysmem_copy;
+
+       struct {
+               unsigned profiles_checked;
+               unsigned profiles_present;
+       } firmware_info;
+
+#ifdef NOUVEAU_ENABLE_DRIVER_STATISTICS
+   union {
+      uint64_t v[29];
+      struct {
+         uint64_t tex_obj_current_count;
+         uint64_t tex_obj_current_bytes;
+         uint64_t buf_obj_current_count;
+         uint64_t buf_obj_current_bytes_vid;
+         uint64_t buf_obj_current_bytes_sys;
+         uint64_t tex_transfers_rd;
+         uint64_t tex_transfers_wr;
+         uint64_t tex_copy_count;
+         uint64_t tex_blit_count;
+         uint64_t tex_cache_flush_count;
+         uint64_t buf_transfers_rd;
+         uint64_t buf_transfers_wr;
+         uint64_t buf_read_bytes_staging_vid;
+         uint64_t buf_write_bytes_direct;
+         uint64_t buf_write_bytes_staging_vid;
+         uint64_t buf_write_bytes_staging_sys;
+         uint64_t buf_copy_bytes;
+         uint64_t buf_non_kernel_fence_sync_count;
+         uint64_t any_non_kernel_fence_sync_count;
+         uint64_t query_sync_count;
+         uint64_t gpu_serialize_count;
+         uint64_t draw_calls_array;
+         uint64_t draw_calls_indexed;
+         uint64_t draw_calls_fallback_count;
+         uint64_t user_buffer_upload_bytes;
+         uint64_t constbuf_upload_count;
+         uint64_t constbuf_upload_bytes;
+         uint64_t pushbuf_count;
+         uint64_t resource_validate_count;
+      } named;
+   } stats;
+#endif
 };
 
+#ifdef NOUVEAU_ENABLE_DRIVER_STATISTICS
+# define NOUVEAU_DRV_STAT(s, n, v) do {         \
+      (s)->stats.named.n += (v);               \
+   } while(0)
+# define NOUVEAU_DRV_STAT_RES(r, n, v) do {                       \
+      nouveau_screen((r)->base.screen)->stats.named.n += (v);    \
+   } while(0)
+# define NOUVEAU_DRV_STAT_IFD(x) x
+#else
+# define NOUVEAU_DRV_STAT(s, n, v)     do { } while(0)
+# define NOUVEAU_DRV_STAT_RES(r, n, v) do { } while(0)
+# define NOUVEAU_DRV_STAT_IFD(x)
+#endif
+
 static INLINE struct nouveau_screen *
 nouveau_screen(struct pipe_screen *pscreen)
 {
        return (struct nouveau_screen *)pscreen;
 }
 
+boolean nouveau_drm_screen_unref(struct nouveau_screen *screen);
+
 boolean
 nouveau_screen_bo_get_handle(struct pipe_screen *pscreen,
                             struct nouveau_bo *bo,