*
*/
+#include <xf86drm.h>
+#include <nouveau_drm.h>
#include "util/u_format.h"
#include "util/u_format_s3tc.h"
{
struct nv30_screen *screen = nv30_screen(pscreen);
struct nouveau_object *eng3d = screen->eng3d;
+ struct nouveau_device *dev = nouveau_screen(pscreen)->device;
switch (param) {
/* non-boolean capabilities */
return 10;
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return 13;
- case PIPE_CAP_MAX_COMBINED_SAMPLERS:
- return 16;
case PIPE_CAP_GLSL_FEATURE_LEVEL:
return 120;
+ case PIPE_CAP_ENDIANNESS:
+ return PIPE_ENDIAN_LITTLE;
+ case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
+ return 16;
+ case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
+ return NOUVEAU_MIN_BUFFER_MAP_ALIGN;
+ case PIPE_CAP_MAX_VIEWPORTS:
+ return 1;
+ case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
+ return 2048;
/* supported capabilities */
case PIPE_CAP_TWO_SIDED_STENCIL:
case PIPE_CAP_ANISOTROPIC_FILTER:
case PIPE_CAP_POINT_SPRITE:
- case PIPE_CAP_SCALED_RESOLVE:
case PIPE_CAP_OCCLUSION_QUERY:
case PIPE_CAP_QUERY_TIME_ELAPSED:
case PIPE_CAP_QUERY_TIMESTAMP:
case PIPE_CAP_TGSI_TEXCOORD:
case PIPE_CAP_USER_CONSTANT_BUFFERS:
case PIPE_CAP_USER_INDEX_BUFFERS:
+ case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
+ case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
+ case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
+ case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
+ case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
return 1;
- case PIPE_CAP_USER_VERTEX_BUFFERS:
- return 0;
- case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
- return 16;
/* nv4x capabilities */
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
case PIPE_CAP_NPOT_TEXTURES:
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
case PIPE_CAP_MIN_TEXEL_OFFSET:
case PIPE_CAP_MAX_TEXEL_OFFSET:
+ case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
+ case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
+ case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
+ case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
+ case PIPE_CAP_MAX_VERTEX_STREAMS:
case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_SEAMLESS_CUBE_MAP:
case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
case PIPE_CAP_CUBE_MAP_ARRAY:
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
+ case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
+ case PIPE_CAP_VERTEX_COLOR_CLAMPED:
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
case PIPE_CAP_START_INSTANCE:
case PIPE_CAP_TEXTURE_MULTISAMPLE:
- case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
+ case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
+ case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
+ case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
+ case PIPE_CAP_TEXTURE_GATHER_SM5:
+ case PIPE_CAP_FAKE_SW_MSAA:
+ case PIPE_CAP_TEXTURE_QUERY_LOD:
+ case PIPE_CAP_SAMPLE_SHADING:
+ case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
+ case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
+ case PIPE_CAP_USER_VERTEX_BUFFERS:
+ case PIPE_CAP_COMPUTE:
+ case PIPE_CAP_DRAW_INDIRECT:
+ case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
+ case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
+ case PIPE_CAP_SAMPLER_VIEW_TARGET:
+ case PIPE_CAP_CLIP_HALFZ:
+ case PIPE_CAP_VERTEXID_NOBASE:
+ case PIPE_CAP_POLYGON_OFFSET_CLAMP:
+ case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
+ case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
+ case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
+ case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
return 0;
- case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
- case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
- case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
- case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
+
+ case PIPE_CAP_VENDOR_ID:
+ return 0x10de;
+ case PIPE_CAP_DEVICE_ID: {
+ uint64_t device_id;
+ if (nouveau_getparam(dev, NOUVEAU_GETPARAM_PCI_DEVICE, &device_id)) {
+ NOUVEAU_ERR("NOUVEAU_GETPARAM_PCI_DEVICE failed.\n");
+ return -1;
+ }
+ return device_id;
+ }
+ case PIPE_CAP_ACCELERATED:
return 1;
- case PIPE_CAP_ENDIANNESS:
- return PIPE_ENDIAN_LITTLE;
- default:
- debug_printf("unknown param %d\n", param);
+ case PIPE_CAP_VIDEO_MEMORY:
+ return dev->vram_size >> 20;
+ case PIPE_CAP_UMA:
return 0;
}
+
+ debug_printf("unknown param %d\n", param);
+ return 0;
}
static float
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
return 0;
case PIPE_SHADER_CAP_MAX_INPUTS:
+ case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 16;
- case PIPE_SHADER_CAP_MAX_CONSTS:
- return (eng3d->oclass >= NV40_3D_CLASS) ? (468 - 6): (256 - 6);
+ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
+ return ((eng3d->oclass >= NV40_3D_CLASS) ? (468 - 6): (256 - 6)) * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return (eng3d->oclass >= NV40_3D_CLASS) ? 32 : 13;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
+ case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 0;
- case PIPE_SHADER_CAP_MAX_ADDRS:
- return 2;
case PIPE_SHADER_CAP_MAX_PREDS:
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
case PIPE_SHADER_CAP_INTEGERS:
+ case PIPE_SHADER_CAP_DOUBLES:
+ case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 0;
default:
debug_printf("unknown vertex shader param %d\n", param);
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
return 0;
case PIPE_SHADER_CAP_MAX_INPUTS:
- return (eng3d->oclass >= NV40_3D_CLASS) ? 12 : 10;
- case PIPE_SHADER_CAP_MAX_CONSTS:
- return (eng3d->oclass >= NV40_3D_CLASS) ? 224 : 32;
+ return 8; /* should be possible to do 10 with nv4x */
+ case PIPE_SHADER_CAP_MAX_OUTPUTS:
+ return 4;
+ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
+ return ((eng3d->oclass >= NV40_3D_CLASS) ? 224 : 32) * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 32;
- case PIPE_SHADER_CAP_MAX_ADDRS:
- return (eng3d->oclass >= NV40_3D_CLASS) ? 1 : 0;
case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
+ case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
return 16;
case PIPE_SHADER_CAP_MAX_PREDS:
case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
case PIPE_SHADER_CAP_SUBROUTINES:
+ case PIPE_SHADER_CAP_DOUBLES:
+ case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
+ case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
return 0;
default:
debug_printf("unknown fragment shader param %d\n", param);
{
struct nv30_screen *screen = nv30_screen(pscreen);
- if (screen->base.fence.current &&
- screen->base.fence.current->state >= NOUVEAU_FENCE_STATE_EMITTED) {
- nouveau_fence_wait(screen->base.fence.current);
- nouveau_fence_ref (NULL, &screen->base.fence.current);
+ if (!nouveau_drm_screen_unref(&screen->base))
+ return;
+
+ if (screen->base.fence.current) {
+ struct nouveau_fence *current = NULL;
+
+ /* nouveau_fence_wait will create a new current fence, so wait on the
+ * _current_ one, and remove both.
+ */
+ nouveau_fence_ref(screen->base.fence.current, ¤t);
+ nouveau_fence_wait(current);
+ nouveau_fence_ref(NULL, ¤t);
+ nouveau_fence_ref(NULL, &screen->base.fence.current);
}
+ nouveau_bo_ref(NULL, &screen->notify);
+
+ nouveau_heap_destroy(&screen->query_heap);
+ nouveau_heap_destroy(&screen->vp_exec_heap);
+ nouveau_heap_destroy(&screen->vp_data_heap);
+
nouveau_object_del(&screen->query);
nouveau_object_del(&screen->fence);
nouveau_object_del(&screen->ntfy);
ret = nouveau_bo_wrap(screen->base.device, fifo->notify, &screen->notify);
if (ret == 0)
- nouveau_bo_map(screen->notify, 0, screen->base.client);
+ ret = nouveau_bo_map(screen->notify, 0, screen->base.client);
if (ret)
FAIL_SCREEN_INIT("error mapping notifier memory: %d\n", ret);
projects / mesa.git / blobdiff