gallium: add PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS

[mesa.git] / src / gallium / drivers / nouveau / nv30 / nvfx_fragprog.c

diff --git a/src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c b/src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c
index e68d23e5587fe83d2acb33d4d2ff72e171b7a414..86e3599325e65eb81de0909b9bafe8863c2da56a 100644 (file)
--- a/src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c
+++ b/src/gallium/drivers/nouveau/nv30/nvfx_fragprog.c
@@ -5,6 +5,7 @@
 #include "util/u_dynarray.h"
 #include "util/u_inlines.h"
 #include "util/u_debug.h"
+#include "util/u_memory.h"
 
 #include "pipe/p_shader_tokens.h"
 #include "tgsi/tgsi_parse.h"
@@ -51,7 +52,6 @@ temp(struct nvfx_fpc *fpc)
 
    if (idx >= fpc->max_temps) {
       NOUVEAU_ERR("out of temps!!\n");
-      assert(0);
       return nvfx_reg(NVFXSR_TEMP, 0);
    }
 
@@ -474,10 +474,10 @@ nvfx_fragprog_parse_instruction(struct nvfx_fpc *fpc,
       switch (fsrc->Register.File) {
       case TGSI_FILE_INPUT:
          if(fpc->fp->info.input_semantic_name[fsrc->Register.Index] == TGSI_SEMANTIC_FOG && (0
-               || fsrc->Register.SwizzleX == PIPE_SWIZZLE_ALPHA
-               || fsrc->Register.SwizzleY == PIPE_SWIZZLE_ALPHA
-               || fsrc->Register.SwizzleZ == PIPE_SWIZZLE_ALPHA
-               || fsrc->Register.SwizzleW == PIPE_SWIZZLE_ALPHA
+               || fsrc->Register.SwizzleX == PIPE_SWIZZLE_W
+               || fsrc->Register.SwizzleY == PIPE_SWIZZLE_W
+               || fsrc->Register.SwizzleZ == PIPE_SWIZZLE_W
+               || fsrc->Register.SwizzleW == PIPE_SWIZZLE_W
                )) {
             /* hardware puts 0 in fogcoord.w, but GL/Gallium want 1 there */
             struct nvfx_src addend = nvfx_src(nvfx_fp_imm(fpc, 0, 0, 0, 1));
@@ -534,9 +534,6 @@ nvfx_fragprog_parse_instruction(struct nvfx_fpc *fpc,
    sat  = finst->Instruction.Saturate;
 
    switch (finst->Instruction.Opcode) {
-   case TGSI_OPCODE_ABS:
-      nvfx_fp_emit(fpc, arith(sat, MOV, dst, mask, abs(src[0]), none, none));
-      break;
    case TGSI_OPCODE_ADD:
       nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, src[0], src[1], none));
       break;
@@ -594,11 +591,6 @@ nvfx_fragprog_parse_instruction(struct nvfx_fpc *fpc,
    case TGSI_OPCODE_DP4:
       nvfx_fp_emit(fpc, arith(sat, DP4, dst, mask, src[0], src[1], none));
       break;
-   case TGSI_OPCODE_DPH:
-      tmp = nvfx_src(temp(fpc));
-      nvfx_fp_emit(fpc, arith(0, DP3, tmp.reg, NVFX_FP_MASK_X, src[0], src[1], none));
-      nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, swz(tmp, X, X, X, X), swz(src[1], W, W, W, W), none));
-      break;
    case TGSI_OPCODE_DST:
       nvfx_fp_emit(fpc, arith(sat, DST, dst, mask, src[0], src[1], none));
       break;
@@ -697,23 +689,6 @@ nvfx_fragprog_parse_instruction(struct nvfx_fpc *fpc,
          nvfx_fp_emit(fpc, arith(sat, EX2, dst, mask, neg(swz(tmp, X, X, X, X)), none, none));
       }
       break;
-   case TGSI_OPCODE_SCS:
-      /* avoid overwriting the source */
-      if(src[0].swz[NVFX_SWZ_X] != NVFX_SWZ_X)
-      {
-         if (mask & NVFX_FP_MASK_X)
-            nvfx_fp_emit(fpc, arith(sat, COS, dst, NVFX_FP_MASK_X, swz(src[0], X, X, X, X), none, none));
-         if (mask & NVFX_FP_MASK_Y)
-            nvfx_fp_emit(fpc, arith(sat, SIN, dst, NVFX_FP_MASK_Y, swz(src[0], X, X, X, X), none, none));
-      }
-      else
-      {
-         if (mask & NVFX_FP_MASK_Y)
-            nvfx_fp_emit(fpc, arith(sat, SIN, dst, NVFX_FP_MASK_Y, swz(src[0], X, X, X, X), none, none));
-         if (mask & NVFX_FP_MASK_X)
-            nvfx_fp_emit(fpc, arith(sat, COS, dst, NVFX_FP_MASK_X, swz(src[0], X, X, X, X), none, none));
-      }
-      break;
    case TGSI_OPCODE_SEQ:
       nvfx_fp_emit(fpc, arith(sat, SEQ, dst, mask, src[0], src[1], none));
       break;
@@ -754,9 +729,6 @@ nvfx_fragprog_parse_instruction(struct nvfx_fpc *fpc,
       }
       break;
    }
-   case TGSI_OPCODE_SUB:
-      nvfx_fp_emit(fpc, arith(sat, ADD, dst, mask, src[0], neg(src[1]), none));
-      break;
    case TGSI_OPCODE_TEX:
       nvfx_fp_emit(fpc, tex(sat, TEX, unit, dst, mask, src[0], none, none));
       break;
@@ -785,11 +757,6 @@ nvfx_fragprog_parse_instruction(struct nvfx_fpc *fpc,
         case TGSI_OPCODE_TXP:
                 nvfx_fp_emit(fpc, tex(sat, TXP, unit, dst, mask, src[0], none, none));
                 break;
-   case TGSI_OPCODE_XPD:
-      tmp = nvfx_src(temp(fpc));
-      nvfx_fp_emit(fpc, arith(0, MUL, tmp.reg, mask, swz(src[0], Z, X, Y, Y), swz(src[1], Y, Z, X, X), none));
-      nvfx_fp_emit(fpc, arith(sat, MAD, dst, (mask & ~NVFX_FP_MASK_W), swz(src[0], Y, Z, X, X), swz(src[1], Z, X, Y, Y), neg(tmp)));
-      break;
 
    case TGSI_OPCODE_IF:
       // MOVRC0 R31 (TR0.xyzw), R<src>:
@@ -1125,7 +1092,7 @@ _nvfx_fragprog_translate(uint16_t oclass, struct nv30_fragprog *fp)
       goto out_err;
 
    tgsi_parse_init(&parse, fp->pipe.tokens);
-   util_dynarray_init(&insns);
+   util_dynarray_init(&insns, NULL);
 
    while (!tgsi_parse_end_of_tokens(&parse)) {
       tgsi_parse_token(&parse);
@@ -1186,7 +1153,7 @@ _nvfx_fragprog_translate(uint16_t oclass, struct nv30_fragprog *fp)
 
 out:
    tgsi_parse_free(&parse);
-   if(fpc)
+   if (fpc)
    {
       FREE(fpc->r_temp);
       FREE(fpc->r_imm);