nvc0: use sched control codes for gm107 blitter shader

[mesa.git] / src / gallium / drivers / nouveau / nvc0 / nvc0_compute.c

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
index 2324f3694885ed5e2d119260e9a9dff8d0159c81..11635c94658b01b08c3621e9a78e9cbe098c5431 100644 (file)
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
@@ -113,6 +113,30 @@ nvc0_screen_compute_setup(struct nvc0_screen *screen,
    PUSH_DATA (push, screen->txc->offset + 65536);
    PUSH_DATA (push, NVC0_TSC_MAX_ENTRIES - 1);
 
+   /* MS sample coordinate offsets */
+   BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
+   PUSH_DATA (push, NVC0_CB_AUX_SIZE);
+   PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5));
+   PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5));
+   BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + 2 * 8);
+   PUSH_DATA (push, NVC0_CB_AUX_MS_INFO);
+   PUSH_DATA (push, 0); /* 0 */
+   PUSH_DATA (push, 0);
+   PUSH_DATA (push, 1); /* 1 */
+   PUSH_DATA (push, 0);
+   PUSH_DATA (push, 0); /* 2 */
+   PUSH_DATA (push, 1);
+   PUSH_DATA (push, 1); /* 3 */
+   PUSH_DATA (push, 1);
+   PUSH_DATA (push, 2); /* 4 */
+   PUSH_DATA (push, 0);
+   PUSH_DATA (push, 3); /* 5 */
+   PUSH_DATA (push, 0);
+   PUSH_DATA (push, 2); /* 6 */
+   PUSH_DATA (push, 1);
+   PUSH_DATA (push, 3); /* 7 */
+   PUSH_DATA (push, 1);
+
    return 0;
 }
 
@@ -124,6 +148,11 @@ nvc0_compute_validate_samplers(struct nvc0_context *nvc0)
       BEGIN_NVC0(nvc0->base.pushbuf, NVC0_CP(TSC_FLUSH), 1);
       PUSH_DATA (nvc0->base.pushbuf, 0);
    }
+
+   /* Invalidate all 3D samplers because they are aliased. */
+   for (int s = 0; s < 5; s++)
+      nvc0->samplers_dirty[s] = ~0;
+   nvc0->dirty_3d |= NVC0_NEW_3D_SAMPLERS;
 }
 
 static void
@@ -134,6 +163,27 @@ nvc0_compute_validate_textures(struct nvc0_context *nvc0)
       BEGIN_NVC0(nvc0->base.pushbuf, NVC0_CP(TIC_FLUSH), 1);
       PUSH_DATA (nvc0->base.pushbuf, 0);
    }
+
+   /* Invalidate all 3D textures because they are aliased. */
+   for (int s = 0; s < 5; s++) {
+      for (int i = 0; i < nvc0->num_textures[s]; i++)
+         nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_TEX(s, i));
+      nvc0->textures_dirty[s] = ~0;
+   }
+   nvc0->dirty_3d |= NVC0_NEW_3D_TEXTURES;
+}
+
+static inline void
+nvc0_compute_invalidate_constbufs(struct nvc0_context *nvc0)
+{
+   int s;
+
+   /* Invalidate all 3D constbufs because they are aliased with COMPUTE. */
+   for (s = 0; s < 5; s++) {
+      nvc0->constbuf_dirty[s] |= nvc0->constbuf_valid[s];
+      nvc0->state.uniform_buffer_bound[s] = 0;
+   }
+   nvc0->dirty_3d |= NVC0_NEW_3D_CONSTBUF;
 }
 
 static void
@@ -190,6 +240,8 @@ nvc0_compute_validate_constbufs(struct nvc0_context *nvc0)
       }
    }
 
+   nvc0_compute_invalidate_constbufs(nvc0);
+
    BEGIN_NVC0(push, NVC0_CP(FLUSH), 1);
    PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CB);
 }
@@ -201,7 +253,7 @@ nvc0_compute_validate_driverconst(struct nvc0_context *nvc0)
    struct nvc0_screen *screen = nvc0->screen;
 
    BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
-   PUSH_DATA (push, 2048);
+   PUSH_DATA (push, NVC0_CB_AUX_SIZE);
    PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5));
    PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5));
    BEGIN_NVC0(push, NVC0_CP(CB_BIND), 1);
@@ -219,7 +271,7 @@ nvc0_compute_validate_buffers(struct nvc0_context *nvc0)
    int i;
 
    BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
-   PUSH_DATA (push, 2048);
+   PUSH_DATA (push, NVC0_CB_AUX_SIZE);
    PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
    PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(s));
    BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + 4 * NVC0_MAX_BUFFERS);
@@ -234,6 +286,10 @@ nvc0_compute_validate_buffers(struct nvc0_context *nvc0)
          PUSH_DATA (push, nvc0->buffers[s][i].buffer_size);
          PUSH_DATA (push, 0);
          BCTX_REFN(nvc0->bufctx_cp, CP_BUF, res, RDWR);
+         util_range_add(&res->valid_buffer_range,
+                        nvc0->buffers[s][i].buffer_offset,
+                        nvc0->buffers[s][i].buffer_offset +
+                        nvc0->buffers[s][i].buffer_size);
       } else {
          PUSH_DATA (push, 0);
          PUSH_DATA (push, 0);
@@ -258,6 +314,46 @@ nvc0_compute_validate_globals(struct nvc0_context *nvc0)
    }
 }
 
+static inline void
+nvc0_compute_invalidate_surfaces(struct nvc0_context *nvc0, const int s)
+{
+   struct nouveau_pushbuf *push = nvc0->base.pushbuf;
+   int i;
+
+   for (i = 0; i < NVC0_MAX_IMAGES; ++i) {
+      if (s == 5)
+         BEGIN_NVC0(push, NVC0_CP(IMAGE(i)), 6);
+      else
+         BEGIN_NVC0(push, NVC0_3D(IMAGE(i)), 6);
+      PUSH_DATA(push, 0);
+      PUSH_DATA(push, 0);
+      PUSH_DATA(push, 0);
+      PUSH_DATA(push, 0);
+      PUSH_DATA(push, 0x14000);
+      PUSH_DATA(push, 0);
+   }
+}
+
+static void
+nvc0_compute_validate_surfaces(struct nvc0_context *nvc0)
+{
+   /* TODO: Invalidating both 3D and CP surfaces before validating surfaces for
+    * compute is probably not really necessary, but we didn't find any better
+    * solutions for now. This fixes some invalidation issues when compute and
+    * fragment shaders are used inside the same context. Anyway, we definitely
+    * have invalidation issues between 3D and CP for other resources like SSBO
+    * and atomic counters. */
+   nvc0_compute_invalidate_surfaces(nvc0, 4);
+   nvc0_compute_invalidate_surfaces(nvc0, 5);
+
+   nvc0_validate_suf(nvc0, 5);
+
+   /* Invalidate all FRAGMENT images because they are aliased with COMPUTE. */
+   nouveau_bufctx_reset(nvc0->bufctx_3d, NVC0_BIND_3D_SUF);
+   nvc0->dirty_3d |= NVC0_NEW_3D_SURFACES;
+   nvc0->images_dirty[4] |= nvc0->images_valid[4];
+}
+
 static struct nvc0_state_validate
 validate_list_cp[] = {
    { nvc0_compprog_validate,              NVC0_NEW_CP_PROGRAM     },
@@ -267,6 +363,7 @@ validate_list_cp[] = {
    { nvc0_compute_validate_textures,      NVC0_NEW_CP_TEXTURES    },
    { nvc0_compute_validate_samplers,      NVC0_NEW_CP_SAMPLERS    },
    { nvc0_compute_validate_globals,       NVC0_NEW_CP_GLOBALS     },
+   { nvc0_compute_validate_surfaces,      NVC0_NEW_CP_SURFACES    },
 };
 
 static bool
@@ -284,7 +381,8 @@ nvc0_state_validate_cp(struct nvc0_context *nvc0, uint32_t mask)
 }
 
 static void
-nvc0_compute_upload_input(struct nvc0_context *nvc0, const void *input)
+nvc0_compute_upload_input(struct nvc0_context *nvc0,
+                          const struct pipe_grid_info *info)
 {
    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
    struct nvc0_screen *screen = nvc0->screen;
@@ -303,11 +401,23 @@ nvc0_compute_upload_input(struct nvc0_context *nvc0, const void *input)
       /* NOTE: size is limited to 4 KiB, which is < NV04_PFIFO_MAX_PACKET_LEN */
       BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + cp->parm_size / 4);
       PUSH_DATA (push, 0);
-      PUSH_DATAp(push, input, cp->parm_size / 4);
+      PUSH_DATAp(push, info->input, cp->parm_size / 4);
 
-      BEGIN_NVC0(push, NVC0_CP(FLUSH), 1);
-      PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CB);
+      nvc0_compute_invalidate_constbufs(nvc0);
    }
+
+   BEGIN_NVC0(push, NVC0_CP(CB_SIZE), 3);
+   PUSH_DATA (push, NVC0_CB_AUX_SIZE);
+   PUSH_DATAh(push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5));
+   PUSH_DATA (push, screen->uniform_bo->offset + NVC0_CB_AUX_INFO(5));
+
+   BEGIN_1IC0(push, NVC0_CP(CB_POS), 1 + 1);
+   /* (7) as we only upload work_dim on nvc0, the rest uses special regs */
+   PUSH_DATA (push, NVC0_CB_AUX_GRID_INFO(7));
+   PUSH_DATA (push, info->work_dim);
+
+   BEGIN_NVC0(push, NVC0_CP(FLUSH), 1);
+   PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CB);
 }
 
 void
@@ -316,7 +426,6 @@ nvc0_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info)
    struct nvc0_context *nvc0 = nvc0_context(pipe);
    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
    struct nvc0_program *cp = nvc0->compprog;
-   unsigned s;
    int ret;
 
    ret = !nvc0_state_validate_cp(nvc0, ~0);
@@ -325,7 +434,7 @@ nvc0_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info)
       return;
    }
 
-   nvc0_compute_upload_input(nvc0, info->input);
+   nvc0_compute_upload_input(nvc0, info);
 
    BEGIN_NVC0(push, NVC0_CP(CP_START_ID), 1);
    PUSH_DATA (push, nvc0_program_symbol_offset(cp, info->pc));
@@ -384,10 +493,9 @@ nvc0_launch_grid(struct pipe_context *pipe, const struct pipe_grid_info *info)
       PUSH_DATA (push, 0x1);
    }
 
-   /* Invalidate all 3D constbufs because they are aliased with COMPUTE. */
-   nvc0->dirty_3d |= NVC0_NEW_3D_CONSTBUF;
-   for (s = 0; s < 5; s++) {
-      nvc0->constbuf_dirty[s] |= nvc0->constbuf_valid[s];
-      nvc0->state.uniform_buffer_bound[s] = 0;
-   }
+   /* TODO: Not sure if this is really necessary. */
+   nvc0_compute_invalidate_surfaces(nvc0, 5);
+   nouveau_bufctx_reset(nvc0->bufctx_cp, NVC0_BIND_CP_SUF);
+   nvc0->dirty_cp |= NVC0_NEW_CP_SURFACES;
+   nvc0->images_dirty[5] |= nvc0->images_valid[5];
 }