#include "pipe/p_defines.h"
#include "pipe/p_state.h"
+#include "util/list.h"
#include "util/u_memory.h"
#include "util/u_math.h"
#include "util/u_inlines.h"
#include "nv50/nv50_2d.xml.h"
#include "nvc0/nvc0_m2mf.xml.h"
#include "nvc0/nve4_p2mf.xml.h"
+#include "nvc0/nvc0_compute.xml.h"
#include "nvc0/nvc0_macros.h"
/* NOTE: must keep NVC0_NEW_3D_...PROG in consecutive bits in this order */
#define NVC0_NEW_3D_TEXTURES (1 << 19)
#define NVC0_NEW_3D_SAMPLERS (1 << 20)
#define NVC0_NEW_3D_TFB_TARGETS (1 << 21)
-#define NVC0_NEW_3D_IDXBUF (1 << 22)
+
#define NVC0_NEW_3D_SURFACES (1 << 23)
#define NVC0_NEW_3D_MIN_SAMPLES (1 << 24)
#define NVC0_NEW_3D_TESSFACTOR (1 << 25)
#define NVC0_NEW_3D_BUFFERS (1 << 26)
#define NVC0_NEW_3D_DRIVERCONST (1 << 27)
+#define NVC0_NEW_3D_WINDOW_RECTS (1 << 28)
+
+#define NVC0_NEW_3D_SAMPLE_LOCATIONS (1 << 29)
#define NVC0_NEW_CP_PROGRAM (1 << 0)
#define NVC0_NEW_CP_SURFACES (1 << 1)
#define NVC0_BIND_3D_SUF 245
#define NVC0_BIND_3D_BUF 246
#define NVC0_BIND_3D_SCREEN 247
+#define NVC0_BIND_3D_BINDLESS 248
#define NVC0_BIND_3D_TLS 249
-#define NVC0_BIND_3D_COUNT 250
+#define NVC0_BIND_3D_TEXT 250
+#define NVC0_BIND_3D_COUNT 251
/* compute bufctx (during launch_grid) */
#define NVC0_BIND_CP_CB(i) ( 0 + (i))
#define NVC0_BIND_CP_SCREEN 51
#define NVC0_BIND_CP_QUERY 52
#define NVC0_BIND_CP_BUF 53
-#define NVC0_BIND_CP_COUNT 54
+#define NVC0_BIND_CP_TEXT 54
+#define NVC0_BIND_CP_BINDLESS 55
+#define NVC0_BIND_CP_COUNT 56
/* bufctx for other operations */
#define NVC0_BIND_2D 0
/* 6 user uniform buffers, at 64K each */
#define NVC0_CB_USR_INFO(s) (s << 16)
#define NVC0_CB_USR_SIZE (6 << 16)
-/* 6 driver constbuts, at 1K each */
-#define NVC0_CB_AUX_INFO(s) NVC0_CB_USR_SIZE + (s << 10)
-#define NVC0_CB_AUX_SIZE (6 << 10)
+/* 6 driver constbuts, at 64K each */
+#define NVC0_CB_AUX_INFO(s) NVC0_CB_USR_SIZE + (s << 16)
+#define NVC0_CB_AUX_SIZE (1 << 16)
/* XXX: Figure out what this UNK data is. */
#define NVC0_CB_AUX_UNK_INFO 0x000
#define NVC0_CB_AUX_UNK_SIZE (8 * 4)
-/* 32 textures handles, at 1 32-bits integer each */
+/* 40 textures handles (8 for GM107+ images only), at 1 32-bits integer each */
#define NVC0_CB_AUX_TEX_INFO(i) 0x020 + (i) * 4
-#define NVC0_CB_AUX_TEX_SIZE (32 * 4)
+#define NVC0_CB_AUX_TEX_SIZE (40 * 4)
/* 8 sets of 32-bits coordinate offsets */
-#define NVC0_CB_AUX_MS_INFO 0x0a0 /* CP */
+#define NVC0_CB_AUX_MS_INFO 0x0c0
#define NVC0_CB_AUX_MS_SIZE (8 * 2 * 4)
-/* block/grid size, at 3 32-bits integers each and gridid */
-#define NVC0_CB_AUX_GRID_INFO 0x0e0 /* CP */
-#define NVC0_CB_AUX_GRID_SIZE (7 * 4)
+/* block/grid size, at 3 32-bits integers each, gridid and work_dim */
+#define NVC0_CB_AUX_GRID_INFO(i) 0x100 + (i) * 4 /* CP */
+#define NVC0_CB_AUX_GRID_SIZE (8 * 4)
+/* FB texture handle */
+#define NVC0_CB_AUX_FB_TEX_INFO 0x100 /* FP */
+#define NVC0_CB_AUX_FB_TEX_SIZE (4)
/* 8 user clip planes, at 4 32-bits floats each */
-#define NVC0_CB_AUX_UCP_INFO 0x100
+#define NVC0_CB_AUX_UCP_INFO 0x120
#define NVC0_CB_AUX_UCP_SIZE (PIPE_MAX_CLIP_PLANES * 4 * 4)
+/* 13 ubos, at 4 32-bits integer each */
+#define NVC0_CB_AUX_UBO_INFO(i) 0x120 + (i) * 4 * 4 /* CP */
+#define NVC0_CB_AUX_UBO_SIZE ((NVC0_MAX_PIPE_CONSTBUFS - 1) * 4 * 4)
/* 8 sets of 32-bits integer pairs sample offsets */
-#define NVC0_CB_AUX_SAMPLE_INFO 0x180 /* FP */
-#define NVC0_CB_AUX_SAMPLE_SIZE (8 * 4 * 2)
-/* draw parameters (index bais, base instance, drawid) */
-#define NVC0_CB_AUX_DRAW_INFO 0x180 /* VP */
+#define NVC0_CB_AUX_SAMPLE_INFO 0x1a0 /* FP */
+/* 256 bytes, though only 64 bytes used before GM200 */
+#define NVC0_CB_AUX_SAMPLE_SIZE (8 * 2 * 4 * 4)
+/* draw parameters (index bias, base instance, drawid)
+ * be sure to update the indirect draw macros in com9097.mme when changing this
+ */
+#define NVC0_CB_AUX_DRAW_INFO 0x1a0 /* VP */
/* 32 user buffers, at 4 32-bits integers each */
-#define NVC0_CB_AUX_BUF_INFO(i) 0x200 + (i) * 4 * 4
+#define NVC0_CB_AUX_BUF_INFO(i) 0x2a0 + (i) * 4 * 4
#define NVC0_CB_AUX_BUF_SIZE (NVC0_MAX_BUFFERS * 4 * 4)
+/* 8 surfaces, at 16 32-bits integers each */
+#define NVC0_CB_AUX_SU_INFO(i) 0x4a0 + (i) * 16 * 4
+#define NVC0_CB_AUX_SU_SIZE (NVC0_MAX_IMAGES * 16 * 4)
+/* 1 64-bits address and 1 32-bits sequence
+ * be sure to update the shaders in nvc0_query_hw_sm.c when changing this
+ */
+#define NVC0_CB_AUX_MP_INFO 0x6a0
+#define NVC0_CB_AUX_MP_SIZE 3 * 4
+/* 512 64-byte blocks for bindless image handles */
+#define NVC0_CB_AUX_BINDLESS_INFO(i) 0x6b0 + (i) * 16 * 4
+#define NVC0_CB_AUX_BINDLESS_SIZE (NVE4_IMG_MAX_HANDLES * 16 * 4)
/* 4 32-bits floats for the vertex runout, put at the end */
-#define NVC0_CB_AUX_RUNOUT_INFO NVC0_CB_USR_SIZE + NVC0_CB_AUX_SIZE
+#define NVC0_CB_AUX_RUNOUT_INFO NVC0_CB_USR_SIZE + (NVC0_CB_AUX_SIZE * 6)
struct nvc0_blitctx;
bool nvc0_blitctx_create(struct nvc0_context *);
void nvc0_blitctx_destroy(struct nvc0_context *);
+struct nvc0_resident {
+ struct list_head list;
+ uint64_t handle;
+ struct nv04_resource *buf;
+ uint32_t flags;
+};
+
struct nvc0_context {
struct nouveau_context base;
struct pipe_vertex_buffer vtxbuf[PIPE_MAX_ATTRIBS];
unsigned num_vtxbufs;
uint32_t vtxbufs_coherent;
- struct pipe_index_buffer idxbuf;
uint32_t constant_vbos;
uint32_t vbo_user; /* bitmask of vertex buffers pointing to user memory */
uint32_t vb_elt_first; /* from pipe_draw_info, for vertex upload */
uint32_t textures_coherent[6];
struct nv50_tsc_entry *samplers[6][PIPE_MAX_SAMPLERS];
unsigned num_samplers[6];
- uint16_t samplers_dirty[6];
+ uint32_t samplers_dirty[6];
bool seamless_cube_map;
+ struct pipe_sampler_view *fbtexture;
uint32_t tex_handles[6][PIPE_MAX_SAMPLERS]; /* for nve4 */
+ struct list_head tex_head;
+ struct list_head img_head;
+
struct pipe_framebuffer_state framebuffer;
+ bool sample_locations_enabled;
+ uint8_t sample_locations[2 * 4 * 8];
struct pipe_blend_color blend_colour;
struct pipe_stencil_ref stencil_ref;
struct pipe_poly_stipple stipple;
struct pipe_viewport_state viewports[NVC0_MAX_VIEWPORTS];
unsigned viewports_dirty;
struct pipe_clip_state clip;
+ struct nvc0_window_rect_stateobj window_rect;
unsigned sample_mask;
unsigned min_samples;
uint32_t buffers_dirty[6];
uint32_t buffers_valid[6];
+ struct pipe_image_view images[6][NVC0_MAX_IMAGES];
+ struct pipe_sampler_view *images_tic[6][NVC0_MAX_IMAGES]; /* GM107+ */
+ uint16_t images_dirty[6];
+ uint16_t images_valid[6];
+
struct util_dynarray global_residents;
+
+ uint64_t compute_invocations;
};
static inline struct nvc0_context *
void nvc0_bufctx_fence(struct nvc0_context *, struct nouveau_bufctx *,
bool on_flush);
void nvc0_default_kick_notify(struct nouveau_pushbuf *);
+const void *nvc0_get_sample_locations(unsigned);
/* nvc0_draw.c */
extern struct draw_stage *nvc0_draw_render_stage(struct nvc0_context *);
/* nvc0_program.c */
bool nvc0_program_translate(struct nvc0_program *, uint16_t chipset,
struct pipe_debug_callback *);
-bool nvc0_program_upload_code(struct nvc0_context *, struct nvc0_program *);
+bool nvc0_program_upload(struct nvc0_context *, struct nvc0_program *);
void nvc0_program_destroy(struct nvc0_context *, struct nvc0_program *);
void nvc0_program_library_upload(struct nvc0_context *);
uint32_t nvc0_program_symbol_offset(const struct nvc0_program *,
void nvc0_compprog_validate(struct nvc0_context *);
void nvc0_tfb_validate(struct nvc0_context *);
+void nvc0_layer_validate(struct nvc0_context *);
/* nvc0_state.c */
extern void nvc0_init_state_functions(struct nvc0_context *);
bool nvc0_validate_tic(struct nvc0_context *nvc0, int s);
bool nvc0_validate_tsc(struct nvc0_context *nvc0, int s);
bool nve4_validate_tsc(struct nvc0_context *nvc0, int s);
+void nvc0_validate_suf(struct nvc0_context *nvc0, int s);
void nvc0_validate_textures(struct nvc0_context *);
void nvc0_validate_samplers(struct nvc0_context *);
+void nvc0_upload_tsc0(struct nvc0_context *);
void nve4_set_tex_handles(struct nvc0_context *);
void nvc0_validate_surfaces(struct nvc0_context *);
-void nve4_set_surface_info(struct nouveau_pushbuf *, struct pipe_surface *,
- struct nvc0_screen *);
+void nve4_set_surface_info(struct nouveau_pushbuf *,
+ const struct pipe_image_view *,
+ struct nvc0_context *);
+void nvc0_mark_image_range_valid(const struct pipe_image_view *);
+bool nvc0_update_tic(struct nvc0_context *, struct nv50_tic_entry *,
+ struct nv04_resource *);
struct pipe_sampler_view *
nvc0_create_texture_view(struct pipe_context *,
nvc0_create_sampler_view(struct pipe_context *,
struct pipe_resource *,
const struct pipe_sampler_view *);
+struct pipe_sampler_view *
+gm107_create_texture_view_from_image(struct pipe_context *,
+ const struct pipe_image_view *);
+
+void nvc0_init_bindless_functions(struct pipe_context *);
/* nvc0_transfer.c */
void
/* nvc0_push.c */
void nvc0_push_vbo(struct nvc0_context *, const struct pipe_draw_info *);
+void nvc0_push_vbo_indirect(struct nvc0_context *, const struct pipe_draw_info *);
/* nve4_compute.c */
void nve4_launch_grid(struct pipe_context *, const struct pipe_grid_info *);
/* nvc0_compute.c */
void nvc0_launch_grid(struct pipe_context *, const struct pipe_grid_info *);
void nvc0_compute_validate_globals(struct nvc0_context *);
+void nvc0_update_compute_invocations_counter(struct nvc0_context *nvc0,
+ const struct pipe_grid_info *info);
#endif
projects / mesa.git / blobdiff