nvc0: add support for handling indirect draws with attrib conversion

[mesa.git] / src / gallium / drivers / nouveau / nvc0 / nvc0_query.c

diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_query.c b/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
index b34271c49117324696994ddcb63e74c7ebe74145..1a3e4e794c0a9eb7051481e9378e2f90927bf419 100644 (file)
--- a/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
+++ b/src/gallium/drivers/nouveau/nvc0/nvc0_query.c
@@ -58,11 +58,12 @@ nvc0_begin_query(struct pipe_context *pipe, struct pipe_query *pq)
    return q->funcs->begin_query(nvc0_context(pipe), q);
 }
 
-static void
+static bool
 nvc0_end_query(struct pipe_context *pipe, struct pipe_query *pq)
 {
    struct nvc0_query *q = nvc0_query(pq);
    q->funcs->end_query(nvc0_context(pipe), q);
+   return true;
 }
 
 static boolean
@@ -94,7 +95,7 @@ nvc0_get_query_result_resource(struct pipe_context *pipe,
 static void
 nvc0_render_condition(struct pipe_context *pipe,
                       struct pipe_query *pq,
-                      boolean condition, uint mode)
+                      boolean condition, enum pipe_render_cond_flag mode)
 {
    struct nvc0_context *nvc0 = nvc0_context(pipe);
    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
@@ -112,12 +113,14 @@ nvc0_render_condition(struct pipe_context *pipe,
       /* NOTE: comparison of 2 queries only works if both have completed */
       switch (q->type) {
       case PIPE_QUERY_SO_OVERFLOW_PREDICATE:
+      case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE:
          cond = condition ? NVC0_3D_COND_MODE_EQUAL :
-                          NVC0_3D_COND_MODE_NOT_EQUAL;
+                            NVC0_3D_COND_MODE_NOT_EQUAL;
          wait = true;
          break;
       case PIPE_QUERY_OCCLUSION_COUNTER:
       case PIPE_QUERY_OCCLUSION_PREDICATE:
+      case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE:
          if (likely(!condition)) {
             if (unlikely(hq->nesting))
                cond = wait ? NVC0_3D_COND_MODE_NOT_EQUAL :
@@ -141,15 +144,17 @@ nvc0_render_condition(struct pipe_context *pipe,
    nvc0->cond_mode = mode;
 
    if (!pq) {
-      PUSH_SPACE(push, 1);
+      PUSH_SPACE(push, 2);
       IMMED_NVC0(push, NVC0_3D(COND_MODE), cond);
+      if (nvc0->screen->compute)
+         IMMED_NVC0(push, NVC0_CP(COND_MODE), cond);
       return;
    }
 
    if (wait)
       nvc0_hw_query_fifo_wait(nvc0, q);
 
-   PUSH_SPACE(push, 7);
+   PUSH_SPACE(push, 10);
    PUSH_REFN (push, hq->bo, NOUVEAU_BO_GART | NOUVEAU_BO_RD);
    BEGIN_NVC0(push, NVC0_3D(COND_ADDRESS_HIGH), 3);
    PUSH_DATAh(push, hq->bo->offset + hq->offset);
@@ -158,6 +163,12 @@ nvc0_render_condition(struct pipe_context *pipe,
    BEGIN_NVC0(push, NVC0_2D(COND_ADDRESS_HIGH), 2);
    PUSH_DATAh(push, hq->bo->offset + hq->offset);
    PUSH_DATA (push, hq->bo->offset + hq->offset);
+   if (nvc0->screen->compute) {
+      BEGIN_NVC0(push, NVC0_CP(COND_ADDRESS_HIGH), 3);
+      PUSH_DATAh(push, hq->bo->offset + hq->offset);
+      PUSH_DATA (push, hq->bo->offset + hq->offset);
+      PUSH_DATA (push, cond);
+   }
 }
 
 int
@@ -204,7 +215,7 @@ nvc0_screen_get_driver_query_group_info(struct pipe_screen *pscreen,
 
    if (screen->base.drm->version >= 0x01000101) {
       if (screen->compute) {
-         if (screen->base.class_3d <= NVF0_3D_CLASS) {
+         if (screen->base.class_3d <= GM200_3D_CLASS) {
             count += 2;
          }
       }
@@ -217,22 +228,20 @@ nvc0_screen_get_driver_query_group_info(struct pipe_screen *pscreen,
       if (screen->compute) {
          info->name = "MP counters";
 
-         /* Because we can't expose the number of hardware counters needed for
-          * each different query, we don't want to allow more than one active
-          * query simultaneously to avoid failure when the maximum number of
-          * counters is reached. Note that these groups of GPU counters are
-          * currently only used by AMD_performance_monitor.
-          */
-         info->max_active_queries = 1;
+         /* Expose the maximum number of hardware counters available, although
+          * some queries use more than one counter. Expect failures in that
+          * case but as performance counters are for developers, this should
+          * not have a real impact. */
+         info->max_active_queries = 8;
          info->num_queries = nvc0_hw_sm_get_num_queries(screen);
          return 1;
       }
    } else
    if (id == NVC0_HW_METRIC_QUERY_GROUP) {
       if (screen->compute) {
-          if (screen->base.class_3d <= NVF0_3D_CLASS) {
+          if (screen->base.class_3d <= GM200_3D_CLASS) {
             info->name = "Performance metrics";
-            info->max_active_queries = 1;
+            info->max_active_queries = 4; /* A metric uses at least 2 queries */
             info->num_queries = nvc0_hw_metric_get_num_queries(screen);
             return 1;
          }