* OTHER DEALINGS IN THE SOFTWARE.
*/
+#include <xf86drm.h>
+#include <nouveau_drm.h>
#include "util/u_format.h"
#include "util/u_format_s3tc.h"
#include "pipe/p_screen.h"
#include "nvc0/nvc0_context.h"
#include "nvc0/nvc0_screen.h"
-#include "nvc0/nvc0_graph_macros.h"
-
-#ifndef NOUVEAU_GETPARAM_GRAPH_UNITS
-# define NOUVEAU_GETPARAM_GRAPH_UNITS 13
-#endif
+#include "nvc0/mme/com9097.mme.h"
static boolean
nvc0_screen_is_format_supported(struct pipe_screen *pscreen,
nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
{
const uint16_t class_3d = nouveau_screen(pscreen)->class_3d;
+ struct nouveau_device *dev = nouveau_screen(pscreen)->device;
switch (param) {
+ /* non-boolean caps */
case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
return 15;
return -32;
case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
return 31;
+ case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
+ return 65536;
+ case PIPE_CAP_GLSL_FEATURE_LEVEL:
+ return 400;
+ case PIPE_CAP_MAX_RENDER_TARGETS:
+ return 8;
+ case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
+ return 1;
+ case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
+ return 4;
+ case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
+ case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
+ return 128;
+ case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
+ case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
+ return 1024;
+ case PIPE_CAP_MAX_VERTEX_STREAMS:
+ return 4;
+ case PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE:
+ return 2048;
+ case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
+ return 256;
+ case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
+ return 1; /* 256 for binding as RT, but that's not possible in GL */
+ case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
+ return NOUVEAU_MIN_BUFFER_MAP_ALIGN;
+ case PIPE_CAP_MAX_VIEWPORTS:
+ return NVC0_MAX_VIEWPORTS;
+ case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
+ return 4;
+ case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
+ return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50;
+ case PIPE_CAP_ENDIANNESS:
+ return PIPE_ENDIAN_LITTLE;
+
+ /* supported caps */
case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
case PIPE_CAP_TEXTURE_SWIZZLE:
case PIPE_CAP_TEXTURE_SHADOW_MAP:
case PIPE_CAP_CUBE_MAP_ARRAY:
case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
case PIPE_CAP_TEXTURE_MULTISAMPLE:
- return 1;
- case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
- return 65536;
- case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
- return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
case PIPE_CAP_TWO_SIDED_STENCIL:
case PIPE_CAP_DEPTH_CLIP_DISABLE:
case PIPE_CAP_POINT_SPRITE:
case PIPE_CAP_TGSI_TEXCOORD:
- return 1;
case PIPE_CAP_SM3:
- return 1;
- case PIPE_CAP_GLSL_FEATURE_LEVEL:
- return 330;
- case PIPE_CAP_MAX_RENDER_TARGETS:
- return 8;
- case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
- return 1;
case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
case PIPE_CAP_VERTEX_COLOR_CLAMPED:
- return 1;
case PIPE_CAP_QUERY_TIMESTAMP:
case PIPE_CAP_QUERY_TIME_ELAPSED:
case PIPE_CAP_OCCLUSION_QUERY:
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
- return 1;
- case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
- return 4;
- case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
- case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
- return 128;
- case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
- case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
- return 1024;
case PIPE_CAP_BLEND_EQUATION_SEPARATE:
case PIPE_CAP_INDEP_BLEND_ENABLE:
case PIPE_CAP_INDEP_BLEND_FUNC:
- return 1;
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
- return 1;
- case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
- case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
- return 0;
- case PIPE_CAP_SHADER_STENCIL_EXPORT:
- return 0;
case PIPE_CAP_PRIMITIVE_RESTART:
case PIPE_CAP_TGSI_INSTANCEID:
case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
case PIPE_CAP_TEXTURE_BARRIER:
case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
case PIPE_CAP_START_INSTANCE:
- return 1;
- case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
- return 0; /* state trackers will know better */
+ case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
+ case PIPE_CAP_DRAW_INDIRECT:
case PIPE_CAP_USER_CONSTANT_BUFFERS:
case PIPE_CAP_USER_INDEX_BUFFERS:
case PIPE_CAP_USER_VERTEX_BUFFERS:
+ case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
+ case PIPE_CAP_TEXTURE_QUERY_LOD:
+ case PIPE_CAP_SAMPLE_SHADING:
+ case PIPE_CAP_TEXTURE_GATHER_OFFSETS:
+ case PIPE_CAP_TEXTURE_GATHER_SM5:
+ case PIPE_CAP_TGSI_FS_FINE_DERIVATIVE:
+ case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
+ case PIPE_CAP_SAMPLER_VIEW_TARGET:
+ case PIPE_CAP_CLIP_HALFZ:
+ case PIPE_CAP_POLYGON_OFFSET_CLAMP:
+ case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
return 1;
- case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
- return 256;
- case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
- return 1; /* 256 for binding as RT, but that's not possible in GL */
- case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
- return NOUVEAU_MIN_BUFFER_MAP_ALIGN;
+ case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
+ return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
+ case PIPE_CAP_COMPUTE:
+ return (class_3d == NVE4_3D_CLASS) ? 1 : 0;
+
+ /* unsupported caps */
+ case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
+ case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
+ case PIPE_CAP_SHADER_STENCIL_EXPORT:
+ case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
- return 0;
- case PIPE_CAP_COMPUTE:
- return (class_3d >= NVE4_3D_CLASS) ? 1 : 0;
- case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
- return 1;
- case PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK:
- return PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50;
- case PIPE_CAP_ENDIANNESS:
- return PIPE_ENDIAN_LITTLE;
- case PIPE_CAP_TGSI_VS_LAYER:
- case PIPE_CAP_TEXTURE_GATHER_SM5:
- case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
+ case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
case PIPE_CAP_FAKE_SW_MSAA:
- case PIPE_CAP_SAMPLE_SHADING:
+ case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
+ case PIPE_CAP_VERTEXID_NOBASE:
+ case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
return 0;
- case PIPE_CAP_MAX_VIEWPORTS:
- return 1;
- case PIPE_CAP_TEXTURE_QUERY_LOD:
+
+ case PIPE_CAP_VENDOR_ID:
+ return 0x10de;
+ case PIPE_CAP_DEVICE_ID: {
+ uint64_t device_id;
+ if (nouveau_getparam(dev, NOUVEAU_GETPARAM_PCI_DEVICE, &device_id)) {
+ NOUVEAU_ERR("NOUVEAU_GETPARAM_PCI_DEVICE failed.\n");
+ return -1;
+ }
+ return device_id;
+ }
+ case PIPE_CAP_ACCELERATED:
return 1;
- case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
- return 4;
- default:
- NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
+ case PIPE_CAP_VIDEO_MEMORY:
+ return dev->vram_size >> 20;
+ case PIPE_CAP_UMA:
return 0;
}
+
+ NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
+ return 0;
}
static int
case PIPE_SHADER_FRAGMENT:
break;
case PIPE_SHADER_COMPUTE:
- if (class_3d < NVE4_3D_CLASS)
+ if (class_3d != NVE4_3D_CLASS)
return 0;
break;
default:
* and excludes 0x60 per-patch inputs.
*/
return 0x200 / 16;
- case PIPE_SHADER_CAP_MAX_CONSTS:
- return 65536 / 16;
+ case PIPE_SHADER_CAP_MAX_OUTPUTS:
+ return 32;
+ case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
+ return 65536;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
if (shader == PIPE_SHADER_COMPUTE && class_3d >= NVE4_3D_CLASS)
return NVE4_MAX_PIPE_CONSTBUFS_COMPUTE;
return NVC0_MAX_PIPE_CONSTBUFS;
- case PIPE_SHADER_CAP_MAX_ADDRS:
- return 1;
case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
return shader != PIPE_SHADER_FRAGMENT;
return 16.0f;
case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
return 15.0f;
- default:
- NOUVEAU_ERR("unknown PIPE_CAP %d\n", param);
+ case PIPE_CAPF_GUARD_BAND_LEFT:
+ case PIPE_CAPF_GUARD_BAND_TOP:
return 0.0f;
+ case PIPE_CAPF_GUARD_BAND_RIGHT:
+ case PIPE_CAPF_GUARD_BAND_BOTTOM:
+ return 0.0f; /* that or infinity */
}
+
+ NOUVEAU_ERR("unknown PIPE_CAPF %d\n", param);
+ return 0.0f;
}
static int
FREE(screen->tic.entries);
- nouveau_mm_destroy(screen->mm_VRAM_fe0);
-
nouveau_object_del(&screen->eng3d);
nouveau_object_del(&screen->eng2d);
nouveau_object_del(&screen->m2mf);
size /= 4;
+ assert((pos + size) <= 0x800);
+
BEGIN_NVC0(push, SUBC_3D(NVC0_GRAPH_MACRO_ID), 2);
PUSH_DATA (push, (m - 0x3800) / 8);
PUSH_DATA (push, pos);
PUSH_DATA (push, (3 << 16) | 3);
BEGIN_NVC0(push, SUBC_3D(0x1794), 1);
PUSH_DATA (push, (2 << 16) | 2);
- BEGIN_NVC0(push, SUBC_3D(0x0de8), 1);
- PUSH_DATA (push, 1);
- BEGIN_NVC0(push, SUBC_3D(0x12ac), 1);
- PUSH_DATA (push, 0);
+ if (obj_class < GM107_3D_CLASS) {
+ BEGIN_NVC0(push, SUBC_3D(0x12ac), 1);
+ PUSH_DATA (push, 0);
+ }
BEGIN_NVC0(push, SUBC_3D(0x0218), 1);
PUSH_DATA (push, 0x10);
BEGIN_NVC0(push, SUBC_3D(0x10fc), 1);
BEGIN_NVC0(push, SUBC_3D(0x1610), 1);
PUSH_DATA (push, 0xe);
- BEGIN_NVC0(push, SUBC_3D(0x164c), 1);
- PUSH_DATA (push, 1 << 12);
+ BEGIN_NVC0(push, NVC0_3D(VERTEX_ID_GEN_MODE), 1);
+ PUSH_DATA (push, NVC0_3D_VERTEX_ID_GEN_MODE_DRAW_ARRAYS_ADD_START);
BEGIN_NVC0(push, SUBC_3D(0x030c), 1);
PUSH_DATA (push, 0);
BEGIN_NVC0(push, SUBC_3D(0x0300), 1);
PUSH_DATA (push, 1);
BEGIN_NVC0(push, SUBC_3D(0x19c0), 1);
PUSH_DATA (push, 1);
- BEGIN_NVC0(push, SUBC_3D(0x075c), 1);
- PUSH_DATA (push, 3);
- if (obj_class >= NVE4_3D_CLASS) {
- BEGIN_NVC0(push, SUBC_3D(0x07fc), 1);
- PUSH_DATA (push, 1);
+ if (obj_class < GM107_3D_CLASS) {
+ BEGIN_NVC0(push, SUBC_3D(0x075c), 1);
+ PUSH_DATA (push, 3);
+
+ if (obj_class >= NVE4_3D_CLASS) {
+ BEGIN_NVC0(push, SUBC_3D(0x07fc), 1);
+ PUSH_DATA (push, 1);
+ }
}
/* TODO: find out what software methods 0x1528, 0x1280 and (on nve4) 0x02dc
return nvc0_screen_compute_setup(screen, screen->base.pushbuf);
return 0;
case 0xe0:
+ return nve4_screen_compute_setup(screen, screen->base.pushbuf);
case 0xf0:
case 0x100:
- return nve4_screen_compute_setup(screen, screen->base.pushbuf);
+ case 0x110:
+ return 0;
default:
return -1;
}
uint32_t obj_class;
int ret;
unsigned i;
- union nouveau_bo_config mm_config;
switch (dev->chipset & ~0xf) {
case 0xc0:
case 0xe0:
case 0xf0:
case 0x100:
+ case 0x110:
break;
default:
return NULL;
push->rsvd_kick = 5;
screen->base.vidmem_bindings |= PIPE_BIND_CONSTANT_BUFFER |
- PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER;
+ PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER |
+ PIPE_BIND_COMMAND_ARGS_BUFFER;
screen->base.sysmem_bindings |=
PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER;
switch (dev->chipset & ~0xf) {
+ case 0x110:
case 0x100:
case 0xf0:
obj_class = NVF0_P2MF_CLASS;
BEGIN_NVC0(push, SUBC_2D(NV01_SUBCHAN_OBJECT), 1);
PUSH_DATA (push, screen->eng2d->oclass);
- BEGIN_NVC0(push, NVC0_2D(SINGLE_GPC), 1);
+ BEGIN_NVC0(push, SUBC_2D(NVC0_2D_SINGLE_GPC), 1);
PUSH_DATA (push, 0);
BEGIN_NVC0(push, NVC0_2D(OPERATION), 1);
- PUSH_DATA (push, NVC0_2D_OPERATION_SRCCOPY);
+ PUSH_DATA (push, NV50_2D_OPERATION_SRCCOPY);
BEGIN_NVC0(push, NVC0_2D(CLIP_ENABLE), 1);
PUSH_DATA (push, 0);
BEGIN_NVC0(push, NVC0_2D(COLOR_KEY_ENABLE), 1);
PUSH_DATA (push, 0x3f);
BEGIN_NVC0(push, SUBC_2D(0x0888), 1);
PUSH_DATA (push, 1);
+ BEGIN_NVC0(push, NVC0_2D(COND_MODE), 1);
+ PUSH_DATA (push, NV50_2D_COND_MODE_ALWAYS);
BEGIN_NVC0(push, SUBC_2D(NVC0_GRAPH_NOTIFY_ADDRESS_HIGH), 2);
PUSH_DATAh(push, screen->fence.bo->offset + 16);
PUSH_DATA (push, screen->fence.bo->offset + 16);
switch (dev->chipset & ~0xf) {
+ case 0x110:
+ obj_class = GM107_3D_CLASS;
+ break;
case 0x100:
case 0xf0:
obj_class = NVF0_3D_CLASS;
break;
case 0xe0:
- obj_class = NVE4_3D_CLASS;
+ switch (dev->chipset) {
+ case 0xea:
+ obj_class = NVEA_3D_CLASS;
+ break;
+ default:
+ obj_class = NVE4_3D_CLASS;
+ break;
+ }
break;
case 0xd0:
obj_class = NVC8_3D_CLASS;
PUSH_DATA (push, 0);
BEGIN_NVC0(push, NVC0_3D(LINE_WIDTH_SEPARATE), 1);
PUSH_DATA (push, 1);
- BEGIN_NVC0(push, NVC0_3D(LINE_LAST_PIXEL), 1);
- PUSH_DATA (push, 0);
+ BEGIN_NVC0(push, NVC0_3D(PRIM_RESTART_WITH_DRAW_ARRAYS), 1);
+ PUSH_DATA (push, 1);
BEGIN_NVC0(push, NVC0_3D(BLEND_SEPARATE_ALPHA), 1);
PUSH_DATA (push, 1);
BEGIN_NVC0(push, NVC0_3D(BLEND_ENABLE_COMMON), 1);
BEGIN_NVC0(push, NVC0_3D(LOCAL_BASE), 1);
PUSH_DATA (push, 0);
- ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, NULL,
- &screen->poly_cache);
- if (ret)
- goto fail;
+ if (screen->eng3d->oclass < GM107_3D_CLASS) {
+ ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 20, NULL,
+ &screen->poly_cache);
+ if (ret)
+ goto fail;
- BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
- PUSH_DATAh(push, screen->poly_cache->offset);
- PUSH_DATA (push, screen->poly_cache->offset);
- PUSH_DATA (push, 3);
+ BEGIN_NVC0(push, NVC0_3D(VERTEX_QUARANTINE_ADDRESS_HIGH), 3);
+ PUSH_DATAh(push, screen->poly_cache->offset);
+ PUSH_DATA (push, screen->poly_cache->offset);
+ PUSH_DATA (push, 3);
+ }
ret = nouveau_bo_new(dev, NOUVEAU_BO_VRAM, 1 << 17, 1 << 17, NULL,
&screen->txc);
BEGIN_NVC0(push, NVC0_3D(VIEWPORT_TRANSFORM_EN), 1);
PUSH_DATA (push, 1);
- BEGIN_NVC0(push, NVC0_3D(DEPTH_RANGE_NEAR(0)), 2);
- PUSH_DATAf(push, 0.0f);
- PUSH_DATAf(push, 1.0f);
+ for (i = 0; i < NVC0_MAX_VIEWPORTS; i++) {
+ BEGIN_NVC0(push, NVC0_3D(DEPTH_RANGE_NEAR(i)), 2);
+ PUSH_DATAf(push, 0.0f);
+ PUSH_DATAf(push, 1.0f);
+ }
BEGIN_NVC0(push, NVC0_3D(VIEW_VOLUME_CLIP_CTRL), 1);
PUSH_DATA (push, NVC0_3D_VIEW_VOLUME_CLIP_CTRL_UNK1_UNK1);
/* We use scissors instead of exact view volume clipping,
* so they're always enabled.
*/
- BEGIN_NVC0(push, NVC0_3D(SCISSOR_ENABLE(0)), 3);
- PUSH_DATA (push, 1);
- PUSH_DATA (push, 8192 << 16);
- PUSH_DATA (push, 8192 << 16);
+ for (i = 0; i < NVC0_MAX_VIEWPORTS; i++) {
+ BEGIN_NVC0(push, NVC0_3D(SCISSOR_ENABLE(i)), 3);
+ PUSH_DATA (push, 1);
+ PUSH_DATA (push, 8192 << 16);
+ PUSH_DATA (push, 8192 << 16);
+ }
#define MK_MACRO(m, n) i = nvc0_graph_set_macro(screen, m, i, sizeof(n), n);
i = 0;
- MK_MACRO(NVC0_3D_MACRO_VERTEX_ARRAY_PER_INSTANCE, nvc0_9097_per_instance_bf);
- MK_MACRO(NVC0_3D_MACRO_BLEND_ENABLES, nvc0_9097_blend_enables);
- MK_MACRO(NVC0_3D_MACRO_VERTEX_ARRAY_SELECT, nvc0_9097_vertex_array_select);
- MK_MACRO(NVC0_3D_MACRO_TEP_SELECT, nvc0_9097_tep_select);
- MK_MACRO(NVC0_3D_MACRO_GP_SELECT, nvc0_9097_gp_select);
- MK_MACRO(NVC0_3D_MACRO_POLYGON_MODE_FRONT, nvc0_9097_poly_mode_front);
- MK_MACRO(NVC0_3D_MACRO_POLYGON_MODE_BACK, nvc0_9097_poly_mode_back);
+ MK_MACRO(NVC0_3D_MACRO_VERTEX_ARRAY_PER_INSTANCE, mme9097_per_instance_bf);
+ MK_MACRO(NVC0_3D_MACRO_BLEND_ENABLES, mme9097_blend_enables);
+ MK_MACRO(NVC0_3D_MACRO_VERTEX_ARRAY_SELECT, mme9097_vertex_array_select);
+ MK_MACRO(NVC0_3D_MACRO_TEP_SELECT, mme9097_tep_select);
+ MK_MACRO(NVC0_3D_MACRO_GP_SELECT, mme9097_gp_select);
+ MK_MACRO(NVC0_3D_MACRO_POLYGON_MODE_FRONT, mme9097_poly_mode_front);
+ MK_MACRO(NVC0_3D_MACRO_POLYGON_MODE_BACK, mme9097_poly_mode_back);
+ MK_MACRO(NVC0_3D_MACRO_DRAW_ARRAYS_INDIRECT, mme9097_draw_arrays_indirect);
+ MK_MACRO(NVC0_3D_MACRO_DRAW_ELEMENTS_INDIRECT, mme9097_draw_elts_indirect);
BEGIN_NVC0(push, NVC0_3D(RASTERIZE_ENABLE), 1);
PUSH_DATA (push, 1);
screen->tic.entries = CALLOC(4096, sizeof(void *));
screen->tsc.entries = screen->tic.entries + 2048;
- mm_config.nvc0.tile_mode = 0;
- mm_config.nvc0.memtype = 0xfe0;
- screen->mm_VRAM_fe0 = nouveau_mm_create(dev, NOUVEAU_BO_VRAM, &mm_config);
-
if (!nvc0_blitter_create(screen))
goto fail;
projects / mesa.git / blobdiff