gallium: fix up drivers for edgeflag changes

[mesa.git] / src / gallium / drivers / nv20 / nv20_context.c

diff --git a/src/gallium/drivers/nv20/nv20_context.c b/src/gallium/drivers/nv20/nv20_context.c
index e620166ff556ce00e6d2ea87081834e9b9d00fdc..6a147a4159cebc38685a1d1389871e92901dba01 100644 (file)
--- a/src/gallium/drivers/nv20/nv20_context.c
+++ b/src/gallium/drivers/nv20/nv20_context.c
@@ -1,6 +1,6 @@
 #include "draw/draw_context.h"
 #include "pipe/p_defines.h"
-#include "pipe/p_winsys.h"
+#include "pipe/internal/p_winsys_screen.h"
 
 #include "nv20_context.h"
 #include "nv20_screen.h"
@@ -30,7 +30,7 @@ nv20_destroy(struct pipe_context *pipe)
 static void nv20_init_hwctx(struct nv20_context *nv20)
 {
        struct nv20_screen *screen = nv20->screen;
-       struct nouveau_winsys *nvws = screen->nvws;
+       struct nouveau_channel *chan = screen->base.channel;
        int i;
        float projectionmatrix[16];
        const boolean is_nv25tcl = (nv20->screen->kelvin->grclass == NV25TCL);
@@ -38,11 +38,11 @@ static void nv20_init_hwctx(struct nv20_context *nv20)
        BEGIN_RING(kelvin, NV20TCL_DMA_NOTIFY, 1);
        OUT_RING  (screen->sync->handle);
        BEGIN_RING(kelvin, NV20TCL_DMA_TEXTURE0, 2);
-       OUT_RING  (nvws->channel->vram->handle);
-       OUT_RING  (nvws->channel->gart->handle); /* TEXTURE1 */
+       OUT_RING  (chan->vram->handle);
+       OUT_RING  (chan->gart->handle); /* TEXTURE1 */
        BEGIN_RING(kelvin, NV20TCL_DMA_COLOR, 2);
-       OUT_RING  (nvws->channel->vram->handle);
-       OUT_RING  (nvws->channel->vram->handle); /* ZETA */
+       OUT_RING  (chan->vram->handle);
+       OUT_RING  (chan->vram->handle); /* ZETA */
 
        BEGIN_RING(kelvin, NV20TCL_DMA_QUERY, 1);
        OUT_RING  (0); /* renouveau: beef0351, unique */
@@ -99,9 +99,9 @@ static void nv20_init_hwctx(struct nv20_context *nv20)
                OUT_RING  (3);
 
                BEGIN_RING(kelvin, NV25TCL_DMA_IN_MEMORY9, 1);
-               OUT_RING  (nvws->channel->vram->handle);
+               OUT_RING  (chan->vram->handle);
                BEGIN_RING(kelvin, NV25TCL_DMA_IN_MEMORY8, 1);
-               OUT_RING  (nvws->channel->vram->handle);
+               OUT_RING  (chan->vram->handle);
        }
        BEGIN_RING(kelvin, NV20TCL_DMA_FENCE, 1);
        OUT_RING  (0);  /* renouveau: beef1e10 */
@@ -360,13 +360,13 @@ static void nv20_init_hwctx(struct nv20_context *nv20)
        OUT_RINGf (0.0);
        OUT_RINGf (16777216.0); /* [0, 1] scaled approx to [0, 2^24] */
 
-       BEGIN_RING(kelvin, NV20TCL_VIEWPORT_SCALE0_X, 4);
+       BEGIN_RING(kelvin, NV20TCL_VIEWPORT_TRANSLATE_X, 4);
        OUT_RINGf (0.0); /* x-offset, w/2 + 1.031250 */
        OUT_RINGf (0.0); /* y-offset, h/2 + 0.030762 */
        OUT_RINGf (0.0);
        OUT_RINGf (16777215.0);
 
-       BEGIN_RING(kelvin, NV20TCL_VIEWPORT_SCALE1_X, 4);
+       BEGIN_RING(kelvin, NV20TCL_VIEWPORT_SCALE_X, 4);
        OUT_RINGf (0.0); /* no effect?, w/2 */
        OUT_RINGf (0.0); /* no effect?, h/2 */
        OUT_RINGf (16777215.0 * 0.5);
@@ -375,11 +375,6 @@ static void nv20_init_hwctx(struct nv20_context *nv20)
        FIRE_RING (NULL);
 }
 
-static void
-nv20_set_edgeflags(struct pipe_context *pipe, const unsigned *bitfield)
-{
-}
-
 struct pipe_context *
 nv20_create(struct pipe_screen *pscreen, unsigned pctx_id)
 {
@@ -399,12 +394,14 @@ nv20_create(struct pipe_screen *pscreen, unsigned pctx_id)
        nv20->pipe.winsys = ws;
        nv20->pipe.screen = pscreen;
        nv20->pipe.destroy = nv20_destroy;
-       nv20->pipe.set_edgeflags = nv20_set_edgeflags;
        nv20->pipe.draw_arrays = nv20_draw_arrays;
        nv20->pipe.draw_elements = nv20_draw_elements;
        nv20->pipe.clear = nv20_clear;
        nv20->pipe.flush = nv20_flush;
 
+       nv20->pipe.is_texture_referenced = nouveau_is_texture_referenced;
+       nv20->pipe.is_buffer_referenced = nouveau_is_buffer_referenced;
+
        nv20_init_surface_functions(nv20);
        nv20_init_state_functions(nv20);