Merge branch 'mesa_7_6_branch'

[mesa.git] / src / gallium / drivers / nv30 / nv30_state.c

diff --git a/src/gallium/drivers/nv30/nv30_state.c b/src/gallium/drivers/nv30/nv30_state.c
index ba02413de5c61042c34097cbf56a7c71db6b7fae..b91e972c12336783abd0910564f87e011eaf7b31 100644 (file)
--- a/src/gallium/drivers/nv30/nv30_state.c
+++ b/src/gallium/drivers/nv30/nv30_state.c
@@ -1,9 +1,8 @@
 #include "pipe/p_state.h"
 #include "pipe/p_defines.h"
-#include "pipe/p_util.h"
 #include "pipe/p_inlines.h"
 
-#include "tgsi/util/tgsi_parse.h"
+#include "tgsi/tgsi_parse.h"
 
 #include "nv30_context.h"
 #include "nv30_state.h"
@@ -24,9 +23,10 @@ nv30_blend_state_create(struct pipe_context *pipe,
                               nvgl_blend_func(cso->rgb_src_factor));
                so_data  (so, nvgl_blend_func(cso->alpha_dst_factor) << 16 |
                              nvgl_blend_func(cso->rgb_dst_factor));
+               /* FIXME: Gallium assumes GL_EXT_blend_func_separate.
+                  It is not the case for NV30 */
                so_method(so, rankine, NV34TCL_BLEND_EQUATION, 1);
-               so_data  (so, nvgl_blend_eqn(cso->alpha_func) << 16 |
-                             nvgl_blend_eqn(cso->rgb_func));
+               so_data  (so, nvgl_blend_eqn(cso->rgb_func));
        } else {
                so_method(so, rankine, NV34TCL_BLEND_FUNC_ENABLE, 1);
                so_data  (so, 0);
@@ -51,6 +51,7 @@ nv30_blend_state_create(struct pipe_context *pipe,
        so_data  (so, cso->dither ? 1 : 0);
 
        so_ref(so, &bso->so);
+       so_ref(NULL, &so);
        bso->pipe = *cso;
        return (void *)bso;
 }
@@ -127,8 +128,10 @@ nv30_sampler_state_create(struct pipe_context *pipe,
           in sampler state structure, and set appropriate format in
           nvxx_fragtex_build()
         */
-       if (!cso->normalized_coords)
-               ps->fmt |= (1<<14) /*NV34TCL_TX_FORMAT_RECT*/;
+       /*NV34TCL_TX_FORMAT_RECT*/
+       /*if (!cso->normalized_coords) {
+               ps->fmt |= (1<<14) ;
+       }*/
 
        ps->wrap = ((wrap_mode(cso->wrap_s) << NV34TCL_TX_WRAP_S_SHIFT) |
                    (wrap_mode(cso->wrap_t) << NV34TCL_TX_WRAP_T_SHIFT) |
@@ -197,10 +200,10 @@ nv30_sampler_state_create(struct pipe_context *pipe,
                ps->filt |= (int)(cso->lod_bias * 256.0) & 0x1fff;
 
                limit = CLAMP(cso->max_lod, 0.0, 15.0);
-               ps->en |= (int)(limit * 256.0) << 7;
+               ps->en |= (int)(limit) << 14 /*NV34TCL_TX_ENABLE_MIPMAP_MAX_LOD_SHIFT*/;
 
                limit = CLAMP(cso->min_lod, 0.0, 15.0);
-               ps->en |= (int)(limit * 256.0) << 19;
+               ps->en |= (int)(limit) << 26 /*NV34TCL_TX_ENABLE_MIPMAP_MIN_LOD_SHIFT*/;
        }
 
        if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
@@ -402,6 +405,7 @@ nv30_rasterizer_state_create(struct pipe_context *pipe,
        }
 
        so_ref(so, &rsso->so);
+       so_ref(NULL, &so);
        rsso->pipe = *cso;
        return (void *)rsso;
 }
@@ -442,15 +446,15 @@ nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe,
        so_method(so, rankine, NV34TCL_ALPHA_FUNC_ENABLE, 3);
        so_data  (so, cso->alpha.enabled ? 1 : 0);
        so_data  (so, nvgl_comparison_op(cso->alpha.func));
-       so_data  (so, float_to_ubyte(cso->alpha.ref));
+       so_data  (so, float_to_ubyte(cso->alpha.ref_value));
 
        if (cso->stencil[0].enabled) {
                so_method(so, rankine, NV34TCL_STENCIL_FRONT_ENABLE, 8);
                so_data  (so, cso->stencil[0].enabled ? 1 : 0);
-               so_data  (so, cso->stencil[0].write_mask);
+               so_data  (so, cso->stencil[0].writemask);
                so_data  (so, nvgl_comparison_op(cso->stencil[0].func));
                so_data  (so, cso->stencil[0].ref_value);
-               so_data  (so, cso->stencil[0].value_mask);
+               so_data  (so, cso->stencil[0].valuemask);
                so_data  (so, nvgl_stencil_op(cso->stencil[0].fail_op));
                so_data  (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
                so_data  (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
@@ -462,10 +466,10 @@ nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe,
        if (cso->stencil[1].enabled) {
                so_method(so, rankine, NV34TCL_STENCIL_BACK_ENABLE, 8);
                so_data  (so, cso->stencil[1].enabled ? 1 : 0);
-               so_data  (so, cso->stencil[1].write_mask);
+               so_data  (so, cso->stencil[1].writemask);
                so_data  (so, nvgl_comparison_op(cso->stencil[1].func));
                so_data  (so, cso->stencil[1].ref_value);
-               so_data  (so, cso->stencil[1].value_mask);
+               so_data  (so, cso->stencil[1].valuemask);
                so_data  (so, nvgl_stencil_op(cso->stencil[1].fail_op));
                so_data  (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
                so_data  (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
@@ -475,6 +479,7 @@ nv30_depth_stencil_alpha_state_create(struct pipe_context *pipe,
        }
 
        so_ref(so, &zsaso->so);
+       so_ref(NULL, &so);
        zsaso->pipe = *cso;
        return (void *)zsaso;
 }
@@ -590,7 +595,7 @@ nv30_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
        struct nv30_context *nv30 = nv30_context(pipe);
 
        nv30->constbuf[shader] = buf->buffer;
-       nv30->constbuf_nr[shader] = buf->size / (4 * sizeof(float));
+       nv30->constbuf_nr[shader] = buf->buffer->size / (4 * sizeof(float));
 
        if (shader == PIPE_SHADER_VERTEX) {
                nv30->dirty |= NV30_NEW_VERTPROG;