-#include "pipe/p_context.h"
-#include "pipe/p_state.h"
-#include "pipe/p_inlines.h"
-
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
+ * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
+ * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ *
+ */
+
+#include "util/u_format.h"
+#include "util/u_inlines.h"
+#include "translate/translate.h"
+
+#include "nouveau/nouveau_fence.h"
+#include "nouveau/nv_object.xml.h"
+#include "nv30-40_3d.xml.h"
#include "nv30_context.h"
-#include "nv30_state.h"
-
-#include "nouveau/nouveau_channel.h"
-#include "nouveau/nouveau_pushbuf.h"
-#include "nouveau/nouveau_util.h"
-
-#define FORCE_SWTNL 0
+#include "nv30_format.h"
-static INLINE int
-nv30_vbo_format_to_hw(enum pipe_format pipe, unsigned *fmt, unsigned *ncomp)
+static void
+nv30_emit_vtxattr(struct nv30_context *nv30, struct pipe_vertex_buffer *vb,
+ struct pipe_vertex_element *ve, unsigned attr)
{
- switch (pipe) {
- case PIPE_FORMAT_R32_FLOAT:
- case PIPE_FORMAT_R32G32_FLOAT:
- case PIPE_FORMAT_R32G32B32_FLOAT:
- case PIPE_FORMAT_R32G32B32A32_FLOAT:
- *fmt = NV34TCL_VTXFMT_TYPE_FLOAT;
- break;
- case PIPE_FORMAT_R8_UNORM:
- case PIPE_FORMAT_R8G8_UNORM:
- case PIPE_FORMAT_R8G8B8_UNORM:
- case PIPE_FORMAT_R8G8B8A8_UNORM:
- *fmt = NV34TCL_VTXFMT_TYPE_UBYTE;
- break;
- case PIPE_FORMAT_R16_SSCALED:
- case PIPE_FORMAT_R16G16_SSCALED:
- case PIPE_FORMAT_R16G16B16_SSCALED:
- case PIPE_FORMAT_R16G16B16A16_SSCALED:
- *fmt = NV34TCL_VTXFMT_TYPE_USHORT;
- break;
- default:
- NOUVEAU_ERR("Unknown format %s\n", pf_name(pipe));
- return 1;
- }
-
- switch (pipe) {
- case PIPE_FORMAT_R8_UNORM:
- case PIPE_FORMAT_R32_FLOAT:
- case PIPE_FORMAT_R16_SSCALED:
- *ncomp = 1;
- break;
- case PIPE_FORMAT_R8G8_UNORM:
- case PIPE_FORMAT_R32G32_FLOAT:
- case PIPE_FORMAT_R16G16_SSCALED:
- *ncomp = 2;
- break;
- case PIPE_FORMAT_R8G8B8_UNORM:
- case PIPE_FORMAT_R32G32B32_FLOAT:
- case PIPE_FORMAT_R16G16B16_SSCALED:
- *ncomp = 3;
- break;
- case PIPE_FORMAT_R8G8B8A8_UNORM:
- case PIPE_FORMAT_R32G32B32A32_FLOAT:
- case PIPE_FORMAT_R16G16B16A16_SSCALED:
- *ncomp = 4;
- break;
- default:
- NOUVEAU_ERR("Unknown format %s\n", pf_name(pipe));
- return 1;
- }
-
- return 0;
+ const unsigned nc = util_format_get_nr_components(ve->src_format);
+ struct nouveau_pushbuf *push = nv30->base.pushbuf;
+ struct nv04_resource *res = nv04_resource(vb->buffer);
+ const void *data;
+ float v[4];
+
+ data = nouveau_resource_map_offset(&nv30->base, res, vb->buffer_offset +
+ ve->src_offset, NOUVEAU_BO_RD);
+
+ util_format_read_4f(ve->src_format, v, 0, data, 0, 0, 0, 1, 1);
+
+ switch (nc) {
+ case 4:
+ BEGIN_NV04(push, NV30_3D(VTX_ATTR_4F(attr)), 4);
+ PUSH_DATAf(push, v[0]);
+ PUSH_DATAf(push, v[1]);
+ PUSH_DATAf(push, v[2]);
+ PUSH_DATAf(push, v[3]);
+ break;
+ case 3:
+ BEGIN_NV04(push, NV30_3D(VTX_ATTR_3F(attr)), 3);
+ PUSH_DATAf(push, v[0]);
+ PUSH_DATAf(push, v[1]);
+ PUSH_DATAf(push, v[2]);
+ break;
+ case 2:
+ BEGIN_NV04(push, NV30_3D(VTX_ATTR_2F(attr)), 2);
+ PUSH_DATAf(push, v[0]);
+ PUSH_DATAf(push, v[1]);
+ break;
+ case 1:
+ BEGIN_NV04(push, NV30_3D(VTX_ATTR_1F(attr)), 1);
+ PUSH_DATAf(push, v[0]);
+ break;
+ default:
+ assert(0);
+ break;
+ }
}
-static boolean
-nv30_vbo_set_idxbuf(struct nv30_context *nv30, struct pipe_buffer *ib,
- unsigned ib_size)
+static INLINE void
+nv30_vbuf_range(struct nv30_context *nv30, int vbi,
+ uint32_t *base, uint32_t *size)
{
- struct pipe_screen *pscreen = &nv30->screen->base.base;
- unsigned type;
-
- if (!ib) {
- nv30->idxbuf = NULL;
- nv30->idxbuf_format = 0xdeadbeef;
- return FALSE;
- }
-
- if (!pscreen->get_param(pscreen, NOUVEAU_CAP_HW_IDXBUF) || ib_size == 1)
- return FALSE;
-
- switch (ib_size) {
- case 2:
- type = NV34TCL_IDXBUF_FORMAT_TYPE_U16;
- break;
- case 4:
- type = NV34TCL_IDXBUF_FORMAT_TYPE_U32;
- break;
- default:
- return FALSE;
- }
-
- if (ib != nv30->idxbuf ||
- type != nv30->idxbuf_format) {
- nv30->dirty |= NV30_NEW_ARRAYS;
- nv30->idxbuf = ib;
- nv30->idxbuf_format = type;
- }
-
- return TRUE;
+ assert(nv30->vbo_max_index != ~0);
+ *base = nv30->vbo_min_index * nv30->vtxbuf[vbi].stride;
+ *size = (nv30->vbo_max_index -
+ nv30->vbo_min_index + 1) * nv30->vtxbuf[vbi].stride;
}
-static boolean
-nv30_vbo_static_attrib(struct nv30_context *nv30, struct nouveau_stateobj *so,
- int attrib, struct pipe_vertex_element *ve,
- struct pipe_vertex_buffer *vb)
+static void
+nv30_prevalidate_vbufs(struct nv30_context *nv30)
{
- struct pipe_screen *pscreen = nv30->pipe.screen;
- struct nouveau_grobj *rankine = nv30->screen->rankine;
- unsigned type, ncomp;
- void *map;
-
- if (nv30_vbo_format_to_hw(ve->src_format, &type, &ncomp))
- return FALSE;
-
- map = pipe_buffer_map(pscreen, vb->buffer, PIPE_BUFFER_USAGE_CPU_READ);
- map += vb->buffer_offset + ve->src_offset;
-
- switch (type) {
- case NV34TCL_VTXFMT_TYPE_FLOAT:
- {
- float *v = map;
-
- switch (ncomp) {
- case 4:
- so_method(so, rankine, NV34TCL_VTX_ATTR_4F_X(attrib), 4);
- so_data (so, fui(v[0]));
- so_data (so, fui(v[1]));
- so_data (so, fui(v[2]));
- so_data (so, fui(v[3]));
- break;
- case 3:
- so_method(so, rankine, NV34TCL_VTX_ATTR_3F_X(attrib), 3);
- so_data (so, fui(v[0]));
- so_data (so, fui(v[1]));
- so_data (so, fui(v[2]));
- break;
- case 2:
- so_method(so, rankine, NV34TCL_VTX_ATTR_2F_X(attrib), 2);
- so_data (so, fui(v[0]));
- so_data (so, fui(v[1]));
- break;
- case 1:
- so_method(so, rankine, NV34TCL_VTX_ATTR_1F(attrib), 1);
- so_data (so, fui(v[0]));
- break;
- default:
- pipe_buffer_unmap(pscreen, vb->buffer);
- return FALSE;
- }
- }
- break;
- default:
- pipe_buffer_unmap(pscreen, vb->buffer);
- return FALSE;
- }
-
- pipe_buffer_unmap(pscreen, vb->buffer);
- return TRUE;
+ struct pipe_vertex_buffer *vb;
+ struct nv04_resource *buf;
+ int i;
+ uint32_t base, size;
+
+ nv30->vbo_fifo = nv30->vbo_user = 0;
+
+ for (i = 0; i < nv30->num_vtxbufs; i++) {
+ vb = &nv30->vtxbuf[i];
+ if (!vb->stride || !vb->buffer) /* NOTE: user_buffer not implemented */
+ continue;
+ buf = nv04_resource(vb->buffer);
+
+ /* NOTE: user buffers with temporary storage count as mapped by GPU */
+ if (!nouveau_resource_mapped_by_gpu(vb->buffer)) {
+ if (nv30->vbo_push_hint) {
+ nv30->vbo_fifo = ~0;
+ continue;
+ } else {
+ if (buf->status & NOUVEAU_BUFFER_STATUS_USER_MEMORY) {
+ nv30->vbo_user |= 1 << i;
+ assert(vb->stride > vb->buffer_offset);
+ nv30_vbuf_range(nv30, i, &base, &size);
+ nouveau_user_buffer_upload(&nv30->base, buf, base, size);
+ } else {
+ nouveau_buffer_migrate(&nv30->base, buf, NOUVEAU_BO_GART);
+ }
+ nv30->base.vbo_dirty = TRUE;
+ }
+ }
+ }
}
-void
-nv30_draw_arrays(struct pipe_context *pipe,
- unsigned mode, unsigned start, unsigned count)
+static void
+nv30_update_user_vbufs(struct nv30_context *nv30)
{
- struct nv30_context *nv30 = nv30_context(pipe);
- struct nv30_screen *screen = nv30->screen;
- struct nouveau_channel *chan = screen->base.channel;
- struct nouveau_grobj *rankine = screen->rankine;
- unsigned restart = 0;
-
- nv30_vbo_set_idxbuf(nv30, NULL, 0);
- if (FORCE_SWTNL || !nv30_state_validate(nv30)) {
- /*return nv30_draw_elements_swtnl(pipe, NULL, 0,
- mode, start, count);*/
- return;
- }
-
- while (count) {
- unsigned vc, nr;
-
- nv30_state_emit(nv30);
-
- vc = nouveau_vbuf_split(chan->pushbuf->remaining, 6, 256,
- mode, start, count, &restart);
- if (!vc) {
- FIRE_RING(chan);
- continue;
- }
-
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, nvgl_primitive(mode));
-
- nr = (vc & 0xff);
- if (nr) {
- BEGIN_RING(chan, rankine, NV34TCL_VB_VERTEX_BATCH, 1);
- OUT_RING (chan, ((nr - 1) << 24) | start);
- start += nr;
- }
-
- nr = vc >> 8;
- while (nr) {
- unsigned push = nr > 2047 ? 2047 : nr;
-
- nr -= push;
-
- BEGIN_RING_NI(chan, rankine, NV34TCL_VB_VERTEX_BATCH, push);
- while (push--) {
- OUT_RING(chan, ((0x100 - 1) << 24) | start);
- start += 0x100;
- }
- }
-
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, 0);
-
- count -= vc;
- start = restart;
- }
-
- pipe->flush(pipe, 0, NULL);
- return TRUE;
+ struct nouveau_pushbuf *push = nv30->base.pushbuf;
+ uint32_t base, offset, size;
+ int i;
+ uint32_t written = 0;
+
+ for (i = 0; i < nv30->vertex->num_elements; i++) {
+ struct pipe_vertex_element *ve = &nv30->vertex->pipe[i];
+ const int b = ve->vertex_buffer_index;
+ struct pipe_vertex_buffer *vb = &nv30->vtxbuf[b];
+ struct nv04_resource *buf = nv04_resource(vb->buffer);
+
+ if (!(nv30->vbo_user & (1 << b)))
+ continue;
+
+ if (!vb->stride) {
+ nv30_emit_vtxattr(nv30, vb, ve, i);
+ continue;
+ }
+ nv30_vbuf_range(nv30, b, &base, &size);
+
+ if (!(written & (1 << b))) {
+ written |= 1 << b;
+ nouveau_user_buffer_upload(&nv30->base, buf, base, size);
+ }
+
+ offset = vb->buffer_offset + ve->src_offset;
+
+ BEGIN_NV04(push, NV30_3D(VTXBUF(i)), 1);
+ PUSH_RESRC(push, NV30_3D(VTXBUF(i)), BUFCTX_VTXTMP, buf, offset,
+ NOUVEAU_BO_LOW | NOUVEAU_BO_RD,
+ 0, NV30_3D_VTXBUF_DMA1);
+ }
+ nv30->base.vbo_dirty = TRUE;
}
static INLINE void
-nv30_draw_elements_u08(struct nv30_context *nv30, void *ib,
- unsigned mode, unsigned start, unsigned count)
+nv30_release_user_vbufs(struct nv30_context *nv30)
{
- struct nv30_screen *screen = nv30->screen;
- struct nouveau_channel *chan = screen->base.channel;
- struct nouveau_grobj *rankine = screen->rankine;
-
- while (count) {
- uint8_t *elts = (uint8_t *)ib + start;
- unsigned vc, push, restart = 0;
-
- nv30_state_emit(nv30);
-
- vc = nouveau_vbuf_split(chan->pushbuf->remaining, 6, 2,
- mode, start, count, &restart);
- if (vc == 0) {
- FIRE_RING(chan);
- continue;
- }
- count -= vc;
-
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, nvgl_primitive(mode));
+ uint32_t vbo_user = nv30->vbo_user;
- if (vc & 1) {
- BEGIN_RING(chan, rankine, NV34TCL_VB_ELEMENT_U32, 1);
- OUT_RING (chan, elts[0]);
- elts++; vc--;
- }
+ while (vbo_user) {
+ int i = ffs(vbo_user) - 1;
+ vbo_user &= ~(1 << i);
- while (vc) {
- unsigned i;
+ nouveau_buffer_release_gpu_storage(nv04_resource(nv30->vtxbuf[i].buffer));
+ }
- push = MIN2(vc, 2047 * 2);
-
- BEGIN_RING_NI(chan, rankine, NV34TCL_VB_ELEMENT_U16, push >> 1);
- for (i = 0; i < push; i+=2)
- OUT_RING(chan, (elts[i+1] << 16) | elts[i]);
-
- vc -= push;
- elts += push;
- }
-
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, 0);
-
- start = restart;
- }
+ nouveau_bufctx_reset(nv30->bufctx, BUFCTX_VTXTMP);
}
-static INLINE void
-nv30_draw_elements_u16(struct nv30_context *nv30, void *ib,
- unsigned mode, unsigned start, unsigned count)
+void
+nv30_vbo_validate(struct nv30_context *nv30)
{
- struct nv30_screen *screen = nv30->screen;
- struct nouveau_channel *chan = screen->base.channel;
- struct nouveau_grobj *rankine = screen->rankine;
-
- while (count) {
- uint16_t *elts = (uint16_t *)ib + start;
- unsigned vc, push, restart = 0;
-
- nv30_state_emit(nv30);
-
- vc = nouveau_vbuf_split(chan->pushbuf->remaining, 6, 2,
- mode, start, count, &restart);
- if (vc == 0) {
- FIRE_RING(chan);
- continue;
- }
- count -= vc;
-
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, nvgl_primitive(mode));
-
- if (vc & 1) {
- BEGIN_RING(chan, rankine, NV34TCL_VB_ELEMENT_U32, 1);
- OUT_RING (chan, elts[0]);
- elts++; vc--;
- }
+ struct nouveau_pushbuf *push = nv30->base.pushbuf;
+ struct nv30_vertex_stateobj *vertex = nv30->vertex;
+ struct pipe_vertex_element *ve;
+ struct pipe_vertex_buffer *vb;
+ unsigned i, redefine;
+
+ nouveau_bufctx_reset(nv30->bufctx, BUFCTX_VTXBUF);
+ if (!nv30->vertex || nv30->draw_flags)
+ return;
+
+ if (unlikely(vertex->need_conversion)) {
+ nv30->vbo_fifo = ~0;
+ nv30->vbo_user = 0;
+ } else {
+ nv30_prevalidate_vbufs(nv30);
+ }
+
+ if (!PUSH_SPACE(push, 128))
+ return;
+
+ redefine = MAX2(vertex->num_elements, nv30->state.num_vtxelts);
+ BEGIN_NV04(push, NV30_3D(VTXFMT(0)), redefine);
+
+ for (i = 0; i < vertex->num_elements; i++) {
+ ve = &vertex->pipe[i];
+ vb = &nv30->vtxbuf[ve->vertex_buffer_index];
+
+ if (likely(vb->stride) || nv30->vbo_fifo)
+ PUSH_DATA (push, (vb->stride << 8) | vertex->element[i].state);
+ else
+ PUSH_DATA (push, NV30_3D_VTXFMT_TYPE_V32_FLOAT);
+ }
+
+ for (; i < nv30->state.num_vtxelts; i++) {
+ PUSH_DATA (push, NV30_3D_VTXFMT_TYPE_V32_FLOAT);
+ }
+
+ for (i = 0; i < vertex->num_elements; i++) {
+ struct nv04_resource *res;
+ unsigned offset;
+ boolean user;
+
+ ve = &vertex->pipe[i];
+ vb = &nv30->vtxbuf[ve->vertex_buffer_index];
+ user = (nv30->vbo_user & (1 << ve->vertex_buffer_index));
+
+ res = nv04_resource(vb->buffer);
+
+ if (nv30->vbo_fifo || unlikely(vb->stride == 0)) {
+ if (!nv30->vbo_fifo)
+ nv30_emit_vtxattr(nv30, vb, ve, i);
+ continue;
+ }
+
+ offset = ve->src_offset + vb->buffer_offset;
+
+ BEGIN_NV04(push, NV30_3D(VTXBUF(i)), 1);
+ PUSH_RESRC(push, NV30_3D(VTXBUF(i)), user ? BUFCTX_VTXTMP : BUFCTX_VTXBUF,
+ res, offset, NOUVEAU_BO_LOW | NOUVEAU_BO_RD,
+ 0, NV30_3D_VTXBUF_DMA1);
+ }
+
+ nv30->state.num_vtxelts = vertex->num_elements;
+}
- while (vc) {
- unsigned i;
+static void *
+nv30_vertex_state_create(struct pipe_context *pipe, unsigned num_elements,
+ const struct pipe_vertex_element *elements)
+{
+ struct nv30_vertex_stateobj *so;
+ struct translate_key transkey;
+ unsigned i;
+
+ assert(num_elements);
+
+ so = MALLOC(sizeof(*so) + sizeof(*so->element) * num_elements);
+ if (!so)
+ return NULL;
+ memcpy(so->pipe, elements, sizeof(*elements) * num_elements);
+ so->num_elements = num_elements;
+ so->need_conversion = FALSE;
+
+ transkey.nr_elements = 0;
+ transkey.output_stride = 0;
+
+ for (i = 0; i < num_elements; i++) {
+ const struct pipe_vertex_element *ve = &elements[i];
+ const unsigned vbi = ve->vertex_buffer_index;
+ enum pipe_format fmt = ve->src_format;
+
+ so->element[i].state = nv30_vtxfmt(pipe->screen, fmt)->hw;
+ if (!so->element[i].state) {
+ switch (util_format_get_nr_components(fmt)) {
+ case 1: fmt = PIPE_FORMAT_R32_FLOAT; break;
+ case 2: fmt = PIPE_FORMAT_R32G32_FLOAT; break;
+ case 3: fmt = PIPE_FORMAT_R32G32B32_FLOAT; break;
+ case 4: fmt = PIPE_FORMAT_R32G32B32A32_FLOAT; break;
+ default:
+ assert(0);
+ FREE(so);
+ return NULL;
+ }
+ so->element[i].state = nv30_vtxfmt(pipe->screen, fmt)->hw;
+ so->need_conversion = TRUE;
+ }
+
+ if (1) {
+ unsigned j = transkey.nr_elements++;
+
+ transkey.element[j].type = TRANSLATE_ELEMENT_NORMAL;
+ transkey.element[j].input_format = ve->src_format;
+ transkey.element[j].input_buffer = vbi;
+ transkey.element[j].input_offset = ve->src_offset;
+ transkey.element[j].instance_divisor = ve->instance_divisor;
+
+ transkey.element[j].output_format = fmt;
+ transkey.element[j].output_offset = transkey.output_stride;
+ transkey.output_stride += (util_format_get_stride(fmt, 1) + 3) & ~3;
+ }
+ }
+
+ so->translate = translate_create(&transkey);
+ so->vtx_size = transkey.output_stride / 4;
+ so->vtx_per_packet_max = NV04_PFIFO_MAX_PACKET_LEN / MAX2(so->vtx_size, 1);
+ return so;
+}
- push = MIN2(vc, 2047 * 2);
+static void
+nv30_vertex_state_delete(struct pipe_context *pipe, void *hwcso)
+{
+ struct nv30_vertex_stateobj *so = hwcso;
- BEGIN_RING_NI(chan, rankine, NV34TCL_VB_ELEMENT_U16, push >> 1);
- for (i = 0; i < push; i+=2)
- OUT_RING(chan, (elts[i+1] << 16) | elts[i]);
+ if (so->translate)
+ so->translate->release(so->translate);
+ FREE(hwcso);
+}
- vc -= push;
- elts += push;
- }
+static void
+nv30_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
+{
+ struct nv30_context *nv30 = nv30_context(pipe);
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, 0);
+ nv30->vertex = hwcso;
+ nv30->dirty |= NV30_NEW_VERTEX;
+}
- start = restart;
- }
+static void
+nv30_draw_arrays(struct nv30_context *nv30,
+ unsigned mode, unsigned start, unsigned count,
+ unsigned instance_count)
+{
+ struct nouveau_pushbuf *push = nv30->base.pushbuf;
+ unsigned prim;
+
+ prim = nv30_prim_gl(mode);
+
+ BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+ PUSH_DATA (push, prim);
+ while (count) {
+ const unsigned mpush = 2047 * 256;
+ unsigned npush = (count > mpush) ? mpush : count;
+ unsigned wpush = ((npush + 255) & ~255) >> 8;
+
+ count -= npush;
+
+ BEGIN_NI04(push, NV30_3D(VB_VERTEX_BATCH), wpush);
+ while (npush >= 256) {
+ PUSH_DATA (push, 0xff000000 | start);
+ start += 256;
+ npush -= 256;
+ }
+
+ if (npush)
+ PUSH_DATA (push, ((npush - 1) << 24) | start);
+ }
+ BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+ PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
}
-static INLINE void
-nv30_draw_elements_u32(struct nv30_context *nv30, void *ib,
- unsigned mode, unsigned start, unsigned count)
+static void
+nv30_draw_elements_inline_u08(struct nouveau_pushbuf *push, const uint8_t *map,
+ unsigned start, unsigned count)
{
- struct nv30_screen *screen = nv30->screen;
- struct nouveau_channel *chan = screen->base.channel;
- struct nouveau_grobj *rankine = screen->rankine;
+ map += start;
- while (count) {
- uint32_t *elts = (uint32_t *)ib + start;
- unsigned vc, push, restart = 0;
+ if (count & 1) {
+ BEGIN_NV04(push, NV30_3D(VB_ELEMENT_U32), 1);
+ PUSH_DATA (push, *map++);
+ }
- nv30_state_emit(nv30);
+ count >>= 1;
+ while (count) {
+ unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
+ count -= npush;
- vc = nouveau_vbuf_split(chan->pushbuf->remaining, 5, 1,
- mode, start, count, &restart);
- if (vc == 0) {
- FIRE_RING(chan);
- continue;
- }
- count -= vc;
+ BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);
+ while (npush--) {
+ PUSH_DATA (push, (map[1] << 16) | map[0]);
+ map += 2;
+ }
+ }
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, nvgl_primitive(mode));
+}
- while (vc) {
- push = MIN2(vc, 2047);
+static void
+nv30_draw_elements_inline_u16(struct nouveau_pushbuf *push, const uint16_t *map,
+ unsigned start, unsigned count)
+{
+ map += start;
+
+ if (count & 1) {
+ BEGIN_NV04(push, NV30_3D(VB_ELEMENT_U32), 1);
+ PUSH_DATA (push, *map++);
+ }
+
+ count >>= 1;
+ while (count) {
+ unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
+ count -= npush;
+
+ BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);
+ while (npush--) {
+ PUSH_DATA (push, (map[1] << 16) | map[0]);
+ map += 2;
+ }
+ }
+}
- BEGIN_RING_NI(chan, rankine, NV34TCL_VB_ELEMENT_U32, push);
- OUT_RINGp (chan, elts, push);
+static void
+nv30_draw_elements_inline_u32(struct nouveau_pushbuf *push, const uint32_t *map,
+ unsigned start, unsigned count)
+{
+ map += start;
- vc -= push;
- elts += push;
- }
+ while (count) {
+ const unsigned nr = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, 0);
+ BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U32), nr);
+ PUSH_DATAp(push, map, nr);
- start = restart;
- }
+ map += nr;
+ count -= nr;
+ }
}
static void
-nv30_draw_elements_inline(struct pipe_context *pipe,
- struct pipe_buffer *ib, unsigned ib_size,
- unsigned mode, unsigned start, unsigned count)
+nv30_draw_elements_inline_u32_short(struct nouveau_pushbuf *push,
+ const uint32_t *map,
+ unsigned start, unsigned count)
{
- struct nv30_context *nv30 = nv30_context(pipe);
- struct pipe_screen *pscreen = pipe->screen;
- void *map;
-
- map = pipe_buffer_map(pscreen, ib, PIPE_BUFFER_USAGE_CPU_READ);
- if (!ib) {
- NOUVEAU_ERR("failed mapping ib\n");
- return FALSE;
- }
-
- switch (ib_size) {
- case 1:
- nv30_draw_elements_u08(nv30, map, mode, start, count);
- break;
- case 2:
- nv30_draw_elements_u16(nv30, map, mode, start, count);
- break;
- case 4:
- nv30_draw_elements_u32(nv30, map, mode, start, count);
- break;
- default:
- NOUVEAU_ERR("invalid idxbuf fmt %d\n", ib_size);
- break;
- }
-
- pipe_buffer_unmap(pscreen, ib);
+ map += start;
+
+ if (count & 1) {
+ BEGIN_NV04(push, NV30_3D(VB_ELEMENT_U32), 1);
+ PUSH_DATA (push, *map++);
+ }
+
+ count >>= 1;
+ while (count) {
+ unsigned npush = MIN2(count, NV04_PFIFO_MAX_PACKET_LEN);;
+ count -= npush;
+
+ BEGIN_NI04(push, NV30_3D(VB_ELEMENT_U16), npush);
+ while (npush--) {
+ PUSH_DATA (push, (map[1] << 16) | map[0]);
+ map += 2;
+ }
+ }
}
static void
-nv30_draw_elements_vbo(struct pipe_context *pipe,
- unsigned mode, unsigned start, unsigned count)
+nv30_draw_elements(struct nv30_context *nv30, boolean shorten,
+ unsigned mode, unsigned start, unsigned count,
+ unsigned instance_count, int32_t index_bias)
{
- struct nv30_context *nv30 = nv30_context(pipe);
- struct nv30_screen *screen = nv30->screen;
- struct nouveau_channel *chan = screen->base.channel;
- struct nouveau_grobj *rankine = screen->rankine;
- unsigned restart = 0;
-
- while (count) {
- unsigned nr, vc;
-
- nv30_state_emit(nv30);
-
- vc = nouveau_vbuf_split(chan->pushbuf->remaining, 6, 256,
- mode, start, count, &restart);
- if (!vc) {
- FIRE_RING(chan);
- continue;
- }
-
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, nvgl_primitive(mode));
-
- nr = (vc & 0xff);
- if (nr) {
- BEGIN_RING(chan, rankine, NV34TCL_VB_INDEX_BATCH, 1);
- OUT_RING (chan, ((nr - 1) << 24) | start);
- start += nr;
- }
-
- nr = vc >> 8;
- while (nr) {
- unsigned push = nr > 2047 ? 2047 : nr;
-
- nr -= push;
-
- BEGIN_RING_NI(chan, rankine, NV34TCL_VB_INDEX_BATCH, push);
- while (push--) {
- OUT_RING(chan, ((0x100 - 1) << 24) | start);
- start += 0x100;
- }
- }
-
- BEGIN_RING(chan, rankine, NV34TCL_VERTEX_BEGIN_END, 1);
- OUT_RING (chan, 0);
-
- count -= vc;
- start = restart;
- }
+ const unsigned index_size = nv30->idxbuf.index_size;
+ struct nouveau_pushbuf *push = nv30->base.pushbuf;
+ struct nouveau_object *eng3d = nv30->screen->eng3d;
+ unsigned prim = nv30_prim_gl(mode);
+
+#if 0 /*XXX*/
+ if (index_bias != nv30->state.index_bias) {
+ BEGIN_NV04(push, NV30_3D(VB_ELEMENT_BASE), 1);
+ PUSH_DATA (push, index_bias);
+ nv30->state.index_bias = index_bias;
+ }
+#endif
+
+ if (eng3d->oclass == NV40_3D_CLASS && index_size > 1 &&
+ nv30->idxbuf.buffer) {
+ struct nv04_resource *res = nv04_resource(nv30->idxbuf.buffer);
+ unsigned offset = nv30->idxbuf.offset;
+
+ assert(nouveau_resource_mapped_by_gpu(&res->base));
+
+ BEGIN_NV04(push, NV30_3D(IDXBUF_OFFSET), 2);
+ PUSH_RESRC(push, NV30_3D(IDXBUF_OFFSET), BUFCTX_IDXBUF, res, offset,
+ NOUVEAU_BO_LOW | NOUVEAU_BO_RD, 0, 0);
+ PUSH_MTHD (push, NV30_3D(IDXBUF_FORMAT), BUFCTX_IDXBUF, res->bo,
+ (index_size == 2) ? 0x00000010 : 0x00000000,
+ res->domain | NOUVEAU_BO_RD,
+ 0, NV30_3D_IDXBUF_FORMAT_DMA1);
+ BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+ PUSH_DATA (push, prim);
+ while (count) {
+ const unsigned mpush = 2047 * 256;
+ unsigned npush = (count > mpush) ? mpush : count;
+ unsigned wpush = ((npush + 255) & ~255) >> 8;
+
+ count -= npush;
+
+ BEGIN_NI04(push, NV30_3D(VB_INDEX_BATCH), wpush);
+ while (npush >= 256) {
+ PUSH_DATA (push, 0xff000000 | start);
+ start += 256;
+ npush -= 256;
+ }
+
+ if (npush)
+ PUSH_DATA (push, ((npush - 1) << 24) | start);
+ }
+ BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+ PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
+ PUSH_RESET(push, BUFCTX_IDXBUF);
+ } else {
+ const void *data;
+ if (nv30->idxbuf.buffer)
+ data = nouveau_resource_map_offset(&nv30->base,
+ nv04_resource(nv30->idxbuf.buffer),
+ nv30->idxbuf.offset, NOUVEAU_BO_RD);
+ else
+ data = nv30->idxbuf.user_buffer;
+ if (!data)
+ return;
+
+ BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+ PUSH_DATA (push, prim);
+ switch (index_size) {
+ case 1:
+ nv30_draw_elements_inline_u08(push, data, start, count);
+ break;
+ case 2:
+ nv30_draw_elements_inline_u16(push, data, start, count);
+ break;
+ case 4:
+ if (shorten)
+ nv30_draw_elements_inline_u32_short(push, data, start, count);
+ else
+ nv30_draw_elements_inline_u32(push, data, start, count);
+ break;
+ default:
+ assert(0);
+ return;
+ }
+ BEGIN_NV04(push, NV30_3D(VERTEX_BEGIN_END), 1);
+ PUSH_DATA (push, NV30_3D_VERTEX_BEGIN_END_STOP);
+ }
}
-void
-nv30_draw_elements(struct pipe_context *pipe,
- struct pipe_buffer *indexBuffer, unsigned indexSize,
- unsigned mode, unsigned start, unsigned count)
+static void
+nv30_draw_vbo(struct pipe_context *pipe, const struct pipe_draw_info *info)
{
- struct nv30_context *nv30 = nv30_context(pipe);
- boolean idxbuf;
-
- idxbuf = nv30_vbo_set_idxbuf(nv30, indexBuffer, indexSize);
- if (FORCE_SWTNL || !nv30_state_validate(nv30)) {
- /*return nv30_draw_elements_swtnl(pipe, NULL, 0,
- mode, start, count);*/
- return;
- }
-
- if (idxbuf) {
- nv30_draw_elements_vbo(pipe, mode, start, count);
- } else {
- nv30_draw_elements_inline(pipe, indexBuffer, indexSize,
- mode, start, count);
- }
-
- pipe->flush(pipe, 0, NULL);
+ struct nv30_context *nv30 = nv30_context(pipe);
+ struct nouveau_pushbuf *push = nv30->base.pushbuf;
+
+ /* For picking only a few vertices from a large user buffer, push is better,
+ * if index count is larger and we expect repeated vertices, suggest upload.
+ */
+ nv30->vbo_push_hint = /* the 64 is heuristic */
+ !(info->indexed &&
+ ((info->max_index - info->min_index + 64) < info->count));
+
+ nv30->vbo_min_index = info->min_index;
+ nv30->vbo_max_index = info->max_index;
+
+ if (nv30->vbo_push_hint != !!nv30->vbo_fifo)
+ nv30->dirty |= NV30_NEW_ARRAYS;
+
+ push->user_priv = &nv30->bufctx;
+ if (nv30->vbo_user && !(nv30->dirty & (NV30_NEW_VERTEX | NV30_NEW_ARRAYS)))
+ nv30_update_user_vbufs(nv30);
+
+ nv30_state_validate(nv30, TRUE);
+ if (nv30->draw_flags) {
+ nv30_render_vbo(pipe, info);
+ return;
+ } else
+ if (nv30->vbo_fifo) {
+ nv30_push_vbo(nv30, info);
+ return;
+ }
+
+ if (nv30->base.vbo_dirty) {
+ BEGIN_NV04(push, NV30_3D(VTX_CACHE_INVALIDATE_1710), 1);
+ PUSH_DATA (push, 0);
+ nv30->base.vbo_dirty = FALSE;
+ }
+
+ if (!info->indexed) {
+ nv30_draw_arrays(nv30,
+ info->mode, info->start, info->count,
+ info->instance_count);
+ } else {
+ boolean shorten = info->max_index <= 65535;
+
+ if (info->primitive_restart != nv30->state.prim_restart) {
+ if (info->primitive_restart) {
+ BEGIN_NV04(push, NV40_3D(PRIM_RESTART_ENABLE), 2);
+ PUSH_DATA (push, 1);
+ PUSH_DATA (push, info->restart_index);
+
+ if (info->restart_index > 65535)
+ shorten = FALSE;
+ } else {
+ BEGIN_NV04(push, NV40_3D(PRIM_RESTART_ENABLE), 1);
+ PUSH_DATA (push, 0);
+ }
+ nv30->state.prim_restart = info->primitive_restart;
+ } else
+ if (info->primitive_restart) {
+ BEGIN_NV04(push, NV40_3D(PRIM_RESTART_INDEX), 1);
+ PUSH_DATA (push, info->restart_index);
+
+ if (info->restart_index > 65535)
+ shorten = FALSE;
+ }
+
+ nv30_draw_elements(nv30, shorten,
+ info->mode, info->start, info->count,
+ info->instance_count, info->index_bias);
+ }
+
+ nv30_state_release(nv30);
+ nv30_release_user_vbufs(nv30);
}
-static boolean
-nv30_vbo_validate(struct nv30_context *nv30)
+void
+nv30_vbo_init(struct pipe_context *pipe)
{
- struct nouveau_stateobj *vtxbuf, *vtxfmt, *sattr = NULL;
- struct nouveau_grobj *rankine = nv30->screen->rankine;
- struct pipe_buffer *ib = nv30->idxbuf;
- unsigned ib_format = nv30->idxbuf_format;
- unsigned vb_flags = NOUVEAU_BO_VRAM | NOUVEAU_BO_GART | NOUVEAU_BO_RD;
- int hw;
-
- vtxbuf = so_new(3, 17, 18);
- so_method(vtxbuf, rankine, NV34TCL_VTXBUF_ADDRESS(0), nv30->vtxelt_nr);
- vtxfmt = so_new(1, 16, 0);
- so_method(vtxfmt, rankine, NV34TCL_VTXFMT(0), nv30->vtxelt_nr);
-
- for (hw = 0; hw < nv30->vtxelt_nr; hw++) {
- struct pipe_vertex_element *ve;
- struct pipe_vertex_buffer *vb;
- unsigned type, ncomp;
-
- ve = &nv30->vtxelt[hw];
- vb = &nv30->vtxbuf[ve->vertex_buffer_index];
-
- if (!vb->stride) {
- if (!sattr)
- sattr = so_new(16, 16 * 4, 0);
-
- if (nv30_vbo_static_attrib(nv30, sattr, hw, ve, vb)) {
- so_data(vtxbuf, 0);
- so_data(vtxfmt, NV34TCL_VTXFMT_TYPE_FLOAT);
- continue;
- }
- }
-
- if (nv30_vbo_format_to_hw(ve->src_format, &type, &ncomp)) {
- /*nv30->fallback_swtnl |= NV30_NEW_ARRAYS;*/
- so_ref(NULL, &vtxbuf);
- so_ref(NULL, &vtxfmt);
- return FALSE;
- }
-
- so_reloc(vtxbuf, nouveau_bo(vb->buffer), vb->buffer_offset +
- ve->src_offset, vb_flags | NOUVEAU_BO_LOW |
- NOUVEAU_BO_OR, 0, NV34TCL_VTXBUF_ADDRESS_DMA1);
- so_data (vtxfmt, ((vb->stride << NV34TCL_VTXFMT_STRIDE_SHIFT) |
- (ncomp << NV34TCL_VTXFMT_SIZE_SHIFT) | type));
- }
-
- if (ib) {
- struct nouveau_bo *bo = nouveau_bo(ib);
-
- so_method(vtxbuf, rankine, NV34TCL_IDXBUF_ADDRESS, 2);
- so_reloc (vtxbuf, bo, 0, vb_flags | NOUVEAU_BO_LOW, 0, 0);
- so_reloc (vtxbuf, bo, ib_format, vb_flags | NOUVEAU_BO_OR,
- 0, NV34TCL_IDXBUF_FORMAT_DMA1);
- }
-
- so_method(vtxbuf, rankine, 0x1710, 1);
- so_data (vtxbuf, 0);
-
- so_ref(vtxbuf, &nv30->state.hw[NV30_STATE_VTXBUF]);
- so_ref(NULL, &vtxbuf);
- nv30->state.dirty |= (1ULL << NV30_STATE_VTXBUF);
- so_ref(vtxfmt, &nv30->state.hw[NV30_STATE_VTXFMT]);
- so_ref(NULL, &vtxfmt);
- nv30->state.dirty |= (1ULL << NV30_STATE_VTXFMT);
- so_ref(sattr, &nv30->state.hw[NV30_STATE_VTXATTR]);
- so_ref(NULL, &sattr);
- nv30->state.dirty |= (1ULL << NV30_STATE_VTXATTR);
- return FALSE;
+ pipe->create_vertex_elements_state = nv30_vertex_state_create;
+ pipe->delete_vertex_elements_state = nv30_vertex_state_delete;
+ pipe->bind_vertex_elements_state = nv30_vertex_state_bind;
+ pipe->draw_vbo = nv30_draw_vbo;
}
-
-struct nv30_state_entry nv30_state_vbo = {
- .validate = nv30_vbo_validate,
- .dirty = {
- .pipe = NV30_NEW_ARRAYS,
- .hw = 0,
- }
-};
projects / mesa.git / blobdiff