r300-gallium: Stubs for vertex shaders.

[mesa.git] / src / gallium / drivers / nv40 / nv40_screen.c

diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c
index 0e1df89ee8575d0c2cbb935b6b0e3ed71d098c01..0d4baefaea3dc2194c160aaa51caab00b44094df 100644 (file)
--- a/src/gallium/drivers/nv40/nv40_screen.c
+++ b/src/gallium/drivers/nv40/nv40_screen.c
@@ -1,5 +1,5 @@
 #include "pipe/p_screen.h"
-#include "pipe/p_util.h"
+#include "util/u_simple_screen.h"
 
 #include "nv40_context.h"
 #include "nv40_screen.h"
@@ -60,6 +60,8 @@ nv40_screen_get_param(struct pipe_screen *pscreen, int param)
        case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
        case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
                return 1;
+       case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
+               return 0; /* We have 4 - but unsupported currently */
        case NOUVEAU_CAP_HW_VTXBUF:
                return 1;
        case NOUVEAU_CAP_HW_IDXBUF:
@@ -134,26 +136,12 @@ nv40_screen_surface_format_supported(struct pipe_screen *pscreen,
        return FALSE;
 }
 
-static void *
-nv40_surface_map(struct pipe_screen *screen, struct pipe_surface *surface,
-                unsigned flags )
+static struct pipe_buffer *
+nv40_surface_buffer(struct pipe_surface *surf)
 {
-       struct pipe_winsys *ws = screen->winsys;
-       void *map;
+       struct nv40_miptree *mt = (struct nv40_miptree *)surf->texture;
 
-       map = ws->buffer_map(ws, surface->buffer, flags);
-       if (!map)
-               return NULL;
-
-       return map + surface->offset;
-}
-
-static void
-nv40_surface_unmap(struct pipe_screen *screen, struct pipe_surface *surface)
-{
-       struct pipe_winsys *ws = screen->winsys;
-
-       ws->buffer_unmap(ws, surface->buffer);
+       return mt->buffer;
 }
 
 static void
@@ -177,7 +165,7 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
 {
        struct nv40_screen *screen = CALLOC_STRUCT(nv40_screen);
        struct nouveau_stateobj *so;
-       unsigned curie_class;
+       unsigned curie_class = 0;
        unsigned chipset = nvws->channel->device->chipset;
        int ret;
 
@@ -185,6 +173,10 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
                return NULL;
        screen->nvws = nvws;
 
+       /* 2D engine setup */
+       screen->eng2d = nv04_surface_2d_init(nvws);
+       screen->eng2d->buf = nv40_surface_buffer;
+
        /* 3D object */
        switch (chipset & 0xf0) {
        case 0x40:
@@ -198,8 +190,6 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
                if (NV6X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
                        curie_class = NV44TCL;
                break;
-       default:
-               break;
        }
 
        if (!curie_class) {
@@ -305,10 +295,9 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
 
        screen->pipe.is_format_supported = nv40_screen_surface_format_supported;
 
-       screen->pipe.surface_map = nv40_surface_map;
-       screen->pipe.surface_unmap = nv40_surface_unmap;
-
        nv40_screen_init_miptree_functions(&screen->pipe);
+       nv40_screen_init_transfer_functions(&screen->pipe);
+       u_simple_screen_init(&screen->pipe);
 
        return &screen->pipe;
 }