r300-gallium: Stubs for vertex shaders.

[mesa.git] / src / gallium / drivers / nv40 / nv40_screen.c

diff --git a/src/gallium/drivers/nv40/nv40_screen.c b/src/gallium/drivers/nv40/nv40_screen.c
index c64c3b1c39da4e8cd06b2ca09be619ba3e57d286..0d4baefaea3dc2194c160aaa51caab00b44094df 100644 (file)
--- a/src/gallium/drivers/nv40/nv40_screen.c
+++ b/src/gallium/drivers/nv40/nv40_screen.c
@@ -1,5 +1,5 @@
 #include "pipe/p_screen.h"
-#include "pipe/p_util.h"
+#include "util/u_simple_screen.h"
 
 #include "nv40_context.h"
 #include "nv40_screen.h"
@@ -12,9 +12,10 @@ static const char *
 nv40_screen_get_name(struct pipe_screen *pscreen)
 {
        struct nv40_screen *screen = nv40_screen(pscreen);
+       struct nouveau_device *dev = screen->nvws->channel->device;
        static char buffer[128];
 
-       snprintf(buffer, sizeof(buffer), "NV%02X", screen->chipset);
+       snprintf(buffer, sizeof(buffer), "NV%02X", dev->chipset);
        return buffer;
 }
 
@@ -56,6 +57,11 @@ nv40_screen_get_param(struct pipe_screen *pscreen, int param)
                return 10;
        case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
                return 13;
+       case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
+       case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
+               return 1;
+       case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
+               return 0; /* We have 4 - but unsupported currently */
        case NOUVEAU_CAP_HW_VTXBUF:
                return 1;
        case NOUVEAU_CAP_HW_IDXBUF:
@@ -82,8 +88,6 @@ nv40_screen_get_paramf(struct pipe_screen *pscreen, int param)
                return 16.0;
        case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
                return 16.0;
-       case PIPE_CAP_BITMAP_TEXCOORD_BIAS:
-               return 0.0;
        default:
                NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
                return 0.0;
@@ -92,10 +96,11 @@ nv40_screen_get_paramf(struct pipe_screen *pscreen, int param)
 
 static boolean
 nv40_screen_surface_format_supported(struct pipe_screen *pscreen,
-                                    enum pipe_format format, uint type)
+                                    enum pipe_format format,
+                                    enum pipe_texture_target target,
+                                    unsigned tex_usage, unsigned geom_flags)
 {
-       switch (type) {
-       case PIPE_SURFACE:
+       if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
                switch (format) {
                case PIPE_FORMAT_A8R8G8B8_UNORM:
                case PIPE_FORMAT_R5G6B5_UNORM: 
@@ -105,17 +110,17 @@ nv40_screen_surface_format_supported(struct pipe_screen *pscreen,
                default:
                        break;
                }
-               break;
-       case PIPE_TEXTURE:
+       } else {
                switch (format) {
                case PIPE_FORMAT_A8R8G8B8_UNORM:
                case PIPE_FORMAT_A1R5G5B5_UNORM:
                case PIPE_FORMAT_A4R4G4B4_UNORM:
-               case PIPE_FORMAT_R5G6B5_UNORM: 
-               case PIPE_FORMAT_U_L8:
-               case PIPE_FORMAT_U_A8:
-               case PIPE_FORMAT_U_I8:
-               case PIPE_FORMAT_U_A8_L8:
+               case PIPE_FORMAT_R5G6B5_UNORM:
+               case PIPE_FORMAT_R16_SNORM:
+               case PIPE_FORMAT_L8_UNORM:
+               case PIPE_FORMAT_A8_UNORM:
+               case PIPE_FORMAT_I8_UNORM:
+               case PIPE_FORMAT_A8L8_UNORM:
                case PIPE_FORMAT_Z16_UNORM:
                case PIPE_FORMAT_Z24S8_UNORM:
                case PIPE_FORMAT_DXT1_RGB:
@@ -126,14 +131,19 @@ nv40_screen_surface_format_supported(struct pipe_screen *pscreen,
                default:
                        break;
                }
-               break;
-       default:
-               assert(0);
-       };
+       }
 
        return FALSE;
 }
 
+static struct pipe_buffer *
+nv40_surface_buffer(struct pipe_surface *surf)
+{
+       struct nv40_miptree *mt = (struct nv40_miptree *)surf->texture;
+
+       return mt->buffer;
+}
+
 static void
 nv40_screen_destroy(struct pipe_screen *pscreen)
 {
@@ -151,19 +161,22 @@ nv40_screen_destroy(struct pipe_screen *pscreen)
 }
 
 struct pipe_screen *
-nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
-                  unsigned chipset)
+nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
 {
        struct nv40_screen *screen = CALLOC_STRUCT(nv40_screen);
        struct nouveau_stateobj *so;
-       unsigned curie_class;
+       unsigned curie_class = 0;
+       unsigned chipset = nvws->channel->device->chipset;
        int ret;
 
        if (!screen)
                return NULL;
-       screen->chipset = chipset;
        screen->nvws = nvws;
 
+       /* 2D engine setup */
+       screen->eng2d = nv04_surface_2d_init(nvws);
+       screen->eng2d->buf = nv40_surface_buffer;
+
        /* 3D object */
        switch (chipset & 0xf0) {
        case 0x40:
@@ -177,8 +190,6 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
                if (NV6X_GRCLASS4497_CHIPSETS & (1 << (chipset & 0x0f)))
                        curie_class = NV44TCL;
                break;
-       default:
-               break;
        }
 
        if (!curie_class) {
@@ -285,6 +296,8 @@ nv40_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws,
        screen->pipe.is_format_supported = nv40_screen_surface_format_supported;
 
        nv40_screen_init_miptree_functions(&screen->pipe);
+       nv40_screen_init_transfer_functions(&screen->pipe);
+       u_simple_screen_init(&screen->pipe);
 
        return &screen->pipe;
 }