0, 0, 0, 8, 8, 4, 4, 4, 8, 4, 4, 8, 8, 8, 8, 8, /* 15 */
8, 8, 8, 4, 0, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 4, /* 31 */
8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 8, 4, /* 47 */
- 4, 8, 8, 8, 8, 8, 0, 0, 8
+ 4, 8, 8, 8, 8, 8, 0, 0, 8, 8
};
unsigned
set_pred(pc, i);
- if (i->src[1])
- set_a16_bits(pc, SREG(i->src[1])->id + 1);
+ if (s && i->src[0])
+ set_a16_bits(pc, SREG(i->src[0])->id);
}
static void
new_fixup(pc, NV50_FIXUP_CODE_RELOC, 0, pos, 0xffff << 11, 9);
new_fixup(pc, NV50_FIXUP_CODE_RELOC, 1, pos, 0x3f << 14, -4);
- pc->emit[0] |= (pos / 4) << 11;
+ pc->emit[0] |= ((pos >> 2) & 0xffff) << 11;
+ pc->emit[1] |= ((pos >> 18) & 0x003f) << 14;
}
}
}
if (pc->emit[1] == CVT_F32_F32 &&
(nvi->opcode == NV_OP_CEIL || nvi->opcode == NV_OP_FLOOR ||
- nvi->opcode == NV_OP_TRUNC))
+ nvi->opcode == NV_OP_TRUNC || nvi->opcode == NV_OP_ROUND))
pc->emit[1] |= CVT_RI;
switch (nvi->opcode) {
case NV_OP_CEIL: pc->emit[1] |= CVT_CEIL; break;
case NV_OP_FLOOR: pc->emit[1] |= CVT_FLOOR; break;
case NV_OP_TRUNC: pc->emit[1] |= CVT_TRUNC; break;
+ case NV_OP_ROUND: pc->emit[1] |= CVT_RN; break;
case NV_OP_ABS: pc->emit[1] |= CVT_ABS; break;
case NV_OP_SAT: pc->emit[1] |= CVT_SAT; break;
case NV_OP_CEIL:
case NV_OP_FLOOR:
case NV_OP_TRUNC:
+ case NV_OP_ROUND:
emit_cvt(pc, i);
break;
case NV_OP_DFDX: