#include "tgsi/tgsi_util.h"
#include "nv50_context.h"
+#include "nv50_transfer.h"
#define NV50_SU_MAX_TEMP 127
#define NV50_SU_MAX_ADDR 4
emit_interp(struct nv50_pc *pc, struct nv50_reg *dst, struct nv50_reg *iv,
unsigned mode)
{
- assert(dst->rhw != -1);
struct nv50_program_exec *e = exec(pc);
+ assert(dst->rhw != -1);
e->inst[0] |= 0x80000000;
set_dst(pc, dst, e);
struct nv50_reg *zero = alloc_immd(pc, 0.0);
struct nv50_reg *neg128 = alloc_immd(pc, -127.999999);
struct nv50_reg *pos128 = alloc_immd(pc, 127.999999);
- struct nv50_reg *tmp[4];
+ struct nv50_reg *tmp[4] = { 0 };
boolean allow32 = pc->allow32;
pc->allow32 = FALSE;
const struct tgsi_full_instruction *inst)
{
struct nv50_reg *rdst[4], *dst[4], *brdc, *src[3][4], *temp;
- unsigned mask, sat, unit;
+ unsigned mask, sat, unit = 0;
int i, c;
mask = inst->Dst[0].Register.WriteMask;
if (pc->p->type == PIPE_SHADER_FRAGMENT)
nv50_fp_move_results(pc);
- /* last insn must be long so it can have the exit bit set */
- if (!is_long(pc->p->exec_tail))
- convert_to_long(pc, pc->p->exec_tail);
- else
- if (is_immd(pc->p->exec_tail) ||
+ if (!pc->p->exec_tail ||
+ is_immd(pc->p->exec_tail) ||
is_join(pc->p->exec_tail) ||
is_control_flow(pc->p->exec_tail))
emit_nop(pc);
+ /* last insn must be long so it can have the exit bit set */
+ if (!is_long(pc->p->exec_tail))
+ convert_to_long(pc, pc->p->exec_tail);
+
pc->p->exec_tail->inst[1] |= 1; /* set exit bit */
terminate_mbb(pc);
struct tgsi_parse_context tp;
struct nv50_program *p = pc->p;
boolean ret = FALSE;
- unsigned i, c, instance_id, vertex_id, flat_nr = 0;
+ unsigned i, c, instance_id = 0, vertex_id = 0, flat_nr = 0;
tgsi_parse_init(&tp, pc->p->pipe.tokens);
while (!tgsi_parse_end_of_tokens(&tp)) {
copy_semantic_info(p);
} else
if (p->type == PIPE_SHADER_FRAGMENT) {
- int rid, aid;
+ int rid = 0, aid;
unsigned n = 0, m = pc->attr_nr - flat_nr;
pc->allow32 = TRUE;
for (rid = 0; i < pc->result_nr * 4; i++)
pc->result[i].rhw = rid++;
if (p->info.writes_z)
- pc->result[2].rhw = rid;
+ pc->result[2].rhw = rid++;
p->cfg.high_result = rid;
static void
nv50_program_validate_data(struct nv50_context *nv50, struct nv50_program *p)
{
- struct pipe_screen *pscreen = nv50->pipe.screen;
+ struct pipe_context *pipe = &nv50->pipe;
+ struct pipe_transfer *transfer;
if (!p->data[0] && p->immd_nr) {
struct nouveau_resource *heap = nv50->screen->immd_heap[0];
if (p->param_nr) {
unsigned cb;
- uint32_t *map = pipe_buffer_map(pscreen,
+ uint32_t *map = pipe_buffer_map(pipe,
nv50->constbuf[p->type],
- PIPE_BUFFER_USAGE_CPU_READ);
+ PIPE_TRANSFER_READ,
+ &transfer);
switch (p->type) {
case PIPE_SHADER_GEOMETRY: cb = NV50_CB_PGP; break;
case PIPE_SHADER_FRAGMENT: cb = NV50_CB_PFP; break;
}
nv50_program_upload_data(nv50, map, 0, p->param_nr, cb);
- pipe_buffer_unmap(pscreen, nv50->constbuf[p->type]);
+ pipe_buffer_unmap(pipe, nv50->constbuf[p->type],
+ transfer);
}
}
int i, j, c;
for (i = 0; i < gp->cfg.in_nr; ++i) {
- uint8_t oid, mv = 0, mg = gp->cfg.in[i].mask;
+ uint8_t oid = 0, mv = 0, mg = gp->cfg.in[i].mask;
for (j = 0; j < vp->cfg.out_nr; ++j) {
if (vp->cfg.out[j].sn == gp->cfg.in[i].sn &&