nvc0: implement MP performance counters for nvc0:nvd9

[mesa.git] / src / gallium / drivers / nv50 / nv50_screen.h

diff --git a/src/gallium/drivers/nv50/nv50_screen.h b/src/gallium/drivers/nv50/nv50_screen.h
index cb7e956cd84b1ec7b86f410c5d031b840c533b7d..2e8af436e3682739a842a2d409a92f7739e8c7ea 100644 (file)
--- a/src/gallium/drivers/nv50/nv50_screen.h
+++ b/src/gallium/drivers/nv50/nv50_screen.h
@@ -1,27 +1,27 @@
 #ifndef __NV50_SCREEN_H__
 #define __NV50_SCREEN_H__
 
-#define NOUVEAU_NVC0
 #include "nouveau/nouveau_screen.h"
 #include "nouveau/nouveau_fence.h"
 #include "nouveau/nouveau_mm.h"
-#undef NOUVEAU_NVC0
+#include "nouveau/nouveau_heap.h"
+
 #include "nv50_winsys.h"
 #include "nv50_stateobj.h"
 
 #define NV50_TIC_MAX_ENTRIES 2048
 #define NV50_TSC_MAX_ENTRIES 2048
 
+/* doesn't count reserved slots (for auxiliary constants, immediates, etc.) */
+#define NV50_MAX_PIPE_CONSTBUFS 14
+
 struct nv50_context;
 
 #define NV50_CODE_BO_SIZE_LOG2 19
 
-#define NV50_SCRATCH_SIZE (2 << 20)
-#define NV50_SCRATCH_NR_BUFFERS 2
-
 #define NV50_SCREEN_RESIDENT_BO_COUNT 5
 
-struct nv50_blitctx;
+struct nv50_blitter;
 
 struct nv50_screen {
    struct nouveau_screen base;
@@ -34,13 +34,16 @@ struct nv50_screen {
    struct nouveau_bo *stack_bo;
    struct nouveau_bo *tls_bo;
 
-   uint64_t tls_size;
+   unsigned TPs;
+   unsigned MPsInTP;
+   unsigned max_tls_space;
+   unsigned cur_tls_space;
 
-   struct nouveau_resource *vp_code_heap;
-   struct nouveau_resource *gp_code_heap;
-   struct nouveau_resource *fp_code_heap;
+   struct nouveau_heap *vp_code_heap;
+   struct nouveau_heap *gp_code_heap;
+   struct nouveau_heap *fp_code_heap;
 
-   struct nv50_blitctx *blitctx;
+   struct nv50_blitter *blitter;
 
    struct {
       void **entries;
@@ -59,13 +62,11 @@ struct nv50_screen {
       struct nouveau_bo *bo;
    } fence;
 
-   struct nouveau_notifier *sync;
+   struct nouveau_object *sync;
 
-   struct nouveau_mman *mm_VRAM_fe0;
-
-   struct nouveau_grobj *tesla;
-   struct nouveau_grobj *eng2d;
-   struct nouveau_grobj *m2mf;
+   struct nouveau_object *tesla;
+   struct nouveau_object *eng2d;
+   struct nouveau_object *m2mf;
 };
 
 static INLINE struct nv50_screen *
@@ -74,9 +75,8 @@ nv50_screen(struct pipe_screen *screen)
    return (struct nv50_screen *)screen;
 }
 
-boolean nv50_blitctx_create(struct nv50_screen *);
-
-void nv50_screen_make_buffers_resident(struct nv50_screen *);
+boolean nv50_blitter_create(struct nv50_screen *);
+void nv50_blitter_destroy(struct nv50_screen *);
 
 int nv50_screen_tic_alloc(struct nv50_screen *, void *);
 int nv50_screen_tsc_alloc(struct nv50_screen *, void *);
@@ -88,7 +88,6 @@ nv50_resource_fence(struct nv04_resource *res, uint32_t flags)
 
    if (res->mm) {
       nouveau_fence_ref(screen->base.fence.current, &res->fence);
-
       if (flags & NOUVEAU_BO_WR)
          nouveau_fence_ref(screen->base.fence.current, &res->fence_wr);
    }
@@ -97,13 +96,10 @@ nv50_resource_fence(struct nv04_resource *res, uint32_t flags)
 static INLINE void
 nv50_resource_validate(struct nv04_resource *res, uint32_t flags)
 {
-   struct nv50_screen *screen = nv50_screen(res->base.screen);
-
    if (likely(res->bo)) {
-      nouveau_bo_validate(screen->base.channel, res->bo, flags);
-
       if (flags & NOUVEAU_BO_WR)
-         res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING;
+         res->status |= NOUVEAU_BUFFER_STATUS_GPU_WRITING |
+            NOUVEAU_BUFFER_STATUS_DIRTY;
       if (flags & NOUVEAU_BO_RD)
          res->status |= NOUVEAU_BUFFER_STATUS_GPU_READING;
 
@@ -152,4 +148,6 @@ nv50_screen_tsc_free(struct nv50_screen *screen, struct nv50_tsc_entry *tsc)
    }
 }
 
+extern int nv50_tls_realloc(struct nv50_screen *screen, unsigned tls_space);
+
 #endif