* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
- * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
*/
#include "pipe/p_context.h"
case 4: fmt = PIPE_FORMAT_R32G32B32A32_FLOAT; break;
default:
assert(0);
+ FREE(so);
return NULL;
}
so->element[i].state = nv50_format_table[fmt].vtx;
else
nv50->vbo_fifo = 0;
+ if (!nv50->vbo_fifo) {
+ /* if vertex buffer was written by GPU - flush VBO cache */
+ for (i = 0; i < nv50->num_vtxbufs; ++i) {
+ struct nv04_resource *buf = nv04_resource(nv50->vtxbuf[i].buffer);
+ if (buf && buf->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING) {
+ buf->status &= ~NOUVEAU_BUFFER_STATUS_GPU_WRITING;
+ nv50->base.vbo_dirty = TRUE;
+ break;
+ }
+ }
+ }
+
/* update vertex format state */
BEGIN_NV04(push, NV50_3D(VERTEX_ARRAY_ATTRIB(0)), n);
if (nv50->vbo_fifo) {
struct nv04_resource *buf = nv04_resource(nv50->idxbuf.buffer);
unsigned pb_start;
unsigned pb_bytes;
- const unsigned base = buf->offset + nv50->idxbuf.offset;
+ const unsigned base = (buf->offset + nv50->idxbuf.offset) & ~3;
+
+ start += ((buf->offset + nv50->idxbuf.offset) & 3) >> (index_size >> 1);
assert(nouveau_resource_mapped_by_gpu(nv50->idxbuf.buffer));