radeonsi: Handle position input parameter for pixel shaders v2

[mesa.git] / src / gallium / drivers / nvc0 / nvc0_graph_macros.h

diff --git a/src/gallium/drivers/nvc0/nvc0_graph_macros.h b/src/gallium/drivers/nvc0/nvc0_graph_macros.h
index b7d0d3eafa4954dc6018c33b1f0dae3d380a1199..f009980c629630453e7163ea4acc741068a32787 100644 (file)
--- a/src/gallium/drivers/nvc0/nvc0_graph_macros.h
+++ b/src/gallium/drivers/nvc0/nvc0_graph_macros.h
@@ -8,6 +8,20 @@
  * bra(n)z annul: no delay slot
  */
 
+/* Bitfield version of NVC0_3D_VERTEX_ARRAY_PER_INSTANCE[].
+ * Args: size, bitfield
+ */
+static const uint32_t nvc0_9097_per_instance_bf[] =
+{
+   0x00000301, /* parm $r3 (the bitfield) */
+   0x00000211, /* mov $r2 0 */
+   0x05880021, /* maddr [NVC0_3D_VERTEX_ARRAY_PER_INSTANCE(0), increment = 4] */
+   0xffffc911, /* mov $r1 (add $r1 -0x1) */
+   0x0040d043, /* send (extrshl $r3 $r2 0x1 0) */
+   0xffff8897, /* exit branz $r1 0x3 */
+   0x00005211  /* mov $r2 (add $r2 0x1) */
+};
+
 /* The comments above the macros describe what they *should* be doing,
  * but we use less functionality for now.
  */
@@ -68,19 +82,6 @@ static const uint32_t nvc0_9097_vertex_array_select[] =
    0x00001841, /* 0x0b: send $r3 */
 };
 
-static const uint32_t nvc0_9097_color_mask_brdc[] =
-{
-   0x05a00021, /* maddr [NVC0_3D_COLOR_MASK(0), increment = 4] */
-   0x00000841, /* send $r1 */
-   0x00000841, /* send $r1 */
-   0x00000841, /* send $r1 */
-   0x00000841, /* send $r1 */
-   0x00000841, /* send $r1 */
-   0x00000841, /* send $r1 */
-   0x000008c1, /* exit send $r1 */
-   0x00000841, /* send $r1 */
-};
-
 /*
  * [GL_POLYGON_MODE_FRONT] = arg;
  *