nvc0_shader_input_address(unsigned sn, unsigned si, unsigned ubase)
{
switch (sn) {
-/* case TGSI_SEMANTIC_TESSFACTOR: return 0x000 + si * 0x4; */
+ case NV50_SEMANTIC_TESSFACTOR: return 0x000 + si * 0x4;
case TGSI_SEMANTIC_PRIMID: return 0x060;
case TGSI_SEMANTIC_PSIZE: return 0x06c;
case TGSI_SEMANTIC_POSITION: return 0x070;
case TGSI_SEMANTIC_FOG: return 0x270;
case TGSI_SEMANTIC_COLOR: return 0x280 + si * 0x10;
case TGSI_SEMANTIC_BCOLOR: return 0x2a0 + si * 0x10;
-/* case TGSI_SEMANTIC_CLIP: return 0x2c0 + si * 0x10; */
-/* case TGSI_SEMANTIC_POINTCOORD: return 0x2e0; */
-/* case TGSI_SEMANTIC_TESSCOORD: return ~0; */ /* 0x2f0, but special load */
+ case NV50_SEMANTIC_CLIPDISTANCE: return 0x2c0 + si * 0x4;
+ case TGSI_SEMANTIC_CLIPDIST: return 0x2c0 + si * 0x10;
+ case TGSI_SEMANTIC_CLIPVERTEX: return 0x260;
+ case NV50_SEMANTIC_POINTCOORD: return 0x2e0;
+ case NV50_SEMANTIC_TESSCOORD: return 0x2f0;
case TGSI_SEMANTIC_INSTANCEID: return 0x2f8;
-/* case TGSI_SEMANTIC_VERTEXID: return 0x2fc; */
-/* case TGSI_SEMANTIC_TEXCOORD: return 0x300 + si * 0x10; */
+ case TGSI_SEMANTIC_VERTEXID: return 0x2fc;
+ case NV50_SEMANTIC_TEXCOORD: return 0x300 + si * 0x10;
case TGSI_SEMANTIC_FACE: return 0x3fc;
-/* case TGSI_SEMANTIC_INVOCATIONID: return ~0; */
+ case NV50_SEMANTIC_INVOCATIONID: return ~0;
default:
assert(!"invalid TGSI input semantic");
return ~0;
nvc0_shader_output_address(unsigned sn, unsigned si, unsigned ubase)
{
switch (sn) {
-/* case TGSI_SEMANTIC_TESSFACTOR: return 0x000 + si * 0x4; */
- case TGSI_SEMANTIC_PRIMID: return 0x040;
-/* case TGSI_SEMANTIC_LAYER: return 0x064; */
-/* case TGSI_SEMANTIC_VIEWPORTINDEX: return 0x068; */
+ case NV50_SEMANTIC_TESSFACTOR: return 0x000 + si * 0x4;
+ case TGSI_SEMANTIC_PRIMID: return 0x060;
+ case NV50_SEMANTIC_LAYER: return 0x064;
+ case NV50_SEMANTIC_VIEWPORTINDEX: return 0x068;
case TGSI_SEMANTIC_PSIZE: return 0x06c;
case TGSI_SEMANTIC_POSITION: return 0x070;
case TGSI_SEMANTIC_GENERIC: return ubase + si * 0x10;
case TGSI_SEMANTIC_FOG: return 0x270;
case TGSI_SEMANTIC_COLOR: return 0x280 + si * 0x10;
case TGSI_SEMANTIC_BCOLOR: return 0x2a0 + si * 0x10;
-/* case TGSI_SEMANTIC_CLIP: return 0x2c0 + si * 0x10; */
-/* case TGSI_SEMANTIC_TEXCOORD: return 0x300 + si * 0x10; */
+ case NV50_SEMANTIC_CLIPDISTANCE: return 0x2c0 + si * 0x4;
+ case TGSI_SEMANTIC_CLIPDIST: return 0x2c0 + si * 0x10;
+ case TGSI_SEMANTIC_CLIPVERTEX: return 0x260;
+ case NV50_SEMANTIC_TEXCOORD: return 0x300 + si * 0x10;
case TGSI_SEMANTIC_EDGEFLAG: return ~0;
default:
assert(!"invalid TGSI output semantic");
static int
nvc0_vp_assign_input_slots(struct nv50_ir_prog_info *info)
{
- unsigned i, c;
+ unsigned i, c, n;
- for (i = 0; i < info->numInputs; ++i)
+ for (n = 0, i = 0; i < info->numInputs; ++i) {
+ switch (info->in[i].sn) {
+ case TGSI_SEMANTIC_INSTANCEID: /* for SM4 only, in TGSI they're SVs */
+ case TGSI_SEMANTIC_VERTEXID:
+ info->in[i].mask = 0x1;
+ info->in[i].slot[0] =
+ nvc0_shader_input_address(info->in[i].sn, 0, 0) / 4;
+ continue;
+ default:
+ break;
+ }
for (c = 0; c < 4; ++c)
- info->in[i].slot[c] = (0x80 + i * 0x10 + c * 0x4) / 4;
+ info->in[i].slot[c] = (0x80 + n * 0x10 + c * 0x4) / 4;
+ ++n;
+ }
return 0;
}
if (info->in[i].patch && offset >= 0x20)
offset = 0x20 + info->in[i].si * 0x10;
+ if (info->in[i].sn == NV50_SEMANTIC_TESSCOORD)
+ info->in[i].mask &= 3;
+
for (c = 0; c < 4; ++c)
info->in[i].slot[c] = (offset + c * 0x4) / 4;
static int
nvc0_fp_assign_output_slots(struct nv50_ir_prog_info *info)
{
- unsigned last = info->prop.fp.numColourResults * 4;
+ unsigned count = info->prop.fp.numColourResults * 4;
unsigned i, c;
for (i = 0; i < info->numOutputs; ++i)
info->out[i].slot[c] = info->out[i].si * 4 + c;
if (info->io.sampleMask < PIPE_MAX_SHADER_OUTPUTS)
- info->out[info->io.sampleMask].slot[0] = last++;
+ info->out[info->io.sampleMask].slot[0] = count++;
+ else
+ if (info->target >= 0xe0)
+ count++; /* on Kepler, depth is always last colour reg + 2 */
if (info->io.fragDepth < PIPE_MAX_SHADER_OUTPUTS)
- info->out[info->io.fragDepth].slot[2] = last;
+ info->out[info->io.fragDepth].slot[2] = count;
return 0;
}
continue;
for (c = 0; c < 4; ++c) {
a = info->in[i].slot[c];
- if (info->in[i].mask & (1 << c))
- vp->hdr[5 + a / 32] |= 1 << (a % 32);
+ if (info->in[i].mask & (1 << c)) {
+ if (info->in[i].sn != NV50_SEMANTIC_TESSCOORD)
+ vp->hdr[5 + a / 32] |= 1 << (a % 32);
+ else
+ nvc0_vtgp_hdr_update_oread(vp, info->in[i].slot[c]);
+ }
}
}
case TGSI_SEMANTIC_INSTANCEID:
vp->hdr[10] |= 1 << 30;
break;
- /*
case TGSI_SEMANTIC_VERTEXID:
vp->hdr[10] |= 1 << 31;
break;
- */
default:
break;
}
}
+ vp->vp.clip_enable = info->io.clipDistanceMask;
+ for (i = 0; i < 8; ++i)
+ if (info->io.cullDistanceMask & (1 << i))
+ vp->vp.clip_mode |= 1 << (i * 4);
+
+ if (info->io.genUserClip < 0)
+ vp->vp.num_ucps = PIPE_MAX_CLIP_PLANES + 1; /* prevent rebuilding */
+
return 0;
}
vp->hdr[0] = 0x20061 | (1 << 10);
vp->hdr[4] = 0xff000;
- vp->hdr[18] = (1 << info->io.clipDistanceCount) - 1;
+ vp->hdr[18] = info->io.clipDistanceMask;
return nvc0_vtgp_gen_header(vp, info);
}
static void
nvc0_tp_get_tess_mode(struct nvc0_program *tp, struct nv50_ir_prog_info *info)
{
+ if (info->prop.tp.outputPrim == PIPE_PRIM_MAX) {
+ tp->tp.tess_mode = ~0;
+ return;
+ }
switch (info->prop.tp.domain) {
case PIPE_PRIM_LINES:
tp->tp.tess_mode = NVC0_3D_TESS_MODE_PRIM_ISOLINES;
static int
nvc0_tep_gen_header(struct nvc0_program *tep, struct nv50_ir_prog_info *info)
{
+ tep->tp.input_patch_size = ~0;
+
tep->hdr[0] = 0x20061 | (3 << 10);
tep->hdr[4] = 0xff000;
{
unsigned i, c, a, m;
+ /* just 00062 on Kepler */
fp->hdr[0] = 0x20062 | (5 << 10);
fp->hdr[5] = 0x80000000; /* getting a trap if FRAG_COORD_UMASK.w = 0 */
for (c = 0; c < 4; ++c) {
if (!(info->in[i].mask & (1 << c)))
continue;
- if (info->in[i].slot[0] == (0x070 / 4)) {
- fp->hdr[5] |= 1 << (28 + c);
+ a = info->in[i].slot[c];
+ if (info->in[i].slot[0] >= (0x060 / 4) &&
+ info->in[i].slot[0] <= (0x07c / 4)) {
+ fp->hdr[5] |= 1 << (24 + (a - 0x060 / 4));
} else
- if (info->in[i].slot[0] == (0x2e0 / 4)) {
- if (c <= 1)
- fp->hdr[14] |= 1 << (24 + c);
+ if (info->in[i].slot[0] >= (0x2c0 / 4) &&
+ info->in[i].slot[0] <= (0x2fc / 4)) {
+ fp->hdr[14] |= (1 << (a - 0x280 / 4)) & 0x03ff0000;
} else {
if (info->in[i].slot[c] < (0x040 / 4) ||
info->in[i].slot[c] > (0x380 / 4))
continue;
- a = info->in[i].slot[c] * 2;
- if (info->in[i].slot[0] >= (0x2c0 / 4))
+ a *= 2;
+ if (info->in[i].slot[0] >= (0x300 / 4))
a -= 32;
fp->hdr[4 + a / 32] |= m << (a % 32);
}
}
fp->fp.early_z = info->prop.fp.earlyFragTests;
- if (fp->fp.early_z == FALSE && fp->code_size >= 0x400)
- fp->fp.early_z = !(info->prop.fp.writesDepth ||
- info->prop.fp.usesDiscard ||
- (info->io.globalAccess & 2));
return 0;
}
+static struct nvc0_transform_feedback_state *
+nvc0_program_create_tfb_state(const struct nv50_ir_prog_info *info,
+ const struct pipe_stream_output_info *pso)
+{
+ struct nvc0_transform_feedback_state *tfb;
+ unsigned b, i, c;
+
+ tfb = MALLOC_STRUCT(nvc0_transform_feedback_state);
+ if (!tfb)
+ return NULL;
+ for (b = 0; b < 4; ++b) {
+ tfb->stride[b] = pso->stride[b] * 4;
+ tfb->varying_count[b] = 0;
+ }
+ memset(tfb->varying_index, 0xff, sizeof(tfb->varying_index)); /* = skip */
+
+ for (i = 0; i < pso->num_outputs; ++i) {
+ unsigned s = pso->output[i].start_component;
+ unsigned p = pso->output[i].dst_offset;
+ b = pso->output[i].output_buffer;
+
+ for (c = 0; c < pso->output[i].num_components; ++c)
+ tfb->varying_index[b][p++] =
+ info->out[pso->output[i].register_index].slot[s + c];
+
+ tfb->varying_count[b] = MAX2(tfb->varying_count[b], p);
+ }
+ for (b = 0; b < 4; ++b) // zero unused indices (looks nicer)
+ for (c = tfb->varying_count[b]; c & 3; ++c)
+ tfb->varying_index[b][c] = 0;
+
+ return tfb;
+}
+
#ifdef DEBUG
static void
nvc0_program_dump(struct nvc0_program *prog)
#endif
boolean
-nvc0_program_translate(struct nvc0_program *prog)
+nvc0_program_translate(struct nvc0_program *prog, uint16_t chipset)
{
struct nv50_ir_prog_info *info;
int ret;
return FALSE;
info->type = prog->type;
- info->target = 0xc0;
+ info->target = chipset;
info->bin.sourceRep = NV50_PROGRAM_IR_TGSI;
info->bin.source = (void *)prog->pipe.tokens;
- info->io.clipDistanceCount = prog->vp.num_ucps;
+ info->io.genUserClip = prog->vp.num_ucps;
+ info->io.ucpBase = 256;
+ info->io.ucpBinding = 15;
info->assignSlots = nvc0_program_assign_varying_slots;
NOUVEAU_ERR("shader translation failed: %i\n", ret);
goto out;
}
+ FREE(info->bin.syms);
prog->code = info->bin.code;
prog->code_size = info->bin.codeSize;
prog->relocs = info->bin.relocData;
prog->max_gpr = MAX2(4, (info->bin.maxGPR + 1));
- prog->vp.edgeflag = PIPE_MAX_ATTRIBS;
+ prog->vp.need_vertex_id = info->io.vertexId < PIPE_MAX_SHADER_INPUTS;
+
+ if (info->io.edgeFlagOut < PIPE_MAX_ATTRIBS)
+ info->out[info->io.edgeFlagOut].mask = 0; /* for headergen */
+ prog->vp.edgeflag = info->io.edgeFlagIn;
switch (prog->type) {
case PIPE_SHADER_VERTEX:
assert(info->bin.tlsSpace < (1 << 24));
prog->hdr[0] |= 1 << 26;
prog->hdr[1] |= info->bin.tlsSpace; /* l[] size */
+ prog->need_tls = TRUE;
+ }
+ /* TODO: factor 2 only needed where joinat/precont is used,
+ * and we only have to count non-uniform branches
+ */
+ /*
+ if ((info->maxCFDepth * 2) > 16) {
+ prog->hdr[2] |= (((info->maxCFDepth * 2) + 47) / 48) * 0x200;
+ prog->need_tls = TRUE;
}
+ */
if (info->io.globalAccess)
prog->hdr[0] |= 1 << 16;
+ if (prog->pipe.stream_output.num_outputs)
+ prog->tfb = nvc0_program_create_tfb_state(info,
+ &prog->pipe.stream_output);
+
out:
FREE(info);
return !ret;
size = align(size, 0x40);
size += prog->immd_size + 0xc0; /* add 0xc0 for align 0x40 -> 0x100 */
}
- size = align(size, 0x40); /* required by SP_START_ID */
-
- ret = nouveau_resource_alloc(screen->text_heap, size, prog, &prog->res);
+ /* On Fermi, SP_START_ID must be aligned to 0x40.
+ * On Kepler, the first instruction must be aligned to 0x80 because
+ * latency information is expected only at certain positions.
+ */
+ if (screen->base.class_3d >= NVE4_3D_CLASS)
+ size = size + 0x70;
+ size = align(size, 0x40);
+
+ ret = nouveau_heap_alloc(screen->text_heap, size, prog, &prog->mem);
if (ret) {
NOUVEAU_ERR("out of code space\n");
return FALSE;
}
- prog->code_base = prog->res->start;
- prog->immd_base = align(prog->res->start + prog->immd_base, 0x100);
+ prog->code_base = prog->mem->start;
+ prog->immd_base = align(prog->mem->start + prog->immd_base, 0x100);
assert((prog->immd_size == 0) || (prog->immd_base + prog->immd_size <=
- prog->res->start + prog->res->size));
+ prog->mem->start + prog->mem->size));
+ if (screen->base.class_3d >= NVE4_3D_CLASS) {
+ switch (prog->mem->start & 0xff) {
+ case 0x40: prog->code_base += 0x70; break;
+ case 0x80: prog->code_base += 0x30; break;
+ case 0xc0: prog->code_base += 0x70; break;
+ default:
+ prog->code_base += 0x30;
+ assert((prog->mem->start & 0xff) == 0x00);
+ break;
+ }
+ }
code_pos = prog->code_base + NVC0_SHADER_HEADER_SIZE;
if (prog->relocs)
nvc0_program_dump(prog);
#endif
- nvc0_m2mf_push_linear(&nvc0->base, screen->text, prog->code_base,
- NOUVEAU_BO_VRAM, NVC0_SHADER_HEADER_SIZE, prog->hdr);
- nvc0_m2mf_push_linear(&nvc0->base, screen->text,
- prog->code_base + NVC0_SHADER_HEADER_SIZE,
- NOUVEAU_BO_VRAM, prog->code_size, prog->code);
+ nvc0->base.push_data(&nvc0->base, screen->text, prog->code_base,
+ NOUVEAU_BO_VRAM, NVC0_SHADER_HEADER_SIZE, prog->hdr);
+ nvc0->base.push_data(&nvc0->base, screen->text,
+ prog->code_base + NVC0_SHADER_HEADER_SIZE,
+ NOUVEAU_BO_VRAM, prog->code_size, prog->code);
if (prog->immd_size)
- nvc0_m2mf_push_linear(&nvc0->base,
- screen->text, prog->immd_base, NOUVEAU_BO_VRAM,
- prog->immd_size, prog->immd_data);
+ nvc0->base.push_data(&nvc0->base,
+ screen->text, prog->immd_base, NOUVEAU_BO_VRAM,
+ prog->immd_size, prog->immd_data);
- BEGIN_RING(screen->base.channel, RING_3D(MEM_BARRIER), 1);
- OUT_RING (screen->base.channel, 0x1111);
+ BEGIN_NVC0(nvc0->base.pushbuf, NVC0_3D(MEM_BARRIER), 1);
+ PUSH_DATA (nvc0->base.pushbuf, 0x1011);
return TRUE;
}
if (!size)
return;
- ret = nouveau_resource_alloc(screen->text_heap, align(size, 0x100), NULL,
- &screen->lib_code);
+ ret = nouveau_heap_alloc(screen->text_heap, align(size, 0x100), NULL,
+ &screen->lib_code);
if (ret)
return;
- nvc0_m2mf_push_linear(&nvc0->base,
- screen->text, screen->lib_code->start, NOUVEAU_BO_VRAM,
- size, code);
+ nvc0->base.push_data(&nvc0->base,
+ screen->text, screen->lib_code->start, NOUVEAU_BO_VRAM,
+ size, code);
/* no need for a memory barrier, will be emitted with first program */
}
void
nvc0_program_destroy(struct nvc0_context *nvc0, struct nvc0_program *prog)
{
- if (prog->res)
- nouveau_resource_free(&prog->res);
-
- if (prog->code)
- FREE(prog->code);
- if (prog->immd_data)
- FREE(prog->immd_data);
- if (prog->relocs)
- FREE(prog->relocs);
+ const struct pipe_shader_state pipe = prog->pipe;
+ const ubyte type = prog->type;
+
+ if (prog->mem)
+ nouveau_heap_free(&prog->mem);
+
+ FREE(prog->code);
+ FREE(prog->immd_data);
+ FREE(prog->relocs);
+ if (prog->tfb) {
+ if (nvc0->state.tfb == prog->tfb)
+ nvc0->state.tfb = NULL;
+ FREE(prog->tfb);
+ }
- memset(prog->hdr, 0, sizeof(prog->hdr));
+ memset(prog, 0, sizeof(*prog));
- prog->translated = FALSE;
+ prog->pipe = pipe;
+ prog->type = type;
}
projects / mesa.git / blobdiff