llvmpipe: move create_surface/destroy_surface functions to lp_surface.c

[mesa.git] / src / gallium / drivers / nvc0 / nvc0_state_validate.c

diff --git a/src/gallium/drivers/nvc0/nvc0_state_validate.c b/src/gallium/drivers/nvc0/nvc0_state_validate.c
index e35aae532e8157dc69b1aa37f2365a056652d515..1e14723244c9d4947654ee24ae38b0b8d78fd321 100644 (file)
--- a/src/gallium/drivers/nvc0/nvc0_state_validate.c
+++ b/src/gallium/drivers/nvc0/nvc0_state_validate.c
@@ -3,6 +3,7 @@
 
 #include "nvc0_context.h"
 
+#if 0
 static void
 nvc0_validate_zcull(struct nvc0_context *nvc0)
 {
@@ -51,6 +52,7 @@ nvc0_validate_zcull(struct nvc0_context *nvc0)
     BEGIN_NVC0(push, NVC0_3D(ZCULL_INVALIDATE), 1);
     PUSH_DATA (push, 0);
 }
+#endif
 
 static void
 nvc0_validate_fb(struct nvc0_context *nvc0)
@@ -158,6 +160,8 @@ nvc0_validate_fb(struct nvc0_context *nvc0)
 
     if (serialize)
        IMMED_NVC0(push, NVC0_3D(SERIALIZE), 0);
+
+    NOUVEAU_DRV_STAT(&nvc0->screen->base, gpu_serialize_count, serialize);
 }
 
 static void
@@ -308,7 +312,7 @@ nvc0_validate_clip(struct nvc0_context *nvc0)
       nvc0_check_program_ucps(nvc0, vp, clip_enable);
 
    if (nvc0->dirty & (NVC0_NEW_CLIP | (NVC0_NEW_VERTPROG << stage)))
-      if (vp->vp.num_ucps <= PIPE_MAX_CLIP_PLANES)
+      if (vp->vp.num_ucps > 0 && vp->vp.num_ucps <= PIPE_MAX_CLIP_PLANES)
          nvc0_upload_uclip_planes(nvc0, stage);
 
    clip_enable &= vp->vp.clip_enable;
@@ -428,16 +432,35 @@ nvc0_validate_sample_mask(struct nvc0_context *nvc0)
    PUSH_DATA (push, 0x01);
 }
 
+void
+nvc0_validate_global_residents(struct nvc0_context *nvc0,
+                               struct nouveau_bufctx *bctx, int bin)
+{
+   unsigned i;
+
+   for (i = 0; i < nvc0->global_residents.size / sizeof(struct pipe_resource *);
+        ++i) {
+      struct pipe_resource *res = *util_dynarray_element(
+         &nvc0->global_residents, struct pipe_resource *, i);
+      if (res)
+         nvc0_add_resident(bctx, bin, nv04_resource(res), NOUVEAU_BO_RDWR);
+   }
+}
+
 static void
 nvc0_validate_derived_1(struct nvc0_context *nvc0)
 {
    struct nouveau_pushbuf *push = nvc0->base.pushbuf;
    boolean rasterizer_discard;
 
-   rasterizer_discard = (!nvc0->fragprog || !nvc0->fragprog->hdr[18]) &&
-      !nvc0->zsa->pipe.depth.enabled && !nvc0->zsa->pipe.stencil[0].enabled;
-   rasterizer_discard = rasterizer_discard ||
-      nvc0->rast->pipe.rasterizer_discard;
+   if (nvc0->rast && nvc0->rast->pipe.rasterizer_discard) {
+      rasterizer_discard = TRUE;
+   } else {
+      boolean zs = nvc0->zsa &&
+         (nvc0->zsa->pipe.depth.enabled || nvc0->zsa->pipe.stencil[0].enabled);
+      rasterizer_discard = !zs &&
+         (!nvc0->fragprog || !nvc0->fragprog->hdr[18]);
+   }
 
    if (rasterizer_discard != nvc0->state.rasterizer_discard) {
       nvc0->state.rasterizer_discard = rasterizer_discard;
@@ -511,6 +534,7 @@ static struct state_validate {
     { nvc0_validate_samplers,      NVC0_NEW_SAMPLERS },
     { nve4_set_tex_handles,        NVC0_NEW_TEXTURES | NVC0_NEW_SAMPLERS },
     { nvc0_vertex_arrays_validate, NVC0_NEW_VERTEX | NVC0_NEW_ARRAYS },
+    { nvc0_validate_surfaces,      NVC0_NEW_SURFACES },
     { nvc0_idxbuf_validate,        NVC0_NEW_IDXBUF },
     { nvc0_tfb_validate,           NVC0_NEW_TFB_TARGETS | NVC0_NEW_GMTYPROG }
 };