nvc0: fix user vertex buffer updates

[mesa.git] / src / gallium / drivers / nvc0 / nvc0_tex.c

diff --git a/src/gallium/drivers/nvc0/nvc0_tex.c b/src/gallium/drivers/nvc0/nvc0_tex.c
index c766b64d95e77576039aebdbf1e7c1a95a1c67a5..b219f82c903cf504e54e1d723b1154a3c862a57f 100644 (file)
--- a/src/gallium/drivers/nvc0/nvc0_tex.c
+++ b/src/gallium/drivers/nvc0/nvc0_tex.c
@@ -54,6 +54,7 @@ nvc0_create_sampler_view(struct pipe_context *pipe,
    const struct util_format_description *desc;
    uint32_t *tic;
    uint32_t swz[4];
+   uint32_t depth;
    struct nvc0_tic_entry *view;
    struct nvc0_miptree *mt = nvc0_miptree(texture);
 
@@ -88,8 +89,8 @@ nvc0_create_sampler_view(struct pipe_context *pipe,
       (swz[2] << NV50_TIC_0_MAPB__SHIFT) |
       (swz[3] << NV50_TIC_0_MAPA__SHIFT);
 
-   tic[1] = nouveau_bo_gpu_address(mt->base.bo);
-   tic[2] = nouveau_bo_gpu_address(mt->base.bo) >> 32;
+   /* tic[1] = mt->base.bo->offset; */
+   tic[2] = /* mt->base.bo->offset >> 32 */ 0;
 
    tic[2] |= 0x10001000 | /* NV50_TIC_2_NO_BORDER */ 0x40000000;
 
@@ -101,7 +102,9 @@ nvc0_create_sampler_view(struct pipe_context *pipe,
 
    tic[2] |=
       ((mt->base.bo->tile_mode & 0x0f0) << (22 - 4)) |
-      ((mt->base.bo->tile_mode & 0xf00) << (21 - 4));
+      ((mt->base.bo->tile_mode & 0xf00) << (25 - 8));
+
+   depth = MAX2(mt->base.base.array_size, mt->base.base.depth0);
 
    switch (mt->base.base.target) {
    case PIPE_TEXTURE_1D:
@@ -117,7 +120,17 @@ nvc0_create_sampler_view(struct pipe_context *pipe,
       tic[2] |= NV50_TIC_2_TARGET_3D;
       break;
    case PIPE_TEXTURE_CUBE:
-      tic[2] |= NV50_TIC_2_TARGET_CUBE;
+      depth /= 6;
+      if (depth > 1)
+         tic[2] |= NV50_TIC_2_TARGET_CUBE_ARRAY;
+      else
+         tic[2] |= NV50_TIC_2_TARGET_CUBE;
+      break;
+   case PIPE_TEXTURE_1D_ARRAY:
+      tic[2] |= NV50_TIC_2_TARGET_1D_ARRAY;
+      break;
+   case PIPE_TEXTURE_2D_ARRAY:
+      tic[2] |= NV50_TIC_2_TARGET_2D_ARRAY;
       break;
    case PIPE_BUFFER:
       tic[2] |= NV50_TIC_2_TARGET_BUFFER | /* NV50_TIC_2_LINEAR */ (1 << 18);
@@ -134,12 +147,12 @@ nvc0_create_sampler_view(struct pipe_context *pipe,
    tic[4] = (1 << 31) | mt->base.base.width0;
 
    tic[5] = mt->base.base.height0 & 0xffff;
-   tic[5] |= mt->base.base.depth0 << 16;
+   tic[5] |= depth << 16;
    tic[5] |= mt->base.base.last_level << 28;
 
    tic[6] = 0x03000000;
 
-   tic[7] = (view->pipe.last_level << 4) | view->pipe.first_level;
+   tic[7] = (view->pipe.u.tex.last_level << 4) | view->pipe.u.tex.first_level;
 
    return &view->pipe;
 }
@@ -148,6 +161,7 @@ static boolean
 nvc0_validate_tic(struct nvc0_context *nvc0, int s)
 {
    struct nouveau_channel *chan = nvc0->screen->base.channel;
+   struct nouveau_bo *txc = nvc0->screen->txc;
    unsigned i;
    boolean need_flush = FALSE;
 
@@ -165,8 +179,22 @@ nvc0_validate_tic(struct nvc0_context *nvc0, int s)
       if (tic->id < 0) {
          tic->id = nvc0_screen_tic_alloc(nvc0->screen, tic);
 
-         nvc0_m2mf_push_linear(nvc0, nvc0->screen->txc, NOUVEAU_BO_VRAM,
-                               tic->id * 32, 32, tic->tic);
+         MARK_RING (chan, 9 + 8, 4);
+         BEGIN_RING(chan, RING_MF(OFFSET_OUT_HIGH), 2);
+         OUT_RELOCh(chan, txc, tic->id * 32, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
+         OUT_RELOCl(chan, txc, tic->id * 32, NOUVEAU_BO_VRAM | NOUVEAU_BO_WR);
+         BEGIN_RING(chan, RING_MF(LINE_LENGTH_IN), 2);
+         OUT_RING  (chan, 32);
+         OUT_RING  (chan, 1);
+         BEGIN_RING(chan, RING_MF(EXEC), 1);
+         OUT_RING  (chan, 0x100111);
+         BEGIN_RING_NI(chan, RING_MF(DATA), 8);
+         OUT_RING  (chan, tic->tic[0]);
+         OUT_RELOCl(chan, res->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD);
+         OUT_RELOC (chan, res->bo, 0, NOUVEAU_BO_VRAM | NOUVEAU_BO_RD |
+                    NOUVEAU_BO_HIGH | NOUVEAU_BO_OR, tic->tic[2], tic->tic[2]);
+         OUT_RINGp (chan, &tic->tic[3], 5);
+
          need_flush = TRUE;
       }
       nvc0->screen->tic.lock[tic->id / 32] |= 1 << (tic->id % 32);
@@ -190,8 +218,6 @@ void nvc0_validate_textures(struct nvc0_context *nvc0)
 {
    boolean need_flush;
 
-   nvc0_bufctx_reset(nvc0, NVC0_BUFCTX_TEXTURES);
-
    need_flush  = nvc0_validate_tic(nvc0, 0);
    need_flush |= nvc0_validate_tic(nvc0, 4);